JPH059954B2 - - Google Patents

Info

Publication number
JPH059954B2
JPH059954B2 JP60143758A JP14375885A JPH059954B2 JP H059954 B2 JPH059954 B2 JP H059954B2 JP 60143758 A JP60143758 A JP 60143758A JP 14375885 A JP14375885 A JP 14375885A JP H059954 B2 JPH059954 B2 JP H059954B2
Authority
JP
Japan
Prior art keywords
conductor
paste
temperature
resistor
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60143758A
Other languages
English (en)
Japanese (ja)
Other versions
JPS624354A (ja
Inventor
Tsuneo Kaneko
Shiro Ezaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP14375885A priority Critical patent/JPS624354A/ja
Priority to DE19863621667 priority patent/DE3621667A1/de
Publication of JPS624354A publication Critical patent/JPS624354A/ja
Priority to US07/071,669 priority patent/US4830878A/en
Priority to US07/153,432 priority patent/US4835038A/en
Publication of JPH059954B2 publication Critical patent/JPH059954B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
JP14375885A 1985-06-29 1985-06-29 厚膜多層基板の製造方法 Granted JPS624354A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP14375885A JPS624354A (ja) 1985-06-29 1985-06-29 厚膜多層基板の製造方法
DE19863621667 DE3621667A1 (de) 1985-06-29 1986-06-27 Mit einer mehrzahl von dickfilmen beschichtetes substrat, verfahren zu seiner herstellung und dieses enthaltende vorrichtung
US07/071,669 US4830878A (en) 1985-06-29 1987-07-09 Method of manufacturing a substrate coated with multiple thick films
US07/153,432 US4835038A (en) 1985-06-29 1988-02-08 Substrate coated with multiple thick films

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14375885A JPS624354A (ja) 1985-06-29 1985-06-29 厚膜多層基板の製造方法

Publications (2)

Publication Number Publication Date
JPS624354A JPS624354A (ja) 1987-01-10
JPH059954B2 true JPH059954B2 (enrdf_load_stackoverflow) 1993-02-08

Family

ID=15346335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14375885A Granted JPS624354A (ja) 1985-06-29 1985-06-29 厚膜多層基板の製造方法

Country Status (1)

Country Link
JP (1) JPS624354A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0728116B2 (ja) * 1991-01-18 1995-03-29 ニチコン株式会社 厚膜混成集積回路
JPH04309286A (ja) * 1991-04-08 1992-10-30 Murata Mfg Co Ltd 厚膜多層配線基板の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55111152A (en) * 1979-02-21 1980-08-27 Hitachi Ltd Method of manufacturing multilayer thin film circuit board
JPS60219758A (ja) * 1984-04-16 1985-11-02 Toshiba Corp 多層厚膜基板の製造方法

Also Published As

Publication number Publication date
JPS624354A (ja) 1987-01-10

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