JPH0595078A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH0595078A
JPH0595078A JP25403791A JP25403791A JPH0595078A JP H0595078 A JPH0595078 A JP H0595078A JP 25403791 A JP25403791 A JP 25403791A JP 25403791 A JP25403791 A JP 25403791A JP H0595078 A JPH0595078 A JP H0595078A
Authority
JP
Japan
Prior art keywords
lead
semiconductor element
resin
semiconductor device
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25403791A
Other languages
Japanese (ja)
Inventor
Yasuhiro Suzuki
康弘 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25403791A priority Critical patent/JPH0595078A/en
Publication of JPH0595078A publication Critical patent/JPH0595078A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the size of a semiconductor device as required and enhance its heat dissipation properties. CONSTITUTION:Inner leads 9 are formed with a sheet thinner than outer leads 10. The leads are joined with their counterparts respectively. A semiconductor device 6 is mounted on the inner leads 9 by way of an insulation film 5 having a bonding agent 4 on both ends.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は樹脂封止型半導体装置に
関し、特に、多ピン化,半導体素子の小型化に対応し、
かつ熱放散性の向上を目的とした樹脂封止型半導体装置
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly, to cope with a large number of pins and miniaturization of semiconductor elements,
In addition, the present invention relates to a resin-encapsulated semiconductor device for improving heat dissipation.

【0002】[0002]

【従来の技術】従来、半導体素子の熱放散性の向上を図
った樹脂封止型半導体装置は、図3(a),(b)に示
すように、リードフレームの内部リード2と半導体素子
搭載部3が電気絶縁性を有する接着剤4を両面にもつポ
リイミド等の絶縁フィルム5を介して接着されており、
さらにこの半導体素子搭載部3上に半導体素子6を銀ペ
ースト等で固着した後、金線等のボンディングワイヤー
(以下単にワイヤーという)7により、半導体素子6の
内部リード2を電気的に接続し、その後、トランスファ
ーモールド法により、エポキシ等の樹脂8で樹脂封止
し、その後内部リード2と一体的に形成された外部リー
ド1を成型し外部端子11Bを形成して半導体装置を完
成させていた。
2. Description of the Related Art Conventionally, as shown in FIGS. 3A and 3B, a resin-encapsulated semiconductor device in which heat dissipation of a semiconductor element is improved is mounted on an inner lead 2 of a lead frame and a semiconductor element mounted thereon. The part 3 is adhered via an insulating film 5 made of polyimide or the like having an electrically insulating adhesive 4 on both sides,
Further, after fixing the semiconductor element 6 on the semiconductor element mounting portion 3 with silver paste or the like, the internal lead 2 of the semiconductor element 6 is electrically connected by a bonding wire (hereinafter simply referred to as a wire) 7 such as a gold wire, Then, the semiconductor device is completed by resin-sealing with a resin 8 such as epoxy by a transfer molding method, and then molding the external lead 1 integrally formed with the internal lead 2 to form the external terminal 11B.

【0003】この樹脂封止型半導体装置では、半導体素
子搭載部3と内部リード2が絶縁フィルム5を介して接
着されているため、半導体素子6の発熱を半導体素子搭
載部3から内部リード2へ効果的に逃がすことができ、
消費電力2ワット程度の半導体素子の搭載を可能にして
いた。
In this resin-encapsulated semiconductor device, the semiconductor element mounting portion 3 and the internal lead 2 are adhered to each other via the insulating film 5, so that the heat generated in the semiconductor element 6 is transferred from the semiconductor element mounting portion 3 to the internal lead 2. Can be effectively released,
It enabled the mounting of semiconductor devices with power consumption of about 2 watts.

【0004】[0004]

【発明が解決しようとする課題】この従来の樹脂封止型
半導体装置では、リードフレームの厚さを、外部リード
の強度を考慮して、0.15mmあるいは0.125m
mのものを通常用いているが、半導体素子の小型化に伴
い、内部リード先端を半導体素子側に近づける際、現状
のリードフレームの加工技術から言って、内部リード先
端のピッチは0.2mm程度が限界である。このため、
半導体素子の小型化が進むにつれ、半導体素子と内部リ
ードとを結ぶワイヤーを長尺化せねばならないため、樹
脂封止の際、ワイヤーが変形しやすく、ワイヤーショー
ト等の不良が発生しやすいという問題点があった。
In this conventional resin-sealed semiconductor device, the thickness of the lead frame is set to 0.15 mm or 0.125 m in consideration of the strength of the external leads.
m is usually used, but the pitch of the inner lead tips is about 0.2 mm when the inner lead tips are moved closer to the semiconductor element side due to the miniaturization of the semiconductor element, from the current lead frame processing technology. Is the limit. For this reason,
As miniaturization of semiconductor elements progresses, the wire connecting the semiconductor element and the internal lead has to be lengthened, so that the wire is easily deformed during resin encapsulation and defects such as wire shorts are likely to occur. There was a point.

【0005】[0005]

【課題を解決するための手段】本発明の樹脂封止型半導
体装置は、絶縁フィルム上に固着された半導体素子と、
この半導体素子の周囲に設けられた板厚の薄い内部リー
ドと、この内部リードに接続された板厚の厚い外部リー
ドと、前記内部リードと前記半導体素子とを接続するワ
イヤーと、前記半導体素子と前記ワイヤーと前記内部リ
ードと前記外部リードの一部とを封止する樹脂とを含む
ものである。
A resin-sealed semiconductor device according to the present invention comprises a semiconductor element fixed on an insulating film,
A thin inner lead provided around the semiconductor element, a thick outer lead connected to the inner lead, a wire connecting the inner lead and the semiconductor element, and the semiconductor element The resin includes a resin that seals the wire, the inner lead, and a part of the outer lead.

【0006】[0006]

【実施例】次に本発明について図面を参照して説明す
る。図1(a),(b)は本発明の第1の実施例の樹脂
封止型半導体装置の平面図及び断面図であり、平面図は
樹脂を除いて示してある。
The present invention will be described below with reference to the drawings. 1A and 1B are a plan view and a sectional view of a resin-encapsulated semiconductor device according to a first embodiment of the present invention, in which the plan view is shown without a resin.

【0007】図1(a),(b)において樹脂封止型半
導体装置は、絶縁フィルム5に固着された半導体素子6
と、この半導体素子6の周囲に設けられた板厚の薄い内
部リード9と、この内部リード9と接合部12で接続さ
れた板厚の厚い外部リード10と、半導体素子6と内部
リード9とを接続するワイヤー7と、半導体素子6等を
封止するポリイミド等の樹脂8とから主に構成される。
以下製造方法と共に説明する。
In FIGS. 1A and 1B, the resin-encapsulated semiconductor device has a semiconductor element 6 fixed to an insulating film 5.
A thin inner lead 9 provided around the semiconductor element 6, a thick outer lead 10 connected to the inner lead 9 at a joint portion 12, the semiconductor element 6 and the inner lead 9. It is mainly composed of a wire 7 for connecting the above and a resin 8 such as polyimide for sealing the semiconductor element 6 and the like.
The manufacturing method will be described below.

【0008】内部リード9と外部リード10との接合の
方法は、内部リード9と外部リード10の接合部12に
あらかじめ金メッキ等を施しておき、熱圧着により接合
する。あるいは、これを半田等で接合してもよい。こう
して、接合された内部リード9にはあらかじめ、両面に
接着剤4を有すポリイミド等の絶縁フィルム5が接着さ
れており、この絶縁フィルム5上には半導体素子6が搭
載され、ワイヤー7により内部リード9と電気的に接続
した後、トランスファーモールド法により、エポキシ樹
脂等で樹脂封止する。その後外部リード10を成型して
外部端子11を形成する。
As a method of joining the inner lead 9 and the outer lead 10, the joining portion 12 of the inner lead 9 and the outer lead 10 is previously plated with gold or the like and joined by thermocompression bonding. Alternatively, this may be joined with solder or the like. Insulating films 5 made of polyimide or the like having an adhesive 4 on both sides are previously adhered to the joined inner leads 9 in this manner. The semiconductor elements 6 are mounted on the insulating films 5, and the wires 7 are used to After being electrically connected to the lead 9, it is resin-molded with an epoxy resin or the like by a transfer molding method. After that, the external leads 10 are molded to form the external terminals 11.

【0009】一般に、リードフレームのエッチング加工
では、通常、板厚の80%程度までリード間のすきまを
加工できるが、本第1の実施例では、外部リード10に
比べて、内部リード9の板厚を薄くしているため、例え
ば内部リードの板厚を0.075mm,外部リードを
0.15mmとすると、内部リードのリード間のすきま
は約60μmに加工できるため、内部リードの先端ピッ
チはリード幅を90μmとした場合、約0.15mmピ
ッチまで加工でき、内部リードの先端を従来例に比べて
半導体素子側へ近づけることが可能になり、ワイヤーを
長尺化するこなしに、半導体素子の小型化に対応するこ
とができる。さらに、半導体素子6を絶縁フィルム5を
介して、内部リード9上に搭載しているため、半導体素
子6からの発熱が内部リード9を通って、外部リード1
0へ逃げるため、従来例並みの熱放散性を有する半導体
装置が実現可能となっている。
Generally, in the lead frame etching process, the clearance between the leads can be usually processed up to about 80% of the plate thickness, but in the first embodiment, the plate of the inner lead 9 is larger than that of the outer lead 10. Since the thickness of the inner lead is thin, for example, if the thickness of the inner lead is 0.075 mm and the outer lead is 0.15 mm, the clearance between the inner leads can be processed to about 60 μm. If the width is 90 μm, it can be processed up to about 0.15 mm pitch, and the tips of the internal leads can be brought closer to the semiconductor element side compared to the conventional example, and the size of the semiconductor element can be reduced without lengthening the wire. It is possible to deal with Further, since the semiconductor element 6 is mounted on the internal lead 9 via the insulating film 5, heat generated from the semiconductor element 6 passes through the internal lead 9 and the external lead 1
Since it escapes to 0, it is possible to realize a semiconductor device having a heat dissipation property similar to the conventional example.

【0010】図2(a),(b)は本発明の第2の実施
例の樹脂封止型半導体装置の平面図及び断面図である。
2A and 2B are a plan view and a sectional view of a resin-sealed semiconductor device according to a second embodiment of the present invention.

【0011】この第2の実施例では、第1の実施例と同
様、内部リード9Aと外部リード10Aを接合部12で
接合し、更に両面に接着剤4を有する絶縁フィルム5A
を、内部リード9Aと外部リード10Aの接合部12と
は反対の面の内部リード9A上に接着した構造になって
いる。この絶縁フィルム5Aの内部リード9Aとの接着
面の反対側は、アルミ等で形成された放熱板13と接着
され、この放熱板13の端の部分は、前述した両面に接
着剤4を有する別の絶縁フィルム5Aを介して、外部リ
ード10Aと接着されている。さらに、この放熱板13
の絶縁フィルム5Aとの接着面の裏面側は、半導体装置
の外表面に露出する様に樹脂8でトランスファーモール
ドされている。
In the second embodiment, as in the first embodiment, the inner lead 9A and the outer lead 10A are joined at the joining portion 12, and the insulating film 5A having the adhesive 4 on both sides is further provided.
Is bonded to the inner lead 9A on the surface opposite to the joint 12 between the inner lead 9A and the outer lead 10A. The opposite side of the insulating film 5A to the inner lead 9A is adhered to a heat dissipation plate 13 made of aluminum or the like. It is adhered to the external lead 10A through the insulating film 5A. Furthermore, this heat sink 13
The back surface side of the adhesive surface of the insulating film 5 </ b> A is transfer molded with resin 8 so as to be exposed on the outer surface of the semiconductor device.

【0012】本第2の実施例では半導体素子6からの発
熱が、絶縁フィルム5Aを通って放熱板13へ逃げ、さ
らに外部リード10Aへ伝わって半導体装置の外部へ逃
げるだけでなく、放熱板13が露出しているため、直接
放熱板13から外部へ熱を逃がすことができるため、第
1の実施例よりさらに熱放散性の高い半導体装置の実現
が可能になっている。
In the second embodiment, the heat generated from the semiconductor element 6 not only escapes to the heat dissipation plate 13 through the insulating film 5A and further propagates to the external lead 10A to escape to the outside of the semiconductor device. Since it is exposed, heat can be directly radiated from the heat dissipation plate 13 to the outside, so that it is possible to realize a semiconductor device having higher heat dissipation than the first embodiment.

【0013】[0013]

【発明の効果】以上説明したように本発明は、内部リー
ドを外部リードより板厚を薄くして形成することによ
り、内部リード先端のピッチを小さくすることができ、
半導体素子の小型化が進んでもボンディングワイヤーを
長尺化せずに対応することが可能になる。また、半導体
素子と内部リード、あるいは半導体素子と放熱板を絶縁
フィルムを介して接合してあるため、半導体素子の発熱
を効果的に外部に逃がすことができるという効果を有す
る。
As described above, according to the present invention, since the inner leads are formed to be thinner than the outer leads, the pitch of the tips of the inner leads can be reduced.
Even if the semiconductor element becomes smaller, it is possible to deal with it without making the bonding wire longer. Further, since the semiconductor element and the internal lead, or the semiconductor element and the heat sink are bonded via the insulating film, the heat generated by the semiconductor element can be effectively released to the outside.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の平面図及び断面図。FIG. 1 is a plan view and a sectional view of a first embodiment of the present invention.

【図2】本発明の第2の実施例の平面図及び断面図。FIG. 2 is a plan view and a sectional view of a second embodiment of the present invention.

【図3】従来例の平面図及び断面図。FIG. 3 is a plan view and a sectional view of a conventional example.

【符号の説明】[Explanation of symbols]

1 外部リード 2 内部リード 3 半導体素子搭載部 4 接着剤 5,5A 絶縁フィルム 6 半導体素子 7 ワイヤー 8 樹脂 9,9A 内部リード 10,10A 外部リード 11,11A,11B 外部端子 12 接合部 13 放熱板 1 External Lead 2 Internal Lead 3 Semiconductor Element Mounting Part 4 Adhesive 5,5A Insulating Film 6 Semiconductor Element 7 Wire 8 Resin 9,9A Internal Lead 10,10A External Lead 11,11A, 11B External Terminal 12 Bonding Part 13 Heat Sink

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 絶縁フィルム上に固着された半導体素子
と、この半導体素子の周囲に設けられた板厚の薄い内部
リードと、この内部リードに接続された板厚の厚い外部
リードと、前記内部リードと前記半導体素子とを接続す
るワイヤーと、前記半導体素子と前記ワイヤーと前記内
部リードと前記外部リードの一部とを封止する樹脂とを
含むことを特徴とする樹脂封止型半導体装置。
1. A semiconductor element fixed on an insulating film, a thin inner lead provided around the semiconductor element, a thick outer lead connected to the inner lead, and the inner portion. A resin-encapsulated semiconductor device, comprising: a wire connecting a lead and the semiconductor element; and a resin encapsulating the semiconductor element, the wire, the internal lead, and a part of the external lead.
【請求項2】 内部リードと外部リードの下部には放熱
板が固着されている請求項1記載の樹脂封止型半導体装
置。
2. The resin-encapsulated semiconductor device according to claim 1, wherein heat dissipation plates are fixed to the lower portions of the inner lead and the outer lead.
JP25403791A 1991-10-02 1991-10-02 Resin-sealed semiconductor device Pending JPH0595078A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25403791A JPH0595078A (en) 1991-10-02 1991-10-02 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25403791A JPH0595078A (en) 1991-10-02 1991-10-02 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPH0595078A true JPH0595078A (en) 1993-04-16

Family

ID=17259365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25403791A Pending JPH0595078A (en) 1991-10-02 1991-10-02 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPH0595078A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0878599A (en) * 1994-09-05 1996-03-22 Goto Seisakusho:Kk Integrated circuit package and manufacture thereof
JP2003243600A (en) * 2001-12-14 2003-08-29 Hitachi Ltd Semiconductor device and method of manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02168661A (en) * 1988-12-22 1990-06-28 Sumitomo Metal Mining Co Ltd Manufacture of composite lead frame
JPH03181157A (en) * 1989-12-11 1991-08-07 Sumitomo Metal Ind Ltd Connecting method for electric circuit member

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02168661A (en) * 1988-12-22 1990-06-28 Sumitomo Metal Mining Co Ltd Manufacture of composite lead frame
JPH03181157A (en) * 1989-12-11 1991-08-07 Sumitomo Metal Ind Ltd Connecting method for electric circuit member

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0878599A (en) * 1994-09-05 1996-03-22 Goto Seisakusho:Kk Integrated circuit package and manufacture thereof
JP2003243600A (en) * 2001-12-14 2003-08-29 Hitachi Ltd Semiconductor device and method of manufacturing the same

Similar Documents

Publication Publication Date Title
JP2547697B2 (en) Method for making a multilayer leadframe assembly and multilayer integrated circuit die package
JP2001024135A (en) Manufacture of semiconductor device
JPH07321252A (en) Resin-sealed type semiconductor device
KR0178623B1 (en) Semiconductor device
JPH09312375A (en) Lead frame, semiconductor device and manufacture thereof
JP2001274316A (en) Semiconductor device and its manufacturing method
JPH0444347A (en) Semiconductor device
US5382546A (en) Semiconductor device and method of fabricating same, as well as lead frame used therein and method of fabricating same
JP3532693B2 (en) Semiconductor device
KR100366111B1 (en) Structure of Resin Sealed Semiconductor Device
JP2000114426A (en) Single-sided resin sealing type semiconductor device
JPH0595078A (en) Resin-sealed semiconductor device
JP3680812B2 (en) Manufacturing method of resin-encapsulated semiconductor device
JP3454192B2 (en) Lead frame, resin-sealed semiconductor device using the same, and method of manufacturing the same
JPH10242337A (en) Resin sealed semiconductor device and manufacture thereof
JP2001267484A (en) Semiconductor device and manufacturing method thereof
JP3013810B2 (en) Method for manufacturing semiconductor device
JP3642545B2 (en) Resin-sealed semiconductor device
JP2001135767A (en) Semiconductor device and method of manufacturing the same
JP2002164496A (en) Semiconductor device and method for manufacturing the same
JPH11354673A (en) Semiconductor device
JPH11354706A (en) Lead frame, semiconductor device using the lead frame and its manufacture
JP3145892B2 (en) Resin-sealed semiconductor device
JPH1056122A (en) Surface mount semiconductor device, its manufacturing method and lead frame member used for the device
JP2927066B2 (en) Method for manufacturing resin-encapsulated semiconductor device

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 19970617