JP3642545B2 - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device Download PDF

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Publication number
JP3642545B2
JP3642545B2 JP12968497A JP12968497A JP3642545B2 JP 3642545 B2 JP3642545 B2 JP 3642545B2 JP 12968497 A JP12968497 A JP 12968497A JP 12968497 A JP12968497 A JP 12968497A JP 3642545 B2 JP3642545 B2 JP 3642545B2
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JP
Japan
Prior art keywords
resin
diffusion plate
heat
insulating layer
semiconductor device
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Expired - Fee Related
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JP12968497A
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JPH10321661A (en
Inventor
宏明 田中
靖久 萩原
一成 鈴木
隆文 西田
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Renesas Technology Corp
Hitachi Solutions Technology Ltd
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Renesas Technology Corp
Hitachi ULSI Systems Co Ltd
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Priority to JP12968497A priority Critical patent/JP3642545B2/en
Publication of JPH10321661A publication Critical patent/JPH10321661A/en
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    • HELECTRICITY
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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    • H01L2224/45099Material
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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  • Lead Frames For Integrated Circuits (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、熱拡散板(ヒートスプレッダ)を有する樹脂封止型半導体装置及びその製造に使用されるリードフレームに適用して有効な技術に関するものである。
【0002】
【従来の技術】
樹脂封止型半導体装置は、熱伝導性が低い樹脂封止体で半導体チップを封止しているので、半導体チップから発生した熱を樹脂封止体の外部に放出する放熱性が低い。一方、半導体チップから発生する発熱量は、それに載される回路システムの高性能化(高速化及び多機能化)による消費電力の増加によって年々増大している。このため、発熱量が大きい半導体チップを樹脂封止体で封止する樹脂封止型半導体装置においては、如何にして放熱性を高めるかが技術的な課題となっている。
【0003】
そこで、熱伝導性が高い金属材からなる熱拡散板を内蔵した樹脂封止型半導体装置が開発されている。この樹脂封止型半導体装置は、熱拡散板のチップ載面の中央領域上に半導体チップを載し、この半導体チップの外周囲の外側に複数本のインナーリードを配置している。複数本のインナーリードの夫々は、半導体チップの主面(素子形成面)に配置された複数個の外部端子(ボンディングパッド)の夫々にワイヤを介して電気的に接続されている。この複数本のインナーリードの夫々は、一部分が熱拡散板のチップ載面の周辺領域に絶縁層を介在して固定され、他部分が熱拡散板の周縁部からその外側に引き出されている。熱拡散板、半導体チップ、インナーリード及びワイヤ等は樹脂封止体で封止され、この樹脂封止体の外周囲の外側には複数本のアウターリードが配置されている。複数本のアウターリードの夫々は、樹脂封止体で封止された複数本のインナーリードの夫々と一体化されている。絶縁層は例えばポリイミド系の熱可塑性樹脂で形成され、樹脂封止体は例えばエポキシ系の熱硬化性樹脂で形成されている。熱拡散板、インナーリード及びアウターリードは、熱伝導性が高い金属材、例えば銅(Cu)材又は銅系の合金材で形成されている。
【0004】
このように構成された樹脂封止型半導体装置の場合、半導体チップから発生した熱は熱拡散板を経由してインナーリードに伝達され、インナーリードに伝達された熱はアウターリードに伝達されるので、半導体チップから発生した熱を樹脂封止体の外部に放出する放熱性が高い。
【0005】
なお、前述の熱拡散板を内蔵した樹脂封止型半導体装置については、例えば特開平7−169900号公報に記載されている。
【0006】
【発明が解決しようとする課題】
本発明者等は、前述の熱拡散板を内蔵した樹脂封止型半導体装置について検討した結果、以下の問題点を見出した。
【0007】
(1)前記樹脂封止型半導体装置において、インナーリードの一部分が熱拡散板のチップ載面の周辺領域に絶縁層を介在して固定され、インナーリードの他部分が熱拡散板の周縁部からその外側に引き出され、更に、絶縁層の周縁部が熱拡散板の周縁部上に位置しているので、絶縁層と樹脂封止体の樹脂との界面を介して熱拡散板、インナーリードの夫々を連結するパス経路が熱拡散板とインナーリードとの間に存在する。このようなパス経路が熱拡散板とインナーリードとの間に存在する場合、動作時において、熱拡散板とインナーリードとの間に生じる電界がパス経路に集中し、マイグレーションによるインナーリードの金属原子がパス経路に析出し、熱拡散板とインナーリードとの間で短絡が生じる。この現象は、熱拡散板と他のインナーリードとの間のパス経路においても同様に生じる。このため、インナーリードと他のインナーリードとが熱拡散板を介して短絡する場合があるので、樹脂封止型半導体装置の電気的信頼性が低下する。
【0008】
(2)前記樹脂封止型半導体装置において、半導体チップは、熱拡散板のチップ載面上に形成された絶縁層の表面に接着層を介在して固定されている。絶縁層は例えば熱可塑性樹脂で形成され、接着層は例えば熱硬化性樹脂で形成されている。このため、絶縁層及び接着層に含まれている水分が絶縁層と接着層との界面に溜り易く、樹脂封止型半導体装置の製品完成後の環境試験である温度サイクル試験時の熱や実装基板の実装面上に樹脂封止型半導体装置を実装する実装時の熱によって溜った水分が気化膨張し、樹脂封止体に亀裂が生じる場合があるので、樹脂封止型半導体装置の熱に対する信頼性が低下する。
【0009】
(3)前記樹脂封止型半導体装置において、熱拡散板のチップ搭載面と対向するその裏面は樹脂封止体の樹脂で被覆されている。このため、樹脂封止体の樹脂に含まれている水分が熱拡散板の裏面に溜り易く、樹脂封止型半導体装置の製品完成後の環境試験である温度サイクル試験時の熱や実装基板の実装面上に樹脂封止型半導体装置を実装する実装時の熱によって溜った水分が気化膨張し、樹脂封止体に亀裂が生じる場合があるので、樹脂封止型半導体装置の熱に対する信頼性が著しく低下する。
【0010】
本発明の目的は、熱拡散板を有する半導体装置の電気的信頼性を高めることが可能な技術を提供することにある。
【0011】
本発明の他の目的は、熱拡散板を有する半導体装置の熱に対する信頼性を高めることが可能な技術を提供することにある。
【0012】
本発明の前記ならびにその他の目的と新規な特徴は、本明細書の記述及び添付図面によって明らかになるであろう。
【0013】
【課題を解決するための手段】
本願において開示される発明のうち、代表的なものの概要を簡単に説明すれば、下記のとおりである。
【0014】
(1)熱拡散板と、前記熱拡散板に固定された半導体チップと、前記半導体チップの外部端子に電気的に接続され、一部分が前記熱拡散板に絶縁層を介在して固定され、他部分が前記熱拡散板の周縁部からその外側に引き出されたインナーリードと、前記熱拡散板、前記半導体チップ、前記インナーリードの夫々を封止する樹脂封止体とを有する樹脂封止型半導体装置であって、前記絶縁層の一部を前記熱拡散板の周縁部からその外側に引き出す。
【0015】
(2)熱拡散板と、前記熱拡散板に絶縁層を介在して固定された半導体チップと、前記半導体チップの外部端子に電気的に接続されたインナーリードと、前記熱拡散板、前記半導体チップ、前記インナーリードの夫々を封止する樹脂封止体とを有する樹脂封止型半導体装置であって、前記熱拡散板、前記絶縁層の夫々に貫通孔を形成し、この貫通孔を塞ぐように、前記絶縁層の表面に接着層を介在して前記半導体チップを固定する。
【0016】
上述した手段(1)によれば、絶縁層と樹脂封止体の樹脂との界面を通して熱拡散板、インナーリードの夫々を連結するパス経路が熱拡散板とインナーリードとの間の外側に位置し、このパス経路には熱拡散板とインナーリードとの間に生じる電界が集中しないので、インナーリードの金属原子がマイグレーションによって析出することはない。同様に、熱拡散板と他のインナーリードとの間のパス経路においても析出することはない。この結果、インナーリードと他のインナーリードとの熱拡散板を介した短絡を防止できるので、熱拡散板を有する樹脂封止型半導体装置の電気的信頼性を高めることができる。
【0017】
上述した手段(2)によれば、貫通孔の面積に相当する分、絶縁層と接着層との界面の面積を縮小することができるので、樹脂封止型半導体装置の製品完成後の環境試験である温度サイクル試験時の熱や実装基板の実装面上に樹脂封止型半導体装置を実装する実装時の熱によって絶縁層と接着層との界面に生じる水分の気化膨張を抑制し、樹脂封止体に生じる亀裂を抑制できる。この結果、熱拡散板を有する樹脂封止型半導体装置の熱に対する信頼性を高めることができる。
【0018】
また、貫通孔の面積に相当する分、接着層の量を節約することができる。
【0019】
また、貫通孔の面積に相当する分、熱拡散板のチップ載面と対向するその裏面と樹脂封止体の樹脂との界面の面積を縮小することができるので、樹脂封止型半導体装置の製品完成後の環境試験である温度サイクル試験時の熱や実装基板の実装面上に樹脂封止型半導体装置を実装する実装時の熱によって熱拡散板と樹脂封止体の樹脂との界面に生じる水分の気化膨張を抑制し、樹脂封止体に生じる亀裂を抑制できる。この結果、熱拡散板を有する樹脂封止型半導体装置の熱に対する信頼性を高めることができる。
【0020】
【発明の実施の形態】
以下、本発明の構成について、樹脂封止型半導体装置に本発明を適用した実施の形態とともに説明する。
【0021】
なお、実施の形態を説明するための全図において、同一機能を有するものは同一符号を付け、その繰り返しの説明は省略する。
【0022】
(実施形態1)
本発明の実施形態1である樹脂封止型半導体装置の概略構成を図1(樹脂封止体の上部を除去した状態の平面図)及び図2(図1に示すA−A線の位置で切った断面図)に示す。
【0023】
図1及び図2に示すように、樹脂封止型半導体装置は、熱拡散板1のチップ載面の中央領域上に半導体チップ4を載し、この半導体チップ4の外周囲の外側に複数本のリード6を配置している。複数本のリード6の夫々は、インナーリード6A及びこのインナーリード6Aと一体化されたアウターリード6Bで構成されている。
【0024】
前記半導体チップ4は、例えば平面が方形状で形成された単結晶珪素基板を主体に構成されている。半導体チップ4には、例えば論理回路システム、或は論理回路と記憶回路との混合回路システムが載されている。また、半導体チップ4の主面(素子形成面)には複数個の外部端子4Aが配置されている。複数個の外部端子4Aの夫々は、半導体チップ4の各辺に沿って配列され、半導体チップ4に載された回路システムに電気的に接続されている。
【0025】
前記複数本のインナーリード6Aの夫々は、半導体チップ4の各辺に沿って配列され、半導体チップ4の主面に配置された複数個の外部端子4Aの夫々とワイヤ7を介して電気的に接続されている。ワイヤ7としては、例えば金(Au)ワイヤを使用する。また、ワイヤ7としては、アルミニウム(Al)ワイヤ、銅(Cu)ワイヤ、又は金属ワイヤの表面に絶縁性樹脂を被覆した被覆ワイヤを使用してもよい。ワイヤ7は、例えば熱圧着に超音波振動を併用したボンディング法によりボンディングされる。
【0026】
前記熱拡散板1は例えば平面が方形状で形成されている。この熱拡散板1は、熱伝導率が高い金属材、例えば銅(Cu)材又は銅系の合金材で形成されている。
【0027】
前記熱拡散板1、半導体チップ4、インナーリード6A及びワイヤ7等は樹脂封止体8で封止されている。樹脂封止体8は、低応力化を図る目的として、例えば、フェノール系硬化剤、シリコーンゴム及びフィラー等が添加されたビフェニール系の樹脂で形成されている。この樹脂封止体8は例えばトランスファモールド法で形成される。
【0028】
前記樹脂封止体8は例えば平面が方形状で形成されている。この樹脂封止体8の各辺の外側には、複数本のアウターリード6Bが配置されている。複数本のアウターリード6Bの夫々は、樹脂封止体8の各辺に沿って配列され、例えばガルウィング形状に成形されている。即ち、本実施形態の樹脂封止型半導体装置は、多ピン化に好適なQFP(uad lat ackage)構造で構成されている。
【0029】
前記複数本のアウターリード6Bのうち、動作電位用アウターリード6Bには外部から動作電位(例えば5[V]電位)が印加され、基準電位用アウターリード6Bには外部から基準電位(例えば0[V]電位)が印加され、入力信号用アウターリード6Bには外部から入力信号が印加され、出力信号用アウターリード6Bには半導体チップ4に載された回路システムから出力信号が印加される。
【0030】
前記熱拡散板1のチップ載面は、これに限定されないが、図3(図2の要部断面図)に示すように、絶縁層2で被覆されている。絶縁層2は例えばポリイミド系の熱硬化性樹脂で形成されている。
【0031】
前記熱拡散板1、絶縁層2の夫々の中央領域には貫通孔3が形成され、この貫通孔3を塞ぐように、絶縁層2の表面に接着層5を介在して半導体チップ4が接着固定されている。接着層5は例えばエポキシ系の熱硬化性樹脂で形成されている。貫通孔3は、図4(熱拡散板の平面図)に示すように、半導体チップ4の平面サイズ4Bよりも小さい平面サイズで形成され、その平面形状は例えば円形状で形成されている。このように、熱拡散板1、絶縁層2の夫々に貫通孔3を形成し、この貫通孔3を塞ぐように、絶縁層2の表面に接着層5を介在して半導体チップ4を接着固定することにより、貫通孔3の面積に相当する分、絶縁層2と接着層5との界面の面積を縮小することができる。また、貫通孔3の面積に相当する分、熱拡散板1のチップ載面1Aと対向するその裏面1Bと樹脂封止体8の樹脂との界面の面積を縮小することができる。
【0032】
前記複数本のインナーリード6Aの夫々は、図5(図2の要部拡大断面図)に示すように、一部分が熱拡散板1のチップ載面1Aの周辺領域に絶縁層2を介在して固定され、他部分が熱拡散板1の周縁部1Cからその外側に引き出されている。つまり、インナーリード6Aは、半導体チップ4と同一の平面上に位置している。
【0033】
前記絶縁層2の一部2Aは、熱拡散板1の周縁部1Cからその外側に引き出され、熱拡散板1の周縁部1Cは、なだらかな形状になっている。本実施形態の絶縁層2の一部2Aは熱拡散板1の側面を覆うように引き出されている。このように、絶縁層2の一部2Aを熱拡散板1の周縁部1Cからその外側に引き出すことにより、絶縁層2と樹脂封止体8の樹脂との界面を介して熱拡散板1、インナーリード6Aの夫々を連結するパス経路が熱拡散板1とインナーリード6Aとの間の外側に位置し、動作時において、このパス経路には熱拡散板1とインナーリード6Aとの間に生じる電界が集中しないので、インナーリード6Aの金属原子がマイグレーションによって析出することはない。
【0034】
前記熱拡散板1は、インナーリード6Aの厚さに比べて薄い厚さで形成されている。熱拡散板1は例えば0.1[mm]程度の厚さで形成され、インナーリード6Aは例えば0.15[mm]程度の厚さで形成されている。
【0035】
前記半導体チップ4の裏面のうち、貫通孔3と対向する領域は、貫通孔3内に充填された樹脂封止体8の樹脂で被覆されている。半導体チップ4の裏面はゲッタリング効果を高める目的として、熱拡散板1の裏面に比べて粗くなっているので、樹脂封止体8の樹脂との密着力が熱拡散板1の裏面に比べて高い。
【0036】
次に、前記樹脂封止型半導体装置の製造に使用されるリードフレームについて、図6(要部平面図)を用いて説明する。
【0037】
図6に示すように、リードフレームL1は、枠体6Dで規定された領域内に、複数本のリード6及び熱拡散板1を配置している。複数本のリード6の夫々は、枠体6Dに一体化され、タイバー6Dを介して互いに連結されている。また、複数本のリード6の夫々はインナーリード6A及びこのインナーリード6Aに一体化されたアウターリード6Bとで構成されている。熱拡散板1は複数本のインナーリード6Aの夫々に貼り付けられている。
【0038】
前記リードフレームL1は、熱伝導性が高い金属材、例えば銅(Cu)材又は銅系の合金材からなる金属板にエッチング加工又はプレス加工を施し、所定のリードパターンを形成した後、インナーリード6Aに熱拡散板1を貼り付けることにより形成される。
【0039】
図7(図6に示すB−B線の位置で切った要部断面図)に示すように、前記熱拡散板1のチップ載面1Aは、これに限定されないが、例えばポリイミド系の熱可塑性樹脂からなる絶縁層2で被覆されている。熱拡散板1、絶縁層2の夫々の中央領域、即ち半導体チップ4が固定される領域には貫通孔3が形成されている。貫通孔3は、半導体チップ4の平面サイズよりも小さい平面サイズで形成され、その平面形状は例えば円形状で形成されている。
【0040】
前記複数本のインナーリード6Aの夫々は、一部分が熱拡散板1のチップ載面1Aの周辺領域に絶縁層2を介在して固定され、他部分が熱拡散板1の周縁部1Cからその外側に引き出されている。絶縁層2の一部2Aは、熱拡散板1の周縁部1Cからその外側に引き出され、熱拡散板1の周縁部1Cは、なだらかな形状になっている。本実施形態の絶縁層2の一部2Aは、熱拡散板1の側面を覆うように引き出されている。
【0041】
前記熱拡散板1は、チップ載面が絶縁層2で被覆された金属板にプレス加工を施すことにより形成される。このプレス加工時に貫通孔3も同時に形成される。また、プレス加工の速度を調整することにより、熱拡散板1の側面を覆うように、熱拡散板1の周縁部1Cからその外側に絶縁層2の一部2Aを引き出すことができ、更に、熱拡散板1の周縁部1Cをなだらかな形状にすることができる。
【0042】
このように構成された樹脂封止型半導体装置の場合、半導体チップ4から発生した熱は熱拡散板1を経由してインナーリード6Aに伝達され、インナーリード6Aに伝達された熱はアウターリード6Bに伝達されるので、半導体チップ4から発生した熱を樹脂封止体8の外部に放出する放熱性が高い。
【0043】
次に、前記樹脂封止型半導体装置の製造方法について、図8(製造方法を説明するための断面図)を用いて説明する。
【0044】
まず、図6に示すリードフレームL1を準備する。
【0045】
次に、図8(A)に示すように、前記リードフレームL1の熱拡散板1をヒートステージ10に装着し、熱拡散板1の中央領域上の絶縁層2の表面に例えばエポキシ系の熱硬化樹脂からなる接着層5を介在して半導体チップ4を接着固定する。半導体チップ4の接着固定は、絶縁層2の表面に例えば多点塗布法で接着層5を塗布し、その後、絶縁層2の表面に貫通孔3を塞ぐように半導体チップ4を熱圧着することにより行なわれる。この工程において、熱拡散板1、絶縁層2の夫々の中央領域、即ち半導体チップ4が固定される領域に貫通孔3が形成されているので、接着層5の塗布量を節約することができる。
【0046】
次に、図8(B)に示すように、前記熱拡散板1をヒートステージ11に装着し、インナーリード6Aをウインドクランパ12で押圧固定した後、半導体チップ4の外部端子4Aとインナーリード6Aとをワイヤ7で電気的に接続する。ワイヤ7の接続は、ヒートステージ11で熱拡散板1を加熱した状態にて行なわれる。この工程において、インナーリード6Aの一部分が熱拡散板1を介在してヒートステージ11に支持され、インナーリード6Aの他部分がヒートステージ11から離間された状態で、インナーリード6Aの他部分がウインドクランパ12で押圧されるため、熱拡散板1の周縁部1Cにウインドクランパ12の押圧力が集中するが、熱拡散板1の周縁部1Cの形状がなだらかな形状になっているため、熱拡散板1の周縁部1Cにおける絶縁層2の膜ぎれを防止できる。特に、絶縁層2を熱可塑性樹脂で形成した場合、絶縁層2は熱によって軟らかくなるので、熱拡散板1の周縁部1Cをなだらかな形状にすることは効果が大きい。また、ウインドクランパ12の押圧力によってインナーリード6Aに反りや変形が生じても、熱拡散板1の周縁部1Cからその外側に絶縁層2の一部2Aが引き出されているので、熱拡散板1の周縁部1Cとインナーリード6Aとの短絡を防止できる。特に、絶縁層2を熱可塑性樹脂で形成した場合、絶縁層2は熱によって軟らかくなるので、熱拡散板1の周縁部1Cからその外側に絶縁層2の一部2Aを引き出すことは効果が大きい。
【0047】
次に、図8(B)に示すように、前記熱拡散板1、半導体チップ4、インナーリード6A及びワイヤ7等を樹脂封止体1で封止する。樹脂封止体1はトランスファモールド法で形成される。
【0048】
次に、前記リードフレームL1の枠体6Dからアウターリード6Bを切断すると共に、タイバー6Cを切断し、その後、アウターリード6Bをガルウィング形状に成形することにより、図1、図2に示す樹脂封止型半導体装置がほぼ完成する。
【0049】
この後、樹脂封止型半導体装置は、製品完成後の環境試験である温度サイクル試験が施され、製品として出荷される。製品として出荷された樹脂封止型半導体装置は実装基板の実装面上に実装される。
【0050】
このように、本実施形態によれば、以下の効果が得られる。
【0051】
(1)絶縁層2の一部を熱拡散板1の周縁部1Cからその外側に引き出すことにより、絶縁層2と樹脂封止体8の樹脂との界面を通して熱拡散板1、インナーリード6Aの夫々を連結するパス経路が熱拡散板1とインナーリード6Aとの間の外側に位置し、動作時において、このパス経路には熱拡散板1とインナーリード6Aとの間に生じる電界が集中しないので、インナーリード6Aの金属原子がマイグレーションによって析出することはない。同様に、熱拡散板1と他のインナーリード6Aとの間のパス経路においても析出することはない。この結果、インナーリード6Aと他のインナーリード6Aとの熱拡散板1を介した短絡を防止できるので、熱拡散板1を有する樹脂封止型半導体装置の電気的信頼性を高めることができる。
【0052】
また、ワイヤボンディング工程において、ウインドクランパ12の押圧力によってインナーリード6Aに反りや変形が生じても、熱拡散板1の周縁部1Cからその外側に絶縁層2の一部2Aが引き出されているので、熱拡散板1の周縁部1Cとインナーリード6Aとの短絡を防止できる。
【0053】
(2)熱拡散板1の周縁部1Cをなだらかな形成にすることにより、ワイヤボンディング工程において、熱拡散板1の周縁部1Cにウインドクランパ12の押圧力が集中しても、熱拡散板1の周縁部1Cの形状がなだらかな形状になっているため、熱拡散板1の周縁部1Cにおける絶縁層2の膜ぎれを防止できる。
【0054】
(3)熱拡散板1、絶縁層2の夫々に貫通孔3を形成し、この貫通孔3を塞ぐように、絶縁層2の表面に接着層5を介在して半導体チップ4を固定することにより、貫通孔3の面積に相当する分、絶縁層2と接着層5との界面の面積を縮小することができるので、樹脂封止型半導体装置の製品完成後の環境試験である温度サイクル試験時の熱や実装基板の実装面上に樹脂封止型半導体装置を実装する実装時の熱によって絶縁層2と接着層5との界面に生じる水分の気化膨張を抑制し、樹脂封止体8に生じる亀裂を抑制できる。この結果、熱拡散板1を有する樹脂封止型半導体装置の熱に対する信頼性を高めることができる。
【0055】
また、貫通孔3の面積に相当する分、接着層5の量を節約することができる。
【0056】
また、貫通孔3の面積に相当する分、熱拡散板1のチップ塔載面1Aと対向するその裏面1Bと樹脂封止体8の樹脂との界面の面積を縮小することができるので、樹脂封止型半導体装置の製品完成後の環境試験である温度サイクル試験時の熱や実装基板の実装面上に樹脂封止型半導体装置を実装する実装時の熱によって熱拡散板1と樹脂封止体8の樹脂との界面に生じる水分の気化膨張を抑制し、樹脂封止体に生じる亀裂を抑制できる。この結果、熱拡散板を有する樹脂封止型半導体装置の熱に対する信頼性を高めることができる。
【0057】
なお、本実施形態においては、絶縁層2の一部を熱拡散板1の側面に沿うように引き出した例について説明したが、図9(要断面図)に示すように、絶縁層2の一部をインナーリード6Aに沿うように引き出してもよい。この場合においても、前述の実施形態1と同様の効果が得られる。
【0058】
また、本実施形態においては、貫通孔3の平面形状を円形状で形成した例について説明したが、貫通孔3の平面形状を半導体チップ4の平面形状と相似する形状で形成してもよい。
【0059】
(実施形態2)
本発明の実施形態2である樹脂封止型半導体装置の概略構成を図10(樹脂封止体の上部を除去した状態の平面図)及び図11(図1に示すC−C線の位置で切った断面図)に示す。
【0060】
図10及び図11に示すように、樹脂封止型半導体装置は、熱拡散板1のチップ載面の中央領域上に半導体チップ4を載し、この半導体チップ4の外周囲の外側に複数本のリード6を配置している。複数本のリード6の夫々は、インナーリード6A及びこのインナーリード6Aと一体化されたアウターリード6Bで構成されている。
【0061】
前記複数本のインナーリード6Aの夫々は、半導体チップ4の各辺に沿って配列され、半導体チップ4の主面に配置された複数個の外部端子4Aの夫々とワイヤ7を介して電気的に接続されている。
【0062】
前記熱拡散板1は例えば平面が方形状で形成されている。この熱拡散板1は、熱伝導率が高い金属材、例えば銅(Cu)材又は銅系の合金材で形成されている。
【0063】
前記熱拡散板1、半導体チップ4、インナーリード6A及びワイヤ7等は樹脂封止体8で封止されている。樹脂封止体8は、低応力化を図る目的として、例えば、フェノール系硬化剤、シリコーンゴム及びフィラー等が添加されたエポキシ系の樹脂で形成されている。このエポキシ系の樹脂は熱拡散板1に対する密着力がビフェニール系の樹脂及びオルソクレゾールノボラックス系の樹脂に比べて低い。樹脂封止体8は例えばトランスファモールド法で形成される。
【0064】
前記熱拡散板1のチップ載面は、これに限定されないが、絶縁層2で被覆されている。絶縁層2は例えばポリイミド系の熱硬化性樹脂で形成されている。
【0065】
前記樹脂封止体8は例えば平面が方形状で形成されている。この樹脂封止体8の各辺の外側には、複数本のアウターリード6Bが配置されている。複数本のアウターリード6Bの夫々は、樹脂封止体8の各辺に沿って配列され、例えばガルウィング形状に成形されている。即ち、本実施形態の樹脂封止型半導体装置は、多ピン化に好適なQFP(uad lat ackage)構造で構成されている。
【0066】
前記半導体チップ4は、熱拡散板1のチップ載面の中央領域上の絶縁層2の表面に接着層5を介在して接着固定されている。接着層5は例えばエポキシ系の熱硬化性樹脂で形成されている。本実施形態は、熱拡散板1、接着層2の夫々に貫通孔3が形成されていない。
【0067】
前記熱拡散板1の裏面1Bには、その面を粗くする表面処理が施されている。この表面処理は、熱拡散板1の裏面に金属粒をメッキする無電界メッキ法によって行なわれている。このように、熱拡散板1の裏面1Bを粗くすることにより、熱拡散板1の裏面1Bと樹脂封止体8の樹脂との密着力(アンカー効果)を高めることができる。
【0068】
このように構成された樹脂封止型半導体装置は、図12(要部平面図)に示すリードフレームL2を用いた製造プロセスで形成される。
【0069】
前記樹脂封止型半導体装置において、熱拡散板1の裏面1Bの算術平均粗さRaと樹脂封止体8の樹脂(エポキシ系の樹脂)に対するピール強度との関係を図13に示す。熱拡散板1の裏面1Bの算術平均粗さが0.3[μm]の場合、ピール強度は0[g/cm]程度であり、熱拡散板1の裏面1Bの算術平均粗さが0.45[μm]の場合、ピール強度は200[g/cm]程度であり、熱拡散板1の裏面1Bの算術平均粗さが0.7[μm]の場合、ピール強度は220[g/cm]程度であった。すなわち、熱拡散板1の裏面1Bの算術平均粗さが0.45[μm]を堺にして急激にピール強度が低くなるので、熱拡散板1の裏面1Bの算術平均粗さを0.45[μm]以上に設定すれば、熱拡散板1の裏面1Bと樹脂封止体8の樹脂との密着力(アンカー効果)を高めることができるので、樹脂封止型半導体装置の製品完成後の環境試験である温度サイクル試験時の熱応力や実装基板の実装面上に樹脂封止型半導体装置を実装する実装時の熱応力によって熱拡散板1の裏面1Bと樹脂封止体8の樹脂との界面に生じる剥離を抑制することができる。この結果、熱拡散板1の裏面1Bと樹脂封止体8の樹脂との界面に樹脂封止体8の樹脂に含まれている水分が溜らなくなるので、溜った水分の気化膨張による樹脂封止体8の亀裂を防止でき、熱拡散板1を有する樹脂封止型半導体装置の熱に対する信頼性を高めることができる。
【0070】
なお、本実施形態においては、熱拡散板1の裏面1Bについて説明したが、同様に、熱拡散板1のチップ載面1Aを0.45[μm]以上の算術平均粗さに設定してもよい。この場合、熱拡散板1のチップ載面1Aと絶縁層2との密着力を高めることができる。
【0071】
また、本実施形態においては、熱拡散板1の表面1Aを絶縁層2で被覆した例につして説明したが、インナーリード6Aが固定される領域に絶縁層2を形成し、その他の領域は絶縁層2を形成しなくてもよい。この場合、熱拡散板1のチップ塔載面1Aのその他の領域と樹脂封止体8の樹脂とが接触するので、熱拡散板1のチップ塔載面1Aを0.45[μm]以上の算術平均粗さに設定することにより、熱拡散板1のチップ塔載面1Aと樹脂封止体8の樹脂との密着力を高めることができる。
【0072】
以上、本発明者によってなされた発明を、前記実施形態に基づき具体的に説明したが、本発明は、前記実施形態に限定されるものではなく、その要旨を逸脱しない範囲において種々変更可能であることは勿論である。
【0073】
【発明の効果】
本願において開示される発明のうち代表的なものによって得られる効果を簡単に説明すれば、下記のとおりである。
【0074】
本発明によれば、熱拡散板を有する樹脂封止型半導体装置の信頼性を高めることができる。
【0075】
また、本発明によれば、熱拡散板を有する樹脂封止型半導体装置の熱に対する信頼性を高めることができる。
【図面の簡単な説明】
【図1】本発明の実施形態1である樹脂封止型半導体装置の樹脂封止体の上部を除去した状態の平面図である。
【図2】図1に示すA−A線の位置で切った断面図である。
【図3】図2の要部拡大断面図である。
【図4】前記樹脂封止型半導体装置に内蔵された熱拡散板の平面図である。
【図5】図3の要部拡大断面図である。
【図6】前記樹脂封止型半導体装置の製造に使用されるリードフレームの要部平面図である。
【図7】図6に示すB−B線の位置で切った要部断面図である。
【図8】前記樹脂封止型半導体装置の製造方法を説明するための断面図である。
【図9】本発明の実施形態の変形例を示す樹脂封止型半導体装置の要部断面図である。
【図10】本発明の実施形態2である樹脂封止型半導体装置の樹脂封止体の上部を除去した状態の平面図である。
【図11】図9に示すC−C線の位置で切った要部拡大断面図である。
【図12】前記樹脂封止型半導体装置の製造で使用されるリードフレームの要部平面図である。
【図13】算術平均粗さとピール強度との相関図である。
【符号の説明】
1…熱拡散板、2…絶縁層、3…貫通孔、4…半導体チップ、4A…外部端子、5…接着層、L1,L2…リードフレーム、6…リード、6A…インナーリード、6B…アウターリード、6C…タイバー、6D…枠体、7…ワイヤ、8…樹脂封止体、10,11…ヒートスデージ、12…ウインドクランパ。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a resin-encapsulated semiconductor device having a heat diffusion plate (heat spreader) and a technology effective when applied to a lead frame used for manufacturing the same.
[0002]
[Prior art]
Since the resin-encapsulated semiconductor device encapsulates the semiconductor chip with a resin encapsulant having low thermal conductivity, the heat dissipation property for releasing the heat generated from the semiconductor chip to the outside of the resin encapsulant is low. On the other hand, the amount of heat generated from the semiconductor chip is Tower It is increasing year by year due to an increase in power consumption due to higher performance (higher speed and multi-functionality) of mounted circuit systems. For this reason, in a resin-encapsulated semiconductor device in which a semiconductor chip with a large amount of heat generation is encapsulated with a resin encapsulant, how to improve heat dissipation is a technical issue.
[0003]
Therefore, a resin-sealed semiconductor device having a built-in heat diffusion plate made of a metal material having high thermal conductivity has been developed. This resin-encapsulated semiconductor device is a thermal diffusion plate chip. Tower Semiconductor chip on the center area of the mounting surface Tower A plurality of inner leads are arranged outside the outer periphery of the semiconductor chip. Each of the plurality of inner leads is electrically connected to each of a plurality of external terminals (bonding pads) arranged on the main surface (element formation surface) of the semiconductor chip via wires. Each of the plurality of inner leads is partly a heat diffusion plate chip. Tower It is fixed to the peripheral area of the mounting surface with an insulating layer interposed therebetween, and the other part is drawn out from the peripheral edge of the heat diffusion plate. The heat diffusion plate, semiconductor chip, inner lead, wire, and the like are sealed with a resin sealing body, and a plurality of outer leads are arranged outside the outer periphery of the resin sealing body. Each of the plurality of outer leads is integrated with each of the plurality of inner leads sealed with a resin sealing body. The insulating layer is formed of, for example, a polyimide-based thermoplastic resin, and the resin sealing body is formed of, for example, an epoxy-based thermosetting resin. The heat diffusion plate, the inner lead, and the outer lead are formed of a metal material having high thermal conductivity, such as a copper (Cu) material or a copper-based alloy material.
[0004]
In the case of the resin-encapsulated semiconductor device configured as described above, the heat generated from the semiconductor chip is transmitted to the inner lead via the heat diffusion plate, and the heat transmitted to the inner lead is transmitted to the outer lead. The heat dissipation that releases heat generated from the semiconductor chip to the outside of the resin sealing body is high.
[0005]
The resin-sealed semiconductor device incorporating the above-described heat diffusion plate is described in, for example, Japanese Patent Application Laid-Open No. 7-169900.
[0006]
[Problems to be solved by the invention]
As a result of studying the resin-encapsulated semiconductor device incorporating the above-described heat diffusion plate, the present inventors have found the following problems.
[0007]
(1) In the resin-encapsulated semiconductor device, a part of the inner lead is a chip having a heat diffusion plate. Tower It is fixed to the peripheral area of the mounting surface with an insulating layer interposed therebetween, the other part of the inner lead is drawn out from the peripheral part of the heat diffusion plate, and the peripheral part of the insulating layer is on the peripheral part of the heat diffusion plate. Therefore, a path path for connecting the heat diffusion plate and the inner lead through the interface between the insulating layer and the resin of the resin sealing body exists between the heat diffusion plate and the inner lead. When such a path route exists between the thermal diffusion plate and the inner lead, during operation, the electric field generated between the thermal diffusion plate and the inner lead is concentrated on the path route, and the metal atoms of the inner lead due to migration Precipitates in the path and short-circuits between the heat diffusion plate and the inner lead. This phenomenon also occurs in the path route between the heat diffusing plate and other inner leads. For this reason, the inner lead and other inner leads may be short-circuited via the heat diffusion plate, so that the electrical reliability of the resin-encapsulated semiconductor device is lowered.
[0008]
(2) In the resin-encapsulated semiconductor device, the semiconductor chip is a heat diffusion plate chip. Tower The adhesive layer is fixed on the surface of the insulating layer formed on the mounting surface. The insulating layer is made of, for example, a thermoplastic resin, and the adhesive layer is made of, for example, a thermosetting resin. For this reason, moisture contained in the insulating layer and the adhesive layer easily accumulates at the interface between the insulating layer and the adhesive layer, and heat and mounting during the temperature cycle test, which is an environmental test after the product of the resin-encapsulated semiconductor device is completed. Moisture accumulated due to mounting heat when the resin-encapsulated semiconductor device is mounted on the mounting surface of the substrate is vaporized and expanded, and the resin-encapsulated body may be cracked. Reliability decreases.
[0009]
(3) In the resin-encapsulated semiconductor device, the back surface of the heat diffusion plate facing the chip mounting surface is covered with a resin encapsulating resin. For this reason, the moisture contained in the resin of the resin-sealed body tends to accumulate on the back surface of the heat diffusion plate, and heat during the temperature cycle test, which is an environmental test after the completion of the product of the resin-sealed semiconductor device, The resin-encapsulated semiconductor device is mounted on the mounting surface, and the moisture accumulated during mounting is vaporized and expanded, and the resin-encapsulated body may be cracked. Is significantly reduced.
[0010]
An object of the present invention is to provide a technique capable of enhancing the electrical reliability of a semiconductor device having a thermal diffusion plate.
[0011]
Another object of the present invention is to provide a technique capable of enhancing the reliability of a semiconductor device having a heat diffusion plate with respect to heat.
[0012]
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.
[0013]
[Means for Solving the Problems]
Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.
[0014]
(1) A heat diffusion plate, a semiconductor chip fixed to the heat diffusion plate, and electrically connected to an external terminal of the semiconductor chip, and a part is fixed to the heat diffusion plate with an insulating layer interposed therebetween, A resin-encapsulated semiconductor having an inner lead whose part is drawn out from the peripheral edge of the heat diffusion plate and a resin sealing body that seals each of the heat diffusion plate, the semiconductor chip, and the inner lead In the apparatus, a part of the insulating layer is pulled out from the peripheral edge of the heat diffusion plate.
[0015]
(2) a thermal diffusion plate, a semiconductor chip fixed to the thermal diffusion plate with an insulating layer interposed therebetween, an inner lead electrically connected to an external terminal of the semiconductor chip, the thermal diffusion plate, and the semiconductor A resin-encapsulated semiconductor device having a chip and a resin encapsulant for encapsulating each of the inner leads, wherein a through-hole is formed in each of the thermal diffusion plate and the insulating layer, and the through-hole is blocked. Thus, the semiconductor chip is fixed with an adhesive layer interposed on the surface of the insulating layer.
[0016]
According to the above-mentioned means (1), the path route connecting the heat diffusion plate and the inner lead through the interface between the insulating layer and the resin of the resin sealing body is located outside the heat diffusion plate and the inner lead. In addition, since the electric field generated between the heat diffusion plate and the inner lead is not concentrated on this path route, the metal atoms of the inner lead are not deposited by migration. Similarly, no precipitation occurs in the path path between the heat diffusion plate and the other inner leads. As a result, a short circuit between the inner lead and the other inner lead via the heat diffusion plate can be prevented, so that the electrical reliability of the resin-encapsulated semiconductor device having the heat diffusion plate can be improved.
[0017]
According to the above means (2), the area of the interface between the insulating layer and the adhesive layer can be reduced by an amount corresponding to the area of the through hole. This suppresses the vaporization and expansion of moisture generated at the interface between the insulating layer and the adhesive layer due to the heat during the temperature cycle test and the heat during the mounting of the resin-encapsulated semiconductor device on the mounting surface of the mounting substrate. Cracks generated in the stationary body can be suppressed. As a result, the reliability with respect to heat of the resin-encapsulated semiconductor device having the heat diffusion plate can be enhanced.
[0018]
Further, the amount of the adhesive layer can be saved by the amount corresponding to the area of the through hole.
[0019]
In addition, the heat diffusion plate chip is equivalent to the area of the through hole. Tower Since the area of the interface between the back surface facing the mounting surface and the resin of the resin encapsulant can be reduced, heat and mounting during the temperature cycle test, which is an environmental test after the product of the resin-encapsulated semiconductor device is completed Cracks that occur in the resin encapsulant that suppresses the vaporization and expansion of moisture that occurs at the interface between the thermal diffusion plate and the resin in the resin encapsulant due to the heat at the time of mounting the resin-encapsulated semiconductor device on the mounting surface of the substrate Can be suppressed. As a result, the reliability with respect to heat of the resin-encapsulated semiconductor device having the heat diffusion plate can be enhanced.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the configuration of the present invention will be described together with an embodiment in which the present invention is applied to a resin-encapsulated semiconductor device.
[0021]
Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.
[0022]
(Embodiment 1)
A schematic configuration of a resin-encapsulated semiconductor device according to a first embodiment of the present invention is shown in FIG. 1 (a plan view in a state where an upper portion of a resin-encapsulated body is removed) and FIG. 2 (a line AA shown in FIG. 1). It is shown in the cut sectional view).
[0023]
As shown in FIGS. 1 and 2, the resin-encapsulated semiconductor device is a chip of a thermal diffusion plate 1. Tower The semiconductor chip 4 is placed on the center area of the mounting surface. Tower A plurality of leads 6 are arranged outside the outer periphery of the semiconductor chip 4. Each of the multiple leads 6 includes an inner lead 6A and an outer lead 6B integrated with the inner lead 6A.
[0024]
The semiconductor chip 4 is mainly composed of, for example, a single crystal silicon substrate whose plane is formed in a square shape. The semiconductor chip 4 includes, for example, a logic circuit system or a mixed circuit system of a logic circuit and a memory circuit. Tower It is listed. A plurality of external terminals 4 </ b> A are disposed on the main surface (element formation surface) of the semiconductor chip 4. Each of the plurality of external terminals 4 </ b> A is arranged along each side of the semiconductor chip 4. Tower It is electrically connected to the mounted circuit system.
[0025]
Each of the plurality of inner leads 6 </ b> A is arranged along each side of the semiconductor chip 4, and is electrically connected to each of the plurality of external terminals 4 </ b> A disposed on the main surface of the semiconductor chip 4 via the wires 7. It is connected. For example, a gold (Au) wire is used as the wire 7. As the wire 7, an aluminum (Al) wire, a copper (Cu) wire, or a coated wire obtained by coating an insulating resin on the surface of a metal wire may be used. The wire 7 is bonded by, for example, a bonding method in which ultrasonic vibration is used in combination with thermocompression bonding.
[0026]
The heat diffusing plate 1 has, for example, a rectangular plane. The heat diffusion plate 1 is made of a metal material having a high thermal conductivity, such as a copper (Cu) material or a copper-based alloy material.
[0027]
The thermal diffusion plate 1, the semiconductor chip 4, the inner leads 6 </ b> A, the wires 7, etc. are sealed with a resin sealing body 8. For the purpose of reducing the stress, the resin sealing body 8 is formed of, for example, a biphenyl resin to which a phenolic curing agent, silicone rubber, filler, and the like are added. The resin sealing body 8 is formed by, for example, a transfer mold method.
[0028]
The resin sealing body 8 is formed, for example, in a rectangular plane. A plurality of outer leads 6 </ b> B are arranged outside each side of the resin sealing body 8. Each of the plurality of outer leads 6B is arranged along each side of the resin sealing body 8, and is formed into a gull wing shape, for example. That is, the resin-encapsulated semiconductor device according to the present embodiment has a QFP ( Q uad F lat P ackage) structure.
[0029]
Among the plurality of outer leads 6B, an operating potential (for example, 5 [V] potential) is applied to the operating potential outer lead 6B from the outside, and a reference potential (for example, 0 [for example, 0 [V]) is applied to the reference potential outer lead 6B. V] potential), an input signal is externally applied to the input signal outer lead 6B, and the output signal outer lead 6B is applied to the semiconductor chip 4. Tower An output signal is applied from the mounted circuit system.
[0030]
Chip of the heat diffusion plate 1 Tower The mounting surface is not limited to this, but is covered with an insulating layer 2 as shown in FIG. The insulating layer 2 is made of, for example, a polyimide thermosetting resin.
[0031]
A through hole 3 is formed in the central region of each of the heat diffusion plate 1 and the insulating layer 2, and the semiconductor chip 4 is bonded to the surface of the insulating layer 2 with an adhesive layer 5 interposed so as to close the through hole 3. It is fixed. The adhesive layer 5 is made of, for example, an epoxy thermosetting resin. As shown in FIG. 4 (plan view of the heat diffusing plate), the through hole 3 is formed with a plane size smaller than the plane size 4B of the semiconductor chip 4, and the plane shape is, for example, circular. Thus, through holes 3 are formed in each of the heat diffusion plate 1 and the insulating layer 2, and the semiconductor chip 4 is bonded and fixed to the surface of the insulating layer 2 via the adhesive layer 5 so as to close the through holes 3. By doing so, the area of the interface between the insulating layer 2 and the adhesive layer 5 can be reduced by an amount corresponding to the area of the through hole 3. Further, the chip of the heat diffusion plate 1 is equivalent to the area of the through hole 3. Tower The area of the interface between the back surface 1B facing the mounting surface 1A and the resin of the resin sealing body 8 can be reduced.
[0032]
As shown in FIG. 5 (enlarged cross-sectional view of the main part of FIG. 2), each of the plurality of inner leads 6A has a part of the chip of the heat diffusing plate 1. Tower The insulating layer 2 is fixed to the peripheral area of the mounting surface 1A, and the other part is drawn out from the peripheral edge 1C of the heat diffusion plate 1 to the outside. That is, the inner lead 6 </ b> A is located on the same plane as the semiconductor chip 4.
[0033]
A part 2A of the insulating layer 2 is drawn to the outside from the peripheral edge 1C of the heat diffusing plate 1, and the peripheral edge 1C of the heat diffusing plate 1 has a gentle shape. A part 2 </ b> A of the insulating layer 2 of the present embodiment is drawn out so as to cover the side surface of the heat diffusion plate 1. In this way, by pulling out a part 2A of the insulating layer 2 from the peripheral portion 1C of the thermal diffusion plate 1 to the outside thereof, the thermal diffusion plate 1 through the interface between the insulating layer 2 and the resin of the resin sealing body 8, A path path connecting each of the inner leads 6A is located outside between the heat diffusion plate 1 and the inner lead 6A, and during operation, this path path is generated between the heat diffusion plate 1 and the inner lead 6A. Since the electric field is not concentrated, the metal atoms of the inner lead 6A are not deposited by migration.
[0034]
The heat diffusion plate 1 is formed with a thickness smaller than the thickness of the inner lead 6A. The heat diffusion plate 1 is formed with a thickness of about 0.1 [mm], for example, and the inner lead 6A is formed with a thickness of about 0.15 [mm], for example.
[0035]
Of the back surface of the semiconductor chip 4, a region facing the through hole 3 is covered with a resin of the resin sealing body 8 filled in the through hole 3. Since the back surface of the semiconductor chip 4 is rougher than the back surface of the heat diffusion plate 1 for the purpose of enhancing the gettering effect, the adhesion of the resin sealing body 8 to the resin is larger than that of the back surface of the heat diffusion plate 1. high.
[0036]
Next, a lead frame used for manufacturing the resin-encapsulated semiconductor device will be described with reference to FIG.
[0037]
As shown in FIG. 6, in the lead frame L1, a plurality of leads 6 and the heat diffusion plate 1 are arranged in an area defined by the frame body 6D. Each of the plurality of leads 6 is integrated with the frame 6D and connected to each other via a tie bar 6D. Each of the multiple leads 6 includes an inner lead 6A and an outer lead 6B integrated with the inner lead 6A. The heat diffusing plate 1 is affixed to each of the plurality of inner leads 6A.
[0038]
The lead frame L1 is formed by etching or pressing a metal plate made of a metal material having high thermal conductivity, for example, a copper (Cu) material or a copper-based alloy material to form a predetermined lead pattern, and then forming an inner lead It is formed by sticking the heat diffusion plate 1 to 6A.
[0039]
As shown in FIG. 7 (a cross-sectional view of the main part taken along the line BB shown in FIG. 6), the chip of the thermal diffusion plate 1 Tower Although not limited to this, 1 A of mounting surfaces are coat | covered with the insulating layer 2 which consists of a polyimide-type thermoplastic resin, for example. A through hole 3 is formed in the central region of each of the heat diffusion plate 1 and the insulating layer 2, that is, the region where the semiconductor chip 4 is fixed. The through hole 3 is formed with a plane size smaller than the plane size of the semiconductor chip 4, and the plane shape is formed, for example, in a circular shape.
[0040]
Each of the plurality of inner leads 6A is partially formed of a chip of the heat diffusing plate 1. Tower The insulating layer 2 is fixed to the peripheral area of the mounting surface 1A, and the other part is drawn out from the peripheral edge 1C of the heat diffusion plate 1 to the outside. A part 2A of the insulating layer 2 is drawn to the outside from the peripheral edge 1C of the heat diffusing plate 1, and the peripheral edge 1C of the heat diffusing plate 1 has a gentle shape. A part 2 </ b> A of the insulating layer 2 of the present embodiment is drawn out so as to cover the side surface of the heat diffusion plate 1.
[0041]
The heat diffusion plate 1 is a chip. Tower It is formed by pressing a metal plate whose mounting surface is covered with the insulating layer 2. The through-hole 3 is also formed at the same time during this pressing. Moreover, by adjusting the speed of the press working, a part 2A of the insulating layer 2 can be drawn out from the peripheral edge 1C of the thermal diffusion plate 1 to the outside so as to cover the side surface of the thermal diffusion plate 1, The peripheral portion 1C of the heat diffusing plate 1 can be formed into a gentle shape.
[0042]
In the case of the resin-encapsulated semiconductor device configured as described above, the heat generated from the semiconductor chip 4 is transmitted to the inner lead 6A via the heat diffusion plate 1, and the heat transmitted to the inner lead 6A is the outer lead 6B. Therefore, the heat radiation property of releasing the heat generated from the semiconductor chip 4 to the outside of the resin sealing body 8 is high.
[0043]
Next, a method for manufacturing the resin-encapsulated semiconductor device will be described with reference to FIG. 8 (a cross-sectional view for explaining the manufacturing method).
[0044]
First, the lead frame L1 shown in FIG. 6 is prepared.
[0045]
Next, as shown in FIG. 8A, the heat diffusion plate 1 of the lead frame L1 is mounted on the heat stage 10, and, for example, epoxy-based heat is applied to the surface of the insulating layer 2 on the central region of the heat diffusion plate 1. The semiconductor chip 4 is bonded and fixed via an adhesive layer 5 made of a cured resin. For bonding and fixing the semiconductor chip 4, the adhesive layer 5 is applied to the surface of the insulating layer 2 by, for example, a multi-point coating method, and then the semiconductor chip 4 is thermocompression bonded so as to close the through-hole 3 on the surface of the insulating layer 2. It is done by. In this step, since the through hole 3 is formed in the central region of each of the thermal diffusion plate 1 and the insulating layer 2, that is, the region where the semiconductor chip 4 is fixed, the application amount of the adhesive layer 5 can be saved. .
[0046]
Next, as shown in FIG. 8B, the heat diffusion plate 1 is mounted on the heat stage 11, the inner leads 6A are pressed and fixed by the wind clamper 12, and then the external terminals 4A and the inner leads 6A of the semiconductor chip 4 are fixed. Are electrically connected by a wire 7. The wires 7 are connected in a state where the heat diffusion plate 1 is heated by the heat stage 11. In this step, a part of the inner lead 6A is supported by the heat stage 11 with the heat diffusion plate 1 interposed, and the other part of the inner lead 6A is winded with the other part of the inner lead 6A being separated from the heat stage 11. Since it is pressed by the clamper 12, the pressing force of the window clamper 12 is concentrated on the peripheral edge 1C of the heat diffusion plate 1. However, since the shape of the peripheral edge 1C of the heat diffusion plate 1 is gentle, The breakage of the insulating layer 2 at the peripheral edge 1C of the plate 1 can be prevented. In particular, when the insulating layer 2 is formed of a thermoplastic resin, the insulating layer 2 is softened by heat. Therefore, it is very effective to make the peripheral edge portion 1C of the heat diffusion plate 1 gentle. Further, even if the inner lead 6A is warped or deformed by the pressing force of the wind clamper 12, a part 2A of the insulating layer 2 is drawn from the peripheral edge 1C of the heat diffusion plate 1 to the outside, so that the heat diffusion plate 1 can be prevented from being short-circuited with the peripheral edge portion 1C. In particular, when the insulating layer 2 is formed of a thermoplastic resin, the insulating layer 2 is softened by heat. Therefore, drawing out a part 2A of the insulating layer 2 from the peripheral portion 1C of the thermal diffusion plate 1 to the outside has a great effect. .
[0047]
Next, as shown in FIG. 8B, the thermal diffusion plate 1, the semiconductor chip 4, the inner leads 6A, the wires 7, and the like are sealed with a resin sealing body 1. The resin sealing body 1 is formed by a transfer mold method.
[0048]
Next, the outer lead 6B is cut from the frame body 6D of the lead frame L1, the tie bar 6C is cut, and then the outer lead 6B is formed into a gull wing shape, whereby the resin sealing shown in FIGS. Type semiconductor device is almost completed.
[0049]
Thereafter, the resin-encapsulated semiconductor device is subjected to a temperature cycle test, which is an environmental test after the product is completed, and shipped as a product. The resin-encapsulated semiconductor device shipped as a product is mounted on the mounting surface of the mounting substrate.
[0050]
Thus, according to this embodiment, the following effects can be obtained.
[0051]
(1) A part of the insulating layer 2 is drawn out from the peripheral portion 1C of the thermal diffusion plate 1 to the outside thereof, so that the thermal diffusion plate 1 and the inner lead 6A are passed through the interface between the insulating layer 2 and the resin of the resin sealing body 8. The path paths connecting the two are located outside between the heat diffusion plate 1 and the inner lead 6A. During operation, the electric field generated between the heat diffusion plate 1 and the inner lead 6A is not concentrated on this path path. Therefore, the metal atoms of the inner lead 6A are not deposited by migration. Similarly, no precipitation occurs in the path route between the thermal diffusion plate 1 and the other inner lead 6A. As a result, since a short circuit between the inner lead 6A and the other inner lead 6A via the heat diffusion plate 1 can be prevented, the electrical reliability of the resin-encapsulated semiconductor device having the heat diffusion plate 1 can be improved.
[0052]
Further, even if the inner lead 6A is warped or deformed by the pressing force of the wind clamper 12 in the wire bonding process, a part 2A of the insulating layer 2 is drawn from the peripheral edge 1C of the heat diffusion plate 1 to the outside. Therefore, a short circuit between the peripheral edge 1C of the heat diffusion plate 1 and the inner lead 6A can be prevented.
[0053]
(2) By forming the peripheral portion 1C of the thermal diffusion plate 1 gently, even if the pressing force of the wind clamper 12 is concentrated on the peripheral portion 1C of the thermal diffusion plate 1 in the wire bonding step, the thermal diffusion plate 1 Since the shape of the peripheral edge portion 1 </ b> C is gentle, it is possible to prevent the insulating layer 2 from being broken at the peripheral edge portion 1 </ b> C of the heat diffusion plate 1.
[0054]
(3) The through-hole 3 is formed in each of the thermal diffusion plate 1 and the insulating layer 2, and the semiconductor chip 4 is fixed on the surface of the insulating layer 2 with the adhesive layer 5 interposed so as to close the through-hole 3. Accordingly, the area of the interface between the insulating layer 2 and the adhesive layer 5 can be reduced by an amount corresponding to the area of the through-hole 3, so that the temperature cycle test which is an environmental test after the product of the resin-encapsulated semiconductor device is completed Resin sealing body 8 suppresses the vaporization and expansion of moisture generated at the interface between insulating layer 2 and adhesive layer 5 due to heat at the time or heat at the time of mounting the resin-encapsulated semiconductor device on the mounting surface of the mounting substrate. Cracks that occur in As a result, the reliability of the resin-encapsulated semiconductor device having the heat diffusing plate 1 with respect to heat can be enhanced.
[0055]
Further, the amount of the adhesive layer 5 can be saved by the amount corresponding to the area of the through hole 3.
[0056]
Further, since the area corresponding to the area of the through hole 3 can reduce the area of the interface between the back surface 1B of the heat diffusion plate 1 facing the chip tower mounting surface 1A and the resin of the resin sealing body 8, the resin Thermal diffusion plate 1 and resin sealing by heat during a temperature cycle test, which is an environmental test after the product of the sealed semiconductor device is completed, or by heat when mounting the resin-sealed semiconductor device on the mounting surface of the mounting substrate It is possible to suppress vaporization and expansion of moisture generated at the interface between the body 8 and the resin, and to suppress cracks generated in the resin sealing body. As a result, the reliability with respect to heat of the resin-encapsulated semiconductor device having the heat diffusion plate can be enhanced.
[0057]
In the present embodiment, the example in which a part of the insulating layer 2 is drawn out along the side surface of the heat diffusing plate 1 has been described. However, as shown in FIG. The portion may be pulled out along the inner lead 6A. Even in this case, the same effects as those of the first embodiment can be obtained.
[0058]
In the present embodiment, the example in which the planar shape of the through hole 3 is formed in a circular shape has been described. However, the planar shape of the through hole 3 may be formed in a shape similar to the planar shape of the semiconductor chip 4.
[0059]
(Embodiment 2)
The schematic configuration of the resin-encapsulated semiconductor device according to the second embodiment of the present invention is shown in FIG. 10 (a plan view in a state where the upper portion of the resin-encapsulated body is removed) and FIG. 11 (the CC line position shown in FIG. 1). It is shown in the cut sectional view).
[0060]
As shown in FIGS. 10 and 11, the resin-encapsulated semiconductor device is a chip of the thermal diffusion plate 1. Tower The semiconductor chip 4 is placed on the center area of the mounting surface. Tower A plurality of leads 6 are arranged outside the outer periphery of the semiconductor chip 4. Each of the multiple leads 6 includes an inner lead 6A and an outer lead 6B integrated with the inner lead 6A.
[0061]
Each of the plurality of inner leads 6 </ b> A is arranged along each side of the semiconductor chip 4, and is electrically connected to each of the plurality of external terminals 4 </ b> A disposed on the main surface of the semiconductor chip 4 via the wires 7. It is connected.
[0062]
The heat diffusing plate 1 has, for example, a rectangular plane. The heat diffusion plate 1 is made of a metal material having a high thermal conductivity, such as a copper (Cu) material or a copper-based alloy material.
[0063]
The thermal diffusion plate 1, the semiconductor chip 4, the inner leads 6 </ b> A, the wires 7, etc. are sealed with a resin sealing body 8. For the purpose of reducing the stress, the resin sealing body 8 is formed of, for example, an epoxy resin to which a phenolic curing agent, silicone rubber, filler, and the like are added. This epoxy resin has lower adhesion to the heat diffusion plate 1 than biphenyl resin and orthocresol novolax resin. The resin sealing body 8 is formed by, for example, a transfer mold method.
[0064]
Chip of the heat diffusion plate 1 Tower The mounting surface is not limited to this, but is covered with the insulating layer 2. The insulating layer 2 is made of, for example, a polyimide thermosetting resin.
[0065]
The resin sealing body 8 is formed, for example, in a rectangular plane. A plurality of outer leads 6 </ b> B are arranged outside each side of the resin sealing body 8. Each of the plurality of outer leads 6B is arranged along each side of the resin sealing body 8, and is formed into a gull wing shape, for example. That is, the resin-encapsulated semiconductor device according to the present embodiment has a QFP ( Q uad F lat P ackage) structure.
[0066]
The semiconductor chip 4 is a chip of the thermal diffusion plate 1 Tower The adhesive layer 5 is bonded and fixed to the surface of the insulating layer 2 on the center area of the mounting surface. The adhesive layer 5 is made of, for example, an epoxy thermosetting resin. In the present embodiment, the through-hole 3 is not formed in each of the heat diffusion plate 1 and the adhesive layer 2.
[0067]
The rear surface 1B of the heat diffusing plate 1 is subjected to a surface treatment for roughening the surface. This surface treatment is performed by an electroless plating method in which metal particles are plated on the back surface of the thermal diffusion plate 1. Thus, by roughening the back surface 1B of the heat diffusing plate 1, the adhesion (anchor effect) between the back surface 1B of the heat diffusing plate 1 and the resin of the resin sealing body 8 can be increased.
[0068]
The resin-encapsulated semiconductor device configured as described above is formed by a manufacturing process using the lead frame L2 shown in FIG.
[0069]
FIG. 13 shows the relationship between the arithmetic average roughness Ra of the back surface 1B of the thermal diffusion plate 1 and the peel strength of the resin sealing body 8 with respect to the resin (epoxy resin) in the resin-encapsulated semiconductor device. When the arithmetic average roughness of the back surface 1B of the heat diffusion plate 1 is 0.3 [μm], the peel strength is about 0 [g / cm], and the arithmetic average roughness of the back surface 1B of the heat diffusion plate 1 is 0.00. In the case of 45 [μm], the peel strength is about 200 [g / cm]. When the arithmetic average roughness of the back surface 1B of the thermal diffusion plate 1 is 0.7 [μm], the peel strength is 220 [g / cm]. It was about. That is, the arithmetic average roughness of the back surface 1B of the heat diffusing plate 1 suddenly decreases with 0.45 [μm] as the wrinkle, so the arithmetic average roughness of the back surface 1B of the heat diffusing plate 1 is 0.45. If it is set to [μm] or more, the adhesion force (anchor effect) between the back surface 1B of the thermal diffusion plate 1 and the resin of the resin sealing body 8 can be enhanced. The back surface 1B of the heat diffusing plate 1 and the resin of the resin sealing body 8 are affected by the thermal stress during the temperature cycle test, which is an environmental test, and the thermal stress during the mounting of the resin-encapsulated semiconductor device on the mounting surface of the mounting substrate. Peeling occurring at the interface can be suppressed. As a result, since the water contained in the resin of the resin sealing body 8 does not accumulate at the interface between the back surface 1B of the heat diffusion plate 1 and the resin of the resin sealing body 8, the resin sealing due to the vaporized expansion of the accumulated water The crack of the body 8 can be prevented and the reliability of the resin-encapsulated semiconductor device having the heat diffusion plate 1 with respect to heat can be improved.
[0070]
In the present embodiment, the back surface 1B of the heat diffusing plate 1 has been described. Similarly, the chip of the heat diffusing plate 1 is used. Tower The mounting surface 1A may be set to an arithmetic average roughness of 0.45 [μm] or more. In this case, the chip of the thermal diffusion plate 1 Tower The adhesion between the mounting surface 1A and the insulating layer 2 can be increased.
[0071]
In this embodiment, the example in which the surface 1A of the heat diffusing plate 1 is covered with the insulating layer 2 has been described. However, the insulating layer 2 is formed in the region where the inner lead 6A is fixed, and other regions. May not form the insulating layer 2. In this case, since the other region of the chip tower mounting surface 1A of the heat diffusion plate 1 and the resin of the resin sealing body 8 are in contact with each other, the chip tower mounting surface 1A of the heat diffusion plate 1 is set to 0.45 [μm] or more. By setting the arithmetic average roughness, the adhesion between the chip tower mounting surface 1A of the thermal diffusion plate 1 and the resin of the resin sealing body 8 can be increased.
[0072]
As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Of course.
[0073]
【The invention's effect】
The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
[0074]
According to the present invention, the reliability of a resin-encapsulated semiconductor device having a heat diffusing plate can be enhanced.
[0075]
Further, according to the present invention, the reliability of the resin-encapsulated semiconductor device having the heat diffusion plate with respect to heat can be improved.
[Brief description of the drawings]
FIG. 1 is a plan view of a resin-encapsulated semiconductor device according to a first embodiment of the present invention in a state where an upper portion of a resin encapsulant is removed.
2 is a cross-sectional view taken along the line AA shown in FIG.
3 is an enlarged cross-sectional view of a main part of FIG.
FIG. 4 is a plan view of a heat diffusion plate built in the resin-encapsulated semiconductor device.
5 is an enlarged cross-sectional view of a main part of FIG. 3. FIG.
FIG. 6 is a plan view of a principal part of a lead frame used for manufacturing the resin-encapsulated semiconductor device.
7 is a cross-sectional view of the main part taken along the line BB shown in FIG. 6. FIG.
FIG. 8 is a cross-sectional view for explaining the method for manufacturing the resin-encapsulated semiconductor device.
FIG. 9 is a cross-sectional view of a principal part of a resin-encapsulated semiconductor device showing a modification of the embodiment of the present invention.
FIG. 10 is a plan view of the resin-encapsulated semiconductor device according to the second embodiment of the present invention with the upper portion of the resin-encapsulated body removed.
11 is an enlarged cross-sectional view of a main part cut at the position of line CC shown in FIG. 9;
FIG. 12 is a plan view of an essential part of a lead frame used in manufacturing the resin-encapsulated semiconductor device.
FIG. 13 is a correlation diagram between arithmetic average roughness and peel strength.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Thermal diffusion plate, 2 ... Insulating layer, 3 ... Through-hole, 4 ... Semiconductor chip, 4A ... External terminal, 5 ... Adhesive layer, L1, L2 ... Lead frame, 6 ... Lead, 6A ... Inner lead, 6B ... Outer Lead, 6C ... tie bar, 6D ... frame body, 7 ... wire, 8 ... resin sealing body, 10,11 ... heat sledge, 12 ... wind clamper.

Claims (4)

一主面を有し、この一主面の選択的領域に半導体チップを搭載し、前記半導体チップを囲むように配置されたインナーリードの一部を前記一主面で支持する四角形の支持板と、前記半導体チップ、前記インナーリードを封止する樹脂封止体とを有する樹脂封止型半導体装置であって、
前記インナーリードの一部分は、絶縁層を介して前記支持板に固定され、前記インナーリードは、前記半導体チップの外部端子と電気的に接続され、かつ前記絶縁層の一部は、前記支持板の周縁部から外側に引き出され
前記支持板の厚さは、前記インナーリードの厚さに比べて薄くなっていることを特徴とする樹脂封止型半導体装置。
A rectangular support plate having one main surface, mounting a semiconductor chip in a selective region of the one main surface, and supporting a part of an inner lead arranged to surround the semiconductor chip on the one main surface; A resin-encapsulated semiconductor device having the semiconductor chip and a resin encapsulant that encapsulates the inner lead,
A portion of the inner lead is fixed to the support plate via an insulating layer, the inner lead is electrically connected to an external terminal of the semiconductor chip, and a portion of the insulating layer is formed on the support plate. Pulled out from the periphery ,
The resin-encapsulated semiconductor device according to claim 1, wherein a thickness of the support plate is thinner than a thickness of the inner lead .
前記絶縁層の一部は、前記支持板の側面を覆うように引き出されていることを特徴とする請求項1に記載の樹脂封止型半導体装置。  2. The resin-encapsulated semiconductor device according to claim 1, wherein a part of the insulating layer is drawn out so as to cover a side surface of the support plate. 前記絶縁層は、熱可塑性樹脂で形成されていることを特徴とする請求項1又は請求項2に記載の樹脂封止型半導体装置。  The resin-encapsulated semiconductor device according to claim 1, wherein the insulating layer is made of a thermoplastic resin. 請求項1に記載の樹脂封止型半導体装置において、The resin-encapsulated semiconductor device according to claim 1,
前記支持板は、金属材であり、The support plate is a metal material,
前記インナーリードが固定された側と反対側の前記支持板の裏面は、前記絶縁層が形成されず、前記樹脂封止体の樹脂と直接接触していることを特徴とする樹脂封止型半導体装置。The back surface of the support plate opposite to the side on which the inner leads are fixed is not formed with the insulating layer, and is in direct contact with the resin of the resin sealing body. apparatus.
JP12968497A 1997-05-20 1997-05-20 Resin-sealed semiconductor device Expired - Fee Related JP3642545B2 (en)

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