JPH0587030B2 - - Google Patents

Info

Publication number
JPH0587030B2
JPH0587030B2 JP16478185A JP16478185A JPH0587030B2 JP H0587030 B2 JPH0587030 B2 JP H0587030B2 JP 16478185 A JP16478185 A JP 16478185A JP 16478185 A JP16478185 A JP 16478185A JP H0587030 B2 JPH0587030 B2 JP H0587030B2
Authority
JP
Japan
Prior art keywords
layer
region
impurity
floating gate
operating region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP16478185A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6225459A (ja
Inventor
Tetsuo Fujii
Toshio Sakakibara
Nobuyoshi Sakakibara
Yutaka Iwasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP16478185A priority Critical patent/JPS6225459A/ja
Priority to US06/887,625 priority patent/US4774556A/en
Publication of JPS6225459A publication Critical patent/JPS6225459A/ja
Publication of JPH0587030B2 publication Critical patent/JPH0587030B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
JP16478185A 1985-07-25 1985-07-25 不揮発性半導体記憶装置 Granted JPS6225459A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP16478185A JPS6225459A (ja) 1985-07-25 1985-07-25 不揮発性半導体記憶装置
US06/887,625 US4774556A (en) 1985-07-25 1986-07-21 Non-volatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16478185A JPS6225459A (ja) 1985-07-25 1985-07-25 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS6225459A JPS6225459A (ja) 1987-02-03
JPH0587030B2 true JPH0587030B2 (fr) 1993-12-15

Family

ID=15799825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16478185A Granted JPS6225459A (ja) 1985-07-25 1985-07-25 不揮発性半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS6225459A (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07120717B2 (ja) * 1986-05-19 1995-12-20 日本電気株式会社 半導体記憶装置の製造方法
JPH0644632B2 (ja) * 1987-06-29 1994-06-08 株式会社東芝 半導体記憶装置
JP2735193B2 (ja) * 1987-08-25 1998-04-02 株式会社東芝 不揮発性半導体装置及びその製造方法
JP3070531B2 (ja) * 1997-06-27 2000-07-31 日本電気株式会社 不揮発性半導体記憶装置
JP3425853B2 (ja) * 1997-08-29 2003-07-14 Necエレクトロニクス株式会社 不揮発性半導体記憶装置
KR100598049B1 (ko) * 2004-10-28 2006-07-07 삼성전자주식회사 멀티 비트 비휘발성 메모리 셀을 포함하는 반도체 소자 및그 제조 방법
JP5092431B2 (ja) * 2006-02-03 2012-12-05 株式会社デンソー 半導体装置
KR100780249B1 (ko) * 2006-11-30 2007-11-27 동부일렉트로닉스 주식회사 플래시 메모리 소자

Also Published As

Publication number Publication date
JPS6225459A (ja) 1987-02-03

Similar Documents

Publication Publication Date Title
US4774556A (en) Non-volatile semiconductor memory device
KR100235274B1 (ko) 반도체 기억장치와 그 제조방법
KR0167467B1 (ko) 이중 채널을 갖는 soi 상의 트렌치 eeprom 구조와 이의 제조방법
US6376316B2 (en) Method for manufacturing semiconductor integrated circuit device having deposited layer for gate insulation
US5017977A (en) Dual EPROM cells on trench walls with virtual ground buried bit lines
KR100450828B1 (ko) 불휘발성반도체기억장치의제조방법
US5424979A (en) Non-volatile memory cell
US20020105037A1 (en) Semiconductor memory capable of being driven at low voltage and its manufacture method
US5135879A (en) Method of fabricating a high density EPROM cell on a trench wall
JP4938921B2 (ja) トランジスタ型強誘電体不揮発性記憶素子
KR100621553B1 (ko) 비휘발성 메모리 소자 및 그 제조방법
KR100417727B1 (ko) 전기적으로기록가능하고소거가능한판독전용메모리셀장치및그제조방법
US5834808A (en) Non-volatile semiconductor memory device
JPH0817948A (ja) 半導体装置及びその製造方法
JPH0560670B2 (fr)
JPS61107762A (ja) 半導体記憶装置の製造方法
JPH08330454A (ja) 浮遊ゲート型不揮発性半導体記憶装置
JPH0587030B2 (fr)
JPH0574949B2 (fr)
JP2008529298A (ja) 埋め込まれたフローティングゲート構造を持つフラッシュメモリセル及びその製造方法
EP0021776B1 (fr) Dispositif semi-conducteur de mémoire et procédé pour sa fabrication
CN104638018B (zh) 一种半浮栅器件及其制备方法
JPH06104451A (ja) 不揮発性半導体記憶装置
CN1875468A (zh) 具有共享控制栅极的非易失性晶体管对的制造方法
JPS6286866A (ja) 不揮発性半導体記憶装置

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term