JPH0579170B2 - - Google Patents

Info

Publication number
JPH0579170B2
JPH0579170B2 JP61048391A JP4839186A JPH0579170B2 JP H0579170 B2 JPH0579170 B2 JP H0579170B2 JP 61048391 A JP61048391 A JP 61048391A JP 4839186 A JP4839186 A JP 4839186A JP H0579170 B2 JPH0579170 B2 JP H0579170B2
Authority
JP
Japan
Prior art keywords
solder
spacer
height
semiconductor element
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61048391A
Other languages
Japanese (ja)
Other versions
JPS62206843A (en
Inventor
Shinobu Taima
Kiichiro Kubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Consumer Electronics Co Ltd
Japan Display Inc
Original Assignee
Hitachi Device Engineering Co Ltd
Hitachi Ltd
Hitachi Consumer Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Device Engineering Co Ltd, Hitachi Ltd, Hitachi Consumer Electronics Co Ltd filed Critical Hitachi Device Engineering Co Ltd
Priority to JP4839186A priority Critical patent/JPS62206843A/en
Publication of JPS62206843A publication Critical patent/JPS62206843A/en
Publication of JPH0579170B2 publication Critical patent/JPH0579170B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10152Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/10165Alignment aids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009Pre-treatment of the bump connector or the bonding area
    • H01L2224/8103Reshaping the bump connector in the bonding apparatus, e.g. flattening the bump connector
    • H01L2224/81035Reshaping the bump connector in the bonding apparatus, e.g. flattening the bump connector by heating means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009Pre-treatment of the bump connector or the bonding area
    • H01L2224/8103Reshaping the bump connector in the bonding apparatus, e.g. flattening the bump connector
    • H01L2224/81047Reshaping the bump connector in the bonding apparatus, e.g. flattening the bump connector by mechanical means, e.g. severing, pressing, stamping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81136Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8114Guiding structures outside the body
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体素子の実装に係り、特にLSI
の実装に好適な接続方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to the mounting of semiconductor elements, and particularly to LSI
This invention relates to a connection method suitable for implementation.

〔従来の技術〕[Conventional technology]

半導体素子を基板上にハンダを介して電気的お
よび機械的に接続する方法には、特公昭43−1654
号公報に記載されている如く、ハンダ付する金属
の周囲にハンダを濡らさない物質を配し(以下ハ
ンダダムという)ハンダの表面張力を利用して素
子を基板から離して接続する方法がある(以下こ
の方法をCCBと称す)。CCBにおいてはハンダダ
ムが必要不可欠であるが、一般に微小寸法である
ので作製に高コストとなる。またハンダダムの設
計又は作製が不良であると、ハンダがハンダダム
を破壊するという不良が発生する。
A method of electrically and mechanically connecting semiconductor elements to a substrate via solder is described in Japanese Patent Publication No. 43-1654.
As described in the publication, there is a method of placing a substance that does not wet the solder around the metal to be soldered (hereinafter referred to as solder dam) and using the surface tension of the solder to separate the element from the board and connect it (hereinafter referred to as solder dam). This method is called CCB). Solder dam is indispensable in CCB, but it is generally small in size and therefore expensive to manufacture. Furthermore, if the design or fabrication of the solder dam is defective, a defect may occur in which the solder destroys the solder dam.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来例では、微小なハンダダムを構成する
には高コストであり、設計裕度が少ないとう問題
があつた。
In the conventional example described above, there were problems in that it was expensive to construct a minute solder dam and there was little design margin.

本発明の目的はハンダダムなしでCCBと同様
な高密度かつ高信頼の接続を低コストで提供する
ことにある。
An object of the present invention is to provide a high-density and highly reliable connection similar to that of a CCB at low cost without using solder dam.

〔問題点を解決するための手段〕[Means for solving problems]

半導体素子をハンダを介して基板に電気的およ
び機械的に接続するに際し、半導体素子と基板と
の間に所定厚さのスペーサを介在させることによ
り、上記問題点は解決される。
The above problem can be solved by interposing a spacer of a predetermined thickness between the semiconductor element and the substrate when electrically and mechanically connecting the semiconductor element to the substrate via solder.

〔作用〕[Effect]

CCBが高信頼性を有するのは比較的軟らかい
ハンダにより接続されているため、基板と素子の
熱膨張の差をハンダが吸収するためである。従つ
てCCBの破壊はハンダの付根(素子又は基板側)
で起こる。これを改良したものにハンダ形状を球
形から中央がくびれたづつみ形にして応力をくび
れた所に集中させたものがある。このように素子
がハンダだけで空中に保持されていることが要点
である。
The reason why CCBs have high reliability is because they are connected using relatively soft solder, which absorbs the difference in thermal expansion between the board and the element. Therefore, the CCB breaks down at the base of the solder (element or board side).
It happens in An improved version of this is one in which the solder shape is changed from a spherical shape to a constriction in the center to concentrate stress at the constriction. The key point is that the element is held in the air only by solder.

ハンダダムなしで素子をハンダ接続すると、接
続後のハンダ高さは基板側のハンダ濡れ量に左右
される(あらかじめ素子側に半田ボールがあるも
のとする)。ここに素子と基板にハンダ接続され
ない部分にハンダボールの高さ以下のスペーサを
設けてハンダ接続すると、接続の高さはスペーサ
の高さとなる。このときハンダの形状は基板側の
接続端子に濡れ広がるためづつみ形となる。また
スペーサは素子側、基板側のどちらか一方に固定
またはどちらにも固定しなければ自由に素子又は
ハンダが熱膨張等で移動できるので高信頼が期待
できる。またスペーサに熱伝導の高い物質を選定
すれば素子で発生した熱を基板に放出することも
可能である。
When devices are soldered together without a solder dam, the solder height after connection depends on the amount of solder wetting on the board side (assuming there is a solder ball on the device side in advance). If a spacer with the height of the solder ball or less is provided at a portion where the element and the board are not connected by solder, and the solder connection is made, the height of the connection becomes the height of the spacer. At this time, the shape of the solder becomes a knot because it wets and spreads over the connection terminals on the board side. Further, since the spacer is fixed to either the element side or the substrate side, or if it is not fixed to either side, the element or solder can move freely due to thermal expansion, etc., so high reliability can be expected. Furthermore, if a material with high thermal conductivity is selected for the spacer, it is possible to release the heat generated in the element to the substrate.

〔実施例〕〔Example〕

以下、本発明の一実施例を第1図に示す。先ず
断面図および平面図をそれぞれ第2,3図に示す
如く、基板1上にハンダ付用端子2を蒸着、メツ
キあるいは印刷その他の方法で形成する。材質は
金、銅等ハンダ付が可能な内室の一層膜又はこれ
らを最上層とする多層膜である。次にスペーサ3
を固定する。本例ではスペーサ3の半導体素子5
に接する面は平面であるが、ハンダ接続後に半導
体素子5が基板に対し平行になればスペーサ3の
形状は問わない。スペーサ3の固定後の高さはハ
ンダボール4の高さを越えてはならない。このの
ち通常のCCBと同様にフラツクス等を用いて素
子を基板の所定の位置に仮付をしてから加熱して
ハンダ接続をする。このとき溶融したハンダはハ
ンダ付用端子2に濡れ広がりスペーサにより接続
高さが制御されるためハンダボール4は第1図に
示す如くづつみ形ハンダ6となる。
An embodiment of the present invention is shown in FIG. 1 below. First, as shown in FIGS. 2 and 3, a cross-sectional view and a plan view, respectively, soldering terminals 2 are formed on a substrate 1 by vapor deposition, plating, printing, or other methods. The material is a single-layer film in the interior that can be soldered, such as gold or copper, or a multi-layer film with these as the top layer. Next, spacer 3
to be fixed. In this example, the semiconductor element 5 of the spacer 3
Although the surface in contact with is a flat surface, the shape of the spacer 3 does not matter as long as the semiconductor element 5 becomes parallel to the substrate after soldering. The height of the spacer 3 after being fixed must not exceed the height of the solder ball 4. After this, as with normal CCBs, the elements are temporarily attached to a predetermined position on the board using flux, etc., and then heated and soldered. At this time, the molten solder wets and spreads on the soldering terminal 2 and the connection height is controlled by the spacer, so the solder ball 4 becomes a bundle-shaped solder 6 as shown in FIG.

必要に応じてこの後、フラツクスの除去および
保護用樹脂を素子5にかぶせる。
After this, if necessary, the element 5 is covered with a resin for flux removal and protection.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、ハンダダムなしという低コス
トでCCBと同等以上の性能を得ることができる。
According to the present invention, it is possible to obtain performance equal to or higher than that of CCB at low cost without using solder dam.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による半導体素子接続方法を説
明するための要部断面図、第2,3図はそれぞれ
本発明による半導体素子接続方法による部品配置
を説明するための要部断面図及び要部平面図であ
る。 符号の説明、1……基板、2……ハンダ付用端
子、3……スペーサ、4……ハンダボール、5…
…半導体素子、6……つづみ形ハンダ。
FIG. 1 is a cross-sectional view of a main part for explaining the semiconductor element connecting method according to the present invention, and FIGS. FIG. Explanation of symbols, 1... Board, 2... Soldering terminal, 3... Spacer, 4... Solder ball, 5...
...Semiconductor element, 6...Tsuru type solder.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体素子をハンダを介して基板に電気的お
よび機械的に接続する方法において、接続前に前
記半導体素子にはハンダボールを設けておき前記
半導体素子と基板の間に前記ハンダボールの高さ
以下の厚さのスペーサを介在させて前記ハンダの
高さを制御するとともに、接続前のハンダボール
と半導体素子及び基板とが接合する面積に対し
て、接続後のハンダと半導体素子及び基板とが接
合する面積を広くすることで接続後のハンダの形
状を、ハンダ中央部がくびれたつづみ形とするこ
とを特徴とする半導体素子接続方法。
1. In a method of electrically and mechanically connecting a semiconductor element to a substrate via solder, a solder ball is provided on the semiconductor element before connection, and a height of the solder ball is lower than or equal to the height of the solder ball between the semiconductor element and the substrate. The height of the solder is controlled by intervening a spacer with a thickness of A method for connecting semiconductor elements, characterized in that by increasing the area of solder connected, the shape of the solder after connection is made into a constricted central part.
JP4839186A 1986-03-07 1986-03-07 Connecting method for semiconductor element Granted JPS62206843A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4839186A JPS62206843A (en) 1986-03-07 1986-03-07 Connecting method for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4839186A JPS62206843A (en) 1986-03-07 1986-03-07 Connecting method for semiconductor element

Publications (2)

Publication Number Publication Date
JPS62206843A JPS62206843A (en) 1987-09-11
JPH0579170B2 true JPH0579170B2 (en) 1993-11-01

Family

ID=12801993

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4839186A Granted JPS62206843A (en) 1986-03-07 1986-03-07 Connecting method for semiconductor element

Country Status (1)

Country Link
JP (1) JPS62206843A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014148634A1 (en) 2013-03-21 2014-09-25 株式会社谷黒組 Soldering device and method, and manufactured substrate and electronic component

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57173953A (en) * 1981-04-21 1982-10-26 Seiko Epson Corp Semiconductor device
JPS57176738A (en) * 1981-04-23 1982-10-30 Seiko Epson Corp Connecting structure for flip chip

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57173953A (en) * 1981-04-21 1982-10-26 Seiko Epson Corp Semiconductor device
JPS57176738A (en) * 1981-04-23 1982-10-30 Seiko Epson Corp Connecting structure for flip chip

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014148634A1 (en) 2013-03-21 2014-09-25 株式会社谷黒組 Soldering device and method, and manufactured substrate and electronic component
KR20150133185A (en) * 2013-03-21 2015-11-27 가부시키가이샤 다니구로구미 Soldering device and method, and manufactured substrate and electronic component
EP2978287A4 (en) * 2013-03-21 2017-02-08 Tanigurogumi Corporation Soldering device and method, and manufactured substrate and electronic component

Also Published As

Publication number Publication date
JPS62206843A (en) 1987-09-11

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