JPH0574728A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To avoid the pollution of impurity well in low concentration. CONSTITUTION:A thick silicon oxide film 2 is formed on a silicon substrate 1 and then patterned to form an aperture part 4. Next, after implantation of impurity ions, another thin silicon film 5 60-100nm thick is formed as a protective film to be heat-treated at 1200 deg.C later.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing an impurity well.

[0002]

2. Description of the Related Art A low-concentration impurity well is formed in a conventional semiconductor device manufacturing process by forming a thermal oxide film having a thickness of 400 nm on a silicon substrate and patterning it with a photoresist film as a mask to form a well forming region. An opening is formed in the film, and then, using the photoresist film and the oxide film as a mask, ion implantation of impurities is performed.
The method of heat treatment was used. At this time, if the thermal oxide film is thick, the wafer may slip during the heat treatment process.

In order to make the impurity concentration of the impurity well as low as about 1 × 10 ¹² , the accelerating voltage of the impurity injection is set to 1
It is necessary to do so with a high energy of 50 keV and to implant impurities into a deep portion. Therefore, ion implantation of impurities is performed using the photoresist film and the oxide film as a mask. After this,
A thermal oxide film having a thickness of 30 nm is formed for the purpose of a protective film, and then heat treatment at 1200 ° C. is performed for the purpose of diffusing impurities to form an impurity well.

The protective film formed before the heat treatment at 1200 ° C. should be as thin as possible because if the film thickness is large, the probability of slipping on the wafer during the heat treatment at 1200 ° C. increases rapidly.

[0005]

In recent years, since the production of various kinds of semiconductor devices in small quantities has increased, it is necessary to process a wafer using a high concentration impurity well and then a low concentration impurity well. Is increasing. In this case, since the impurities from the product are attached to the furnace for performing the treatment or the boat for raising the wafer, when the wafer using the low-concentration impurity well is treated, these attached impurities are diffused to the inside of the wafer. And the concentration of the impurity well changes, and electrical characteristics, especially MOS
There is a problem that the threshold voltage of the transistor changes.

[0006]

A method of manufacturing a semiconductor device according to the present invention comprises the steps of forming an oxide film on a semiconductor substrate and then patterning it to form an opening in a well formation region, and using the oxide film as a mask. A step of introducing impurities into the semiconductor substrate in the opening, and a thickness of 60 to 1 on the surface of the semiconductor substrate in the opening into which the impurities are introduced by a thermal oxidation method.
And a heat treatment after forming an oxide film having a thickness of 00 nm.

[0007]

The present invention will be described below with reference to the drawings. 1 (a) and 1 (b) are cross-sectional views of a semiconductor chip shown in the order of manufacturing steps for explaining an embodiment of the present invention.

First, as shown in FIG. 1A, after forming a thick silicon oxide film having a thickness of 400 nm on a silicon substrate 1, etching is performed using a photoresist film 3 as a mask to form an opening in a well formation region. To form. Next, P-type impurity ions are implanted using the photoresist film 3 and the silicon oxide film 2 as a mask.

Next, as shown in FIG. 1B, after removing the photoresist film 3, the surface of the silicon substrate in the opening 4 is thermally oxidized to form a silicon oxide film 5 having a thickness of 60 nm. Next, heat treatment at 1200 ° C. is performed to diffuse the impurity ions and form the P-type well 6.

At this time, if the silicon oxide film 5 is thickened to 100 nm or more, the wafer may slip during the heat treatment at 1200 ° C. Moreover, the impurity ions are sucked into the silicon oxide film 5, and the concentration of the impurity ions in the P-type well 6 changes. If the silicon oxide film 5 is made thinner than 50 nm, a processing furnace at 1200 ° C. or
Impurities adhering to the boat for raising the wafer enter the inside of the wafer, the concentration of the P-type well 6 changes, and the threshold voltage of the MOS transistor changes.

The MO manufactured according to this embodiment as described above
Conventional S-transistors have a variation in threshold voltage of ±
Although it was 0.2 V, it could be suppressed within ± 0.1 V.

[0012]

As described above, according to the present invention, it is possible to prevent impurities from being contaminated from the outside of the wafer.
This has the effect of greatly reducing the variation in the threshold voltage of the S transistor.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor chip for explaining an embodiment of the present invention.

[Explanation of symbols]

 1 Silicon Substrate 2 Silicon Oxide Film 3 Photoresist Film 4 Opening 5 Silicon Oxide Film 6 P-type Well

Claims (1)

[Claims] 1. A step of forming an oxide film on a semiconductor substrate and then performing patterning to form an opening in a well formation region; a step of introducing impurities into the semiconductor substrate in the opening using the oxide film as a mask; Is formed on the surface of the semiconductor substrate in the opening where
Forming an oxide film having a thickness of 0 to 100 nm, and then performing a heat treatment.