JPH0570931B2 - - Google Patents

Info

Publication number
JPH0570931B2
JPH0570931B2 JP59114562A JP11456284A JPH0570931B2 JP H0570931 B2 JPH0570931 B2 JP H0570931B2 JP 59114562 A JP59114562 A JP 59114562A JP 11456284 A JP11456284 A JP 11456284A JP H0570931 B2 JPH0570931 B2 JP H0570931B2
Authority
JP
Japan
Prior art keywords
polycrystalline silicon
film
silicon film
conductivity type
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59114562A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60258965A (ja
Inventor
Keijiro Uehara
Hisayuki Higuchi
Akio Hayasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59114562A priority Critical patent/JPS60258965A/ja
Priority to US06/741,525 priority patent/US4640721A/en
Publication of JPS60258965A publication Critical patent/JPS60258965A/ja
Publication of JPH0570931B2 publication Critical patent/JPH0570931B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/1414—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0113—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors the conductive layers comprising highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material

Landscapes

  • Bipolar Transistors (AREA)
  • Weting (AREA)
JP59114562A 1984-06-06 1984-06-06 半導体装置の製造方法 Granted JPS60258965A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP59114562A JPS60258965A (ja) 1984-06-06 1984-06-06 半導体装置の製造方法
US06/741,525 US4640721A (en) 1984-06-06 1985-06-05 Method of forming bipolar transistors with graft base regions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59114562A JPS60258965A (ja) 1984-06-06 1984-06-06 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS60258965A JPS60258965A (ja) 1985-12-20
JPH0570931B2 true JPH0570931B2 (cg-RX-API-DMAC7.html) 1993-10-06

Family

ID=14640915

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59114562A Granted JPS60258965A (ja) 1984-06-06 1984-06-06 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60258965A (cg-RX-API-DMAC7.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2997123B2 (ja) * 1992-04-03 2000-01-11 株式会社東芝 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS60258965A (ja) 1985-12-20

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