JPH0567623A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To suppress the irregularity of the diffusion layer of a semiconductor device, and to univocally determine DC characteristics. CONSTITUTION:After a silicon oxide film 3 has been formed on an N-type silicon substrate 1, a P-type base layer 2 is formed. An aperture 4 is perforated, and a polysilicon film 5 is formed. Using photoresists 9 and 10, arsenic ions are implanted into the aperture part where an emitter region 7 will be formed, boron ions are implanted into the aperture part 6 where a base-contact region will be formed, and then the ions are diffused by conducting a heat treatment.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a high frequency transistor or a high frequency integrated circuit having a planar structure.

[0002]

2. Description of the Related Art Conventionally, a high frequency transistor has been manufactured by a process sectional view as shown in FIG.

First, as shown in FIG. 3A, a p-type base layer 2 is formed on an n-type silicon epitaxial layer 1. Since the p-type base layer 2 requires a very thin diffusion layer especially in a high frequency transistor, it is formed by an ion implantation method at a low acceleration voltage. After that, the silicon oxide film 3 is formed.

Next, the openings 4 for the emitter and base contacts are formed in the silicon oxide film 3 (FIG. 3).
B). In a planar high-frequency transistor, the distance between the emitter and the base is very narrow, so the emitter and base contact portions are opened simultaneously here.

Subsequently, as shown in FIG. 3C, a polysilicon film 5 is formed to a thickness of 1000 to 3000 angstroms, and arsenic serving as a diffusion source of the emitter is diffused therein by an ion implantation method. Ion implantation amount is 1 × 10 ¹⁶ cm ^-2
It is a degree.

Thereafter, as shown in FIG. 3D, a silicon oxide film 6 is formed and patterned by a photoresist method so that the polysilicon film 5 is left only in the emitter openings. After patterning, thermal diffusion is performed in a nitrogen atmosphere at 900 to 1000 ° C. to form the emitter diffusion layer 7. 0.5 μm due to arsenic diffusion from polysilicon 5
An emitter diffusion layer 7 having a shallow diffusion depth is formed.

After that, in order to obtain ohmic contact between the base contact portion and the electrode and increase the surface concentration of the base contact portion, boron diffusion was performed at a temperature of about 900 ° C. as shown in FIG. 3E. A high-frequency transistor is completed by forming it.

[0008]

This conventional method of manufacturing a high frequency transistor has the following problems, particularly in promoting higher frequencies.

First, in order to increase the frequency, as shown in FIG.
It is necessary to lower the emitter diffusion temperature in this step, and this diffusion temperature is actually lowered to about 900 ° C. For this reason, the impurities in the emitter diffusion region are re-diffused during the contact boron diffusion in the subsequent steps, and the direct current characteristics such as the current amplification factor and the collector-base breakdown voltage change, which makes control impossible.

In order to deal with this, when contact boron is formed by the ion implantation method, a dose amount of 1 × 10 ¹⁵ cm ^-2 or more is required to obtain the surface concentration.
At this time, boron enters deeper than the base diffusion layer,
There are problems that the collector-base capacitance becomes large and the variation in the wafer surface becomes large.

[0011]

According to the manufacturing method of the present invention, the step of forming an insulating film on a semiconductor substrate and the step of forming a one-conductivity-type first semiconductor region below the insulating film on the semiconductor substrate. A step, a step of forming a plurality of openings in the insulating film, a step of forming a polysilicon film on the insulating film and the opening,
A step of implanting impurity ions of another conductivity type into the first opening, a step of implanting impurity ions of one conductivity type into the second opening, and a step of implanting impurity ions of another conductivity type below the first opening. A semiconductor device including the step of simultaneously forming the third semiconductor region of one conductivity type under the second opening.

Further, according to the manufacturing method of the present invention, a transistor is formed by using the first semiconductor region as a base region, the second semiconductor region as an emitter region, and the third semiconductor region as a base contact region. A semiconductor device is obtained.

Although the manufacturing method of the present invention is suitable for manufacturing a planar type high frequency transistor, it can be applied to other semiconductor devices in which it is preferable to uniquely determine ion diffusion.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a process sectional view showing a first embodiment of a method of manufacturing a semiconductor device according to the present invention.

As shown in FIG. 1A, a p-type base layer 2 is formed on an n-type silicon substrate 1, and the substrate is covered with a silicon oxide film 3. An opening 4 for the emitter and base contacts is formed in this, and a polysilicon film 5 is grown (see FIG. 1).
B).

Next, arsenic impurities are selectively ion-implanted into the polysilicon film above the emitter using the photoresist 9 as a mask (FIG. 1C), and the polysilicon film 5 is formed above the base contact using the photoresist 10 as a mask. Boron impurities are selectively ion-implanted (FIG. 1D).

After that, a silicon oxide film 6 is formed and patterned with a photoresist, and the polysilicon film is selectively left only on the openings 4 of the emitter and base contacts, followed by heat treatment in a nitrogen atmosphere at 900 ° C. To do. As a result, the emitter diffusion layer 7 and the boron diffusion layer 8 are formed (FIG. 1E).

Although the diffusion of the high frequency transistor is completed in this way, the silicon oxide film 6 is thereafter removed and the electrode 11 is removed.
To form a desired high frequency transistor (FIG. 1F).

FIG. 2 is a sectional view of a high frequency operation integrated circuit for explaining a second embodiment of the method of manufacturing a semiconductor device according to the present invention.

A collector diffusion layer is formed by forming an n-type silicon epitaxial layer 1 on a p-type silicon substrate 12 and forming an n ⁺ -type buried layer 13, a thick silicon oxide film 14, and a channel stop p-type diffusion layer 15. 16, base diffusion layer 2
To form.

In this state, the same process as shown in FIG. 1 is used to form one transistor used in the high frequency integrated circuit. Here, the polysilicon film 5 in which arsenic is ion-implanted is also formed for the ohmic contact of the collector, and the arsenic diffusion layer 17 is formed at the same time as the emitter diffusion.
To form.

[0023]

As described above, according to the present invention, the emitter diffusion layer and the base boron diffusion layer for obtaining the ohmic junction can be formed at the same time, and the subsequent heat treatment is not required. This has the effect that the DC characteristics such as the breakdown voltage can be uniquely determined.

Further, according to the present invention, since the boron diffusion layer for obtaining the ohmic contact is formed by diffusing from the polysilicon layer, it is possible to reduce the variation of the boron diffusion layer within the wafer surface.

[Brief description of drawings]

FIG. 1 is a process sectional view showing a first embodiment of a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a cross-sectional view for explaining a second embodiment of the method of manufacturing a semiconductor device according to the present invention.

3A to 3D are process cross-sectional views showing a conventional method for manufacturing a high-frequency transistor.

[Explanation of symbols]

1 n-type silicon epitaxial layer 2 p-type base layer 3 silicon oxide film 4 opening 5 polysilicon film 6 silicon oxide film 7 emitter diffusion layer 8 boron diffusion layer 9, 10 photoresist 11 electrode 12 p-type silicon substrate 13 n ⁺ type Buried layer 14 Silicon oxide film 15 P-type diffusion layer 16 Collector diffusion layer 17 Arsenic diffusion layer

Claims (2)

[Claims] 1. A step of forming an insulating film on a semiconductor substrate, and a first conductive type first film under the insulating film on the semiconductor substrate.
Forming a semiconductor region, forming a plurality of openings in the insulating film, forming a polysilicon film over the insulating film and the opening, and forming another conductive film in the first opening. Type impurity ions, a step of injecting one conductivity type impurity ions into the second opening, and the first
A second semiconductor region of another conductivity type under the opening of
And a step of simultaneously forming third semiconductor regions of one conductivity type under the opening of the semiconductor device. 2. The transistor according to claim 1, wherein the first semiconductor region serves as a base region, the second semiconductor region serves as an emitter region, and the third semiconductor region serves as a base contact region. Method of manufacturing semiconductor device.