JPH0562874A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent an irregularity in an exposure exceeding an allowable value due to a correction based on a parameter such as a rotation, an inclination, an offset, etc., of a semiconductor chip unit. CONSTITUTION:A method for manufacturing a semiconductor device exposes by using a reticle of a semiconductor chip 11 formed on a semiconductor substrate 1. The method comprises the steps of dividing active region 11a of the chip 11 into a plurality of divided regions 21, 22, 23 and 24 by alignment marks 11c, lid provided in an inactive region 11b and an active region 11a of the chip 11 and detecting the positional deviation of the substrate 1 at the respective regions 21, 22, 23 and 24; and unitarily adding a correction obtained by integrating the positional deviations of the regions 21, 22, 23 and 24 at the chip 11 unit to the entire chip 11, aligning it and then exposing it.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device capable of performing highly accurate alignment and exposure in a semiconductor device manufacturing process.

With the recent trend toward higher integration and miniaturization of semiconductor devices,
Along with the increase in chip size, there is a need for a highly accurate alignment and exposure method that reduces dimensional variations within a semiconductor chip.

Under the circumstances as described above, there is a demand for a method of manufacturing a semiconductor device capable of performing highly accurate alignment and exposure in a manufacturing process of a highly integrated and miniaturized large semiconductor chip.

[0004]

2. Description of the Related Art A conventional method of manufacturing a semiconductor device will be described in detail with reference to FIG. FIG. 3 is a diagram showing the arrangement of alignment marks in a conventional semiconductor device.

In the semiconductor substrate 31 on which the relatively small semiconductor chip 41 of the conventional semiconductor device is formed, as shown in FIG. 3A, the periphery of the active region 41a of the semiconductor chip 41 formed on the semiconductor substrate 31 is surrounded. An alignment mark 41c is formed in the inactive region 41b as shown in the figure.

In the manufacturing process of such a semiconductor chip, parameters such as rotation, inclination and offset of the semiconductor chip region are obtained for each semiconductor chip, and exposure is carried out with correction based on these parameters.

Rotation is a rotation angle error of the semiconductor chip, inclination is an error on the surface of the semiconductor chip from the horizontal plane, and offset is an error in the X and Y axis directions. A semiconductor substrate on which a large-sized semiconductor chip 61 of a conventional semiconductor device is formed
Also in 51, as in the case of the relatively small semiconductor chip 41 described above, as shown in FIG. 3B, an inactive region around the active region 61a of the semiconductor chip 61 formed on the semiconductor substrate 51.
An alignment mark 61c is formed on the 61b as shown in the figure.

Even in the manufacturing process of such a large-sized semiconductor chip, rotation, inclination,
Although parameters such as offset are obtained and correction is performed based on these parameters to perform exposure, correction based on parameters such as rotation, inclination, and offset of each semiconductor chip sufficiently grasps the state of the exposed surface. It is difficult to do so, and the patterning dimension of the resist between the peripheral portion and the central portion of the semiconductor chip varies more than the permissible value.

[0009]

In the conventional method for manufacturing a semiconductor device described above, the alignment marks are provided only in the inactive region around the active region of the semiconductor chip formed on the semiconductor substrate, and these positions are set. The rotation, inclination, and offset of the area of the semiconductor chip unit defined by the alignment mark are obtained, and the exposure is performed by adding the correction based on these parameters. The correction based on parameters such as rotation, inclination, and offset has a problem in that the patterning dimension of the resist varies between the peripheral portion and the central portion of the semiconductor chip, exceeding the allowable value.

In view of the above situation, the present invention can prevent the occurrence of variation exceeding the allowable value of the patterning dimension, which has occurred in the exposure by the correction based on the parameters such as the rotation, inclination, and offset of each semiconductor chip. The present invention aims to provide a method of manufacturing a semiconductor device that can be performed.

[0011]

A first method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which exposure is performed using a reticle of a semiconductor chip formed on a semiconductor substrate. The active region of the semiconductor chip is divided into a plurality of divided regions by the alignment mark provided in the active region and the alignment mark provided in the active region of the semiconductor chip, and the position of the semiconductor substrate is divided into these divided regions. Exposure is performed after the step of detecting the deviation and the correction obtained by integrating the positional deviation of each of these divided areas in units of this semiconductor chip are uniformly applied to the entire semiconductor chip to perform alignment. And a process.

A second method of manufacturing a semiconductor device according to the present invention is
The active area of the semiconductor chip is divided into a plurality of divided areas by the alignment mark provided in the inactive area of the semiconductor chip and the alignment mark provided in the active area of the semiconductor chip. It is configured to include a step of detecting the positional deviation of the semiconductor substrate and a step of performing a correction based on the positional deviation for each of the plurality of divided area units and performing an exposure for each of the divided area units.

[0013]

That is, in the present invention, the alignment mark is also provided in the active region of the semiconductor chip, and the semiconductor chip is divided into a plurality of divided regions in combination with the alignment mark provided in the inactive region of the semiconductor chip. Parameters such as rotation, inclination, and offset are obtained for each divided area, and exposure is performed using these parameters.Therefore, allow patterning dimensions that have occurred during exposure by correction based on parameters such as rotation, inclination, and offset for each semiconductor chip. It is possible to reduce the variation exceeding the value.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to an embodiment of the present invention in which an active region is divided into four will be described in detail below with reference to FIG.

FIG. 1 is a view showing the arrangement of alignment marks of a semiconductor device according to an embodiment of the present invention. In the semiconductor substrate 1 forming the semiconductor chip 11 of the semiconductor device of one embodiment according to the present invention, as shown in FIG.
In the inactive region 11b around the active region 11a of the semiconductor chip 11 formed on the substrate, alignment marks 11c as shown in the figure are formed.
Is formed, and an alignment mark 11d is also provided at the center of the active region 11a of the semiconductor chip 11.

When exposure is performed using a reticle in the process of manufacturing such a semiconductor chip, the alignment mark 11c and the active region 11 provided in these inactive regions 11b are used.
With the alignment mark 11d provided on a, the active area 11a
Is divided into four divided regions 21, 22, 22, and 24, and parameters such as rotation, inclination, and offset are obtained for each divided region, and these divided regions 21, 22, 23, Rotation, inclination, and offset for each 24 are integrated into this semiconductor chip 11 unit, and correction based on rotation, inclination, and offset is uniformly applied to the entire semiconductor chip 11 to perform alignment, and then the entire semiconductor chip 11 is adjusted. The exposure is done at once. Alternatively, prepare each reticle for each divided area 21, 22, 23, 24, prepare each reticle for each divided area 21, 22, 23, 24, and position each divided area 21, 22, 23, 24. Matching and exposure may be performed.

Further, when exposure is performed by using an electron beam in the manufacturing process of such a semiconductor chip, the alignment mark 11c provided on the inactive region 11b and the alignment mark 11d provided on the active region 11a. The active region 11a is divided into four divided regions 21, divided regions 22, divided regions 23, and divided regions 24 by, and parameters such as rotation, inclination, and offset are obtained for each divided region. , 23,24 units of rotation, slope,
The offset-based correction is applied to each of the divided areas 21, 22, 23, and 24 to perform alignment, and exposure is performed by the electron beam for each divided area 21, 22, 23, and 24 units.

In the present embodiment, the case where the active region is divided into four has been described. However, if the active region is divided into nine parts as shown in FIG. It is possible to perform the exposure in combination.

[0019]

As is apparent from the above description, according to the present invention, a very simple alignment mark is provided in the active area of a semiconductor chip, and the active area is divided into a plurality of divided areas. Rotation, inclination,
Since the alignment and the exposure can be performed by the correction based on the parameters such as the offset, there is an advantage that the alignment and the exposure can be performed with extremely high accuracy, and the remarkable economic and reliability improving effects can be obtained. It is possible to provide an expected semiconductor device manufacturing method.

[Brief description of drawings]

FIG. 1 is a diagram showing an arrangement of alignment marks of a semiconductor device according to an embodiment of the present invention,

FIG. 2 is a view showing the arrangement of alignment marks of a semiconductor device according to another embodiment of the present invention,

FIG. 3 is a view showing the arrangement of alignment marks of a conventional semiconductor device,

[Explanation of symbols]

1 is a semiconductor substrate, 11 is a semiconductor chip, 11a is an active region, 1
1b is an inactive area, 11c is an alignment mark, 11d is an alignment mark, 21,22,23,24 are divided areas,

Claims (2)

[Claims] 1. A semiconductor chip formed on a semiconductor substrate (1)
A method for manufacturing a semiconductor device in which exposure is performed using the reticle of (11), wherein the alignment mark (11c) provided in the inactive region (11b) of the semiconductor chip (11) and the activation of the semiconductor chip (11). Area (11a)
The alignment mark (11d) provided inside divides the active area (11a) of the semiconductor chip (11) into a plurality of divided areas (21, 22, 2).
3,24), a step of detecting the positional deviation of the semiconductor substrate (1) for each of the divided areas (21,22,23,24), and a plurality of divided areas (21,22,23,24) ) A step of exposing after exposing the semiconductor chip (11) by uniformly adding the corrections obtained by integrating the respective positional deviations in the unit of the semiconductor chip (11) to the entire semiconductor chip (11) and performing alignment. A method for manufacturing a semiconductor device, comprising: 2. An alignment mark (11c) provided on the inactive region (11b) and an active region (1) of the semiconductor chip (11).
The alignment mark (11d) provided in 1a) divides the active area (11a) of the semiconductor chip (11) into a plurality of divided areas (21,
(22,23,24) and detecting the positional deviation of the semiconductor substrate (1) for each of the divided regions (21,22,23,24), and a plurality of divided regions (21,22,23) , 24) A correction based on the positional deviation is performed for each unit, and an exposure is performed for each of the divided regions (21, 22, 23, 24), and a method of manufacturing a semiconductor device, comprising: