JPH0561680B2 - - Google Patents
Info
- Publication number
- JPH0561680B2 JPH0561680B2 JP21079890A JP21079890A JPH0561680B2 JP H0561680 B2 JPH0561680 B2 JP H0561680B2 JP 21079890 A JP21079890 A JP 21079890A JP 21079890 A JP21079890 A JP 21079890A JP H0561680 B2 JPH0561680 B2 JP H0561680B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- trigger
- ram
- counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 claims description 13
- 230000004044 response Effects 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 4
- 230000001960 triggered effect Effects 0.000 description 4
- 230000001052 transient effect Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Landscapes
- Indicating Measured Values (AREA)
- Recording Measured Values (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21079890A JPH04143665A (ja) | 1990-08-08 | 1990-08-08 | 信号記憶方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21079890A JPH04143665A (ja) | 1990-08-08 | 1990-08-08 | 信号記憶方法 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55126884A Division JPS5752995A (en) | 1980-09-12 | 1980-09-12 | Memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04143665A JPH04143665A (ja) | 1992-05-18 |
JPH0561680B2 true JPH0561680B2 (enrdf_load_html_response) | 1993-09-06 |
Family
ID=41278257
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21079890A Granted JPH04143665A (ja) | 1990-08-08 | 1990-08-08 | 信号記憶方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04143665A (enrdf_load_html_response) |
-
1990
- 1990-08-08 JP JP21079890A patent/JPH04143665A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH04143665A (ja) | 1992-05-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0159588B1 (en) | Logic analyzer | |
EP0356999B1 (en) | Memory tester | |
JPS6219704B2 (enrdf_load_html_response) | ||
US4558422A (en) | Digital signal sampling system with two unrelated sampling timebases | |
JP2007018501A (ja) | デュアルポートメモリ内のデータを更新する装置及び方法 | |
US4356482A (en) | Image pattern control system | |
JPH02271447A (ja) | データ記憶装置のデータ消去方法 | |
JPS61295723A (ja) | 波形デ−タ圧縮回路 | |
JPH0145678B2 (enrdf_load_html_response) | ||
JPH0561680B2 (enrdf_load_html_response) | ||
JPH0561566B2 (enrdf_load_html_response) | ||
US4414645A (en) | Hardware-firmware CRT display link system | |
GB2168225A (en) | Signal controlled waveform recorder | |
JPS6112548B2 (enrdf_load_html_response) | ||
CA1151329A (en) | Method of displaying logic signals for a logic signal measurement apparatus | |
JPH03243863A (ja) | 波形表示装置 | |
JPS5876997A (ja) | 信号測定装置 | |
JP2921291B2 (ja) | パターン信号発生器に同期したac測定電圧印加回路 | |
JPH05107314A (ja) | Ic試験装置 | |
JP2946587B2 (ja) | ディジタル・ストレージ・オシロスコープのトリガ回路 | |
JP3005807B2 (ja) | 波形記録計 | |
USRE34843E (en) | Signal controlled waveform recorder | |
JP2596196Y2 (ja) | デジタルオシロスコ−プのロ−ル表示方式 | |
JPS6055019B2 (ja) | 輝度変調方式 | |
US20050234665A1 (en) | Waveform measuring apparatus |