JPH0561429A - Lcd display device - Google Patents

Abstract

PURPOSE:To obtain the LCD display device which facilitates operation and is easily manufactured and developed while enabling the same segment driver to be used as segment drivers for an upper and a lower part. CONSTITUTION:The LCD display device which has a common driver 1 and plural segment drivers 10 and above and below an LCD 8 is provided with an address converting circuit 2 which inverts the array of bits of data of the common driver 1 and segment drivers 10 and 9 of one of the upper and lower parts between the common driver 1 and segment drivers 10 and 9 of one of the upper and lower parts.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LCD display device, and more specifically, to a large screen LCD display device in which segment drivers are arranged in a row.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 6, a common driver 10 is used in a device for displaying a large screen LCD.
0 (H1 to H146) and an upper segment driver (B ₁ ··· B ₄ ) 101 and a lower segment driver (A ₁ ·· A ₄ ) 102 on the upper and lower parts of the LCD 103 arranged adjacent to the common driver 100, respectively. Are arranged. Thus, by arranging the segment drivers above and below the LCD, the LCD screen is displayed twice as much as the configuration in which the segment drivers are connected to the LCD only from one direction from the bottom or the top. The segment output direction of the upper segment driver (B ₁ ··· B ₄ ) 101 is S1 at the right end and S112 is the left end, while the lower segment driver (A ₁ ··· A ₄ ) 102 is in the output direction at S1 left end and S112. Was the right end, and the output directions of the upper part and the lower part were opposite.

[0003]

By the way, in the prior art as described above, since the upper and lower segment driver outputs are in opposite directions, separate segment drivers are used for the upper segment driver and the lower segment driver. It was necessary, and each LSI had to be provided separately. As described above, the conventional technique has a problem in that much labor and time are required in terms of operation, manufacturing and development.

The present invention has been made to solve these problems, and the same upper segment driver and lower segment driver can be used, and the LSIs used by the segments are the same. It is an object of the present invention to provide an LCD display device that can be manufactured, is easy to operate, and is easy to manufacture and develop.

[0005]

In order to achieve the above object, an LCD display device of the present invention receives data from a common signal generating unit and a data from a CPU provided in the LCD and receives them. A common driver for processing data and transmitting a plurality of bits of processing data obtained by the processing and a predetermined control signal, and a common driver for storing the processing data and the control signal and displaying them on an LCD. In the LCD display device having a segment driver for generating a segment signal, and a plurality of the segment drivers arranged on the upper part and the lower part of the LCD, respectively, the common driver and one of the upper and lower segment drivers are provided. In the meantime, an address conversion circuit for reversing the bit arrangement of the processed data is It is characterized by being provided.

[0006]

The output direction of one segment driver becomes the same as the output direction of the other segment driver due to the address conversion circuit configured to select the block after the designated block is inverted.

[0007]

Embodiment FIG. 1 is a diagram showing a hardware configuration of an embodiment of the present invention. In this embodiment, an LCD display device of an electronic notebook will be described as an example. CPU3 that controls the electronic notebook,
A RAM 6 used for controlling the electronic notebook and used as a working area for a memory and a program, a ROM 7 storing a program for operating the electronic notebook, display fonts and calendar data, and an RT for clock timing.
A C12 (real time clock), a power supply 13 for driving the CPU 3, a key matrix 4 for detecting a key input, and a transparent touch key matrix 5 used when an IC card is used are provided.

The common driver 1 receives data from the common signal generator in the LCD 8 and the CPU 3, and performs various calculations and controls based on the data. Further, an upper segment driver 10 and a lower segment driver 9 are provided above and below the LCD 8 in between. The segment driver 10 and the segment driver 9 store the control signal and data sent from the common driver 1 described above, and also generate a segment signal for displaying the data on the LCD 8. These segment drivers (No. 1 to No. 8) are the same, and the common driver 1 is configured to access any one of the eight segment drivers 9. Further, an inverting circuit 2 for inverting the output direction of the upper segment driver 10 is provided between the common driver 1 and the upper segment driver 10. Also,
The liquid crystal power supply 11 is an IC for supplying power to the common driver 1, the upper segment driver 10 and the lower segment driver 9.

Next, the operation of the large-screen LCD display device using the inverting circuit 2 according to the embodiment of the present invention having the above hardware structure will be described with reference to FIG. In this embodiment, the common driver 1 and eight segment drivers (No. 1 to No. 8) are provided, so that a maximum of 2
It is possible to realize a 92 × 896 DOT liquid crystal display.

Scan line signals for displaying the LCD 8 generated from the common driver 1 are transmitted to a maximum of 146 data buses. Then, the same signal is transmitted twice to the LCD 8 for the upper segment driver 10 and the lower segment driver 9 to increase the screen size. That is, L
The upper half data of the CD8 display is displayed by the upper segment driver 10, and the lower half data is displayed by the lower segment driver 9. As described above, since the inverting circuit 2 for inverting the output direction of the upper segment driver 10 is provided, S1 is the right end and S112 is the left end in the segment output direction of the upper segment driver 10. Therefore, the same LSI as the lower segment driver can be used as the upper segment driver.

Next, signal connection between the common driver 1, the upper segment driver 10 and the lower segment driver 9 will be described below. First, the lower segment driver 9 (No.5,6,7,8) has the RA
Four X-direction addresses (AX0 to AX3) to access M, Y
8 direction addresses (AY0 to AX7), data bus (LDI00 to LD
8 I07) and segment selection signals (LCE5,6,7,8)
However, one is included for each segment driver 9. Also, the upper segment driver 10 (No.1,2,3,4)
Address in the X direction (BX0 to
BX3) 4 lines, Y direction address (AY0 to AX7) 8 lines, data bus (LDI07 to
8 LDI00) and segment selection signals (LCE1,2,3,
4) is provided for each segment driver 10.

Next, the operation of inverting the segment output in the LCD display device having the above construction will be described in detail. FIG. 3 shows the arrangement of upper and lower segment driver data. The upper diagram in Fig. 3 shows the arrangement of the lower segment drivers (No.5 to No.8). This segment driver collectively accesses the RAM in which 8BIT data is arranged side by side from 8 data buses. The X direction (horizontal direction) is selected by AX0 to AX3, and the Y direction (vertical direction) is
Selected by AY0 to AY7. Here the data MSB (LDI0
(Corresponding to 7) is the left end (position of S1), and LSB (corresponding to LDI00) is the right end (position of S8). In this case, the problematic X direction (left and right direction in the figure) is determined by the X direction address (AX0 to AX3), and the designated block shown in FIG.
For (0), the block (D) after inversion is selected. The blocks B ₀ , B ₁ , and
B ₂ and B ₃ are logical expressions (1), (2), (3), and
It can be obtained by (4).

The lower diagram of FIG. 3 shows the arrangement of the upper segment drivers (No. 1 to No. 4). The upper segment is
The segment output direction of the lower segment must be reversed. Therefore, for example, when accessing the designated block (0), the inverted block (D)
The address is converted to access by specifying. That is, the address conversion in the X direction shown in FIG. 4A is performed. Table 1 shows the signals to be inserted corresponding to the terminal names of the data bus of the upper segment. As shown in Table 1, if the upper and lower sides of the data bus are reversed so that LDI00 corresponds to the MSB of the data (S8 position) and LDI07 corresponds to the LSB, the above segment output will be output. Is reversed.

[0014]

[Table 1]

As described above, the address conversion is configured to select the inverted block corresponding to the designated block shown in FIG. 4 (converted from AX0 to AX3 → BX0 to BX3), and the upper and lower parts of the data bus are exchanged. As a result, the upper segment driver and the lower segment driver have the same segment output, so that the same LSI can be used.

FIG. 5 is a circuit diagram for realizing the address conversion in the X direction shown in FIG. Block B ₀ , B after inversion
₁ , B ₂ , B ₃ are respectively the above logical expressions (1), (2), (3), (4)
Corresponding to each of the NOT circuit and NAND
It is composed of a combination of circuits.

[0017]

As described above, according to the present invention, since the simple address conversion circuit is inserted between the common driver and the segment driver, the output direction of one segment driver is the same as that of the other segment driver. become. Therefore, simply by swapping the data buses,
Since the same segment can be used and the same LSI can be used, the operation is simple and the manufacturing and development can be easily performed.

[Brief description of drawings]

FIG. 1 is a diagram showing a hardware configuration of an embodiment of the present invention.

FIG. 2 is a diagram for explaining the operation of the embodiment of the present invention.

FIG. 3 is a diagram illustrating an embodiment of the present invention.

FIG. 4 is a diagram illustrating an embodiment of the present invention.

FIG. 5 is a circuit diagram of an embodiment of the present invention.

FIG. 6 is a diagram illustrating a conventional example.

[Explanation of symbols]

 1 ... Common driver 2 ... Inversion circuit 8 ... LCD 9 ... Lower segment driver 10 ... Upper segment driver

Claims (1)

[Claims] 1. A device for receiving data from a common signal generator provided in an LCD and data from a CPU, processing the data, and processing data of a plurality of bits obtained by the processing and a predetermined data. A common driver for transmitting a control signal and a segment driver for storing the processed data and the control signal and for generating a segment signal for displaying on the LCD are provided. In a plurality of LCD displays arranged in the lower part, an address conversion circuit for reversing the bit arrangement of the processed data is provided between the common driver and either the upper or lower segment driver. An LCD display device characterized by the above.