JPH0560250B2 - - Google Patents

Info

Publication number
JPH0560250B2
JPH0560250B2 JP26881384A JP26881384A JPH0560250B2 JP H0560250 B2 JPH0560250 B2 JP H0560250B2 JP 26881384 A JP26881384 A JP 26881384A JP 26881384 A JP26881384 A JP 26881384A JP H0560250 B2 JPH0560250 B2 JP H0560250B2
Authority
JP
Japan
Prior art keywords
semiconductor wafer
polished
wafer
bonding
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP26881384A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61145839A (ja
Inventor
Masaru Shinho
Kyoshi Fukuda
Kazuyoshi Furukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP26881384A priority Critical patent/JPS61145839A/ja
Publication of JPS61145839A publication Critical patent/JPS61145839A/ja
Publication of JPH0560250B2 publication Critical patent/JPH0560250B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
JP26881384A 1984-12-20 1984-12-20 半導体ウエ−ハの接着方法および接着治具 Granted JPS61145839A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26881384A JPS61145839A (ja) 1984-12-20 1984-12-20 半導体ウエ−ハの接着方法および接着治具

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26881384A JPS61145839A (ja) 1984-12-20 1984-12-20 半導体ウエ−ハの接着方法および接着治具

Publications (2)

Publication Number Publication Date
JPS61145839A JPS61145839A (ja) 1986-07-03
JPH0560250B2 true JPH0560250B2 (de) 1993-09-01

Family

ID=17463609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26881384A Granted JPS61145839A (ja) 1984-12-20 1984-12-20 半導体ウエ−ハの接着方法および接着治具

Country Status (1)

Country Link
JP (1) JPS61145839A (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6271215A (ja) * 1985-09-25 1987-04-01 Toshiba Corp ウエハ接合装置
JP2642645B2 (ja) * 1987-11-19 1997-08-20 株式会社日立製作所 半導体基板の製造方法及び半導体装置の製造方法
JP2589994B2 (ja) * 1987-12-24 1997-03-12 富士通株式会社 ウェーハの接着方法
US4837177A (en) * 1987-12-28 1989-06-06 Motorola Inc. Method of making bipolar semiconductor device having a conductive recombination layer
US6635941B2 (en) * 2001-03-21 2003-10-21 Canon Kabushiki Kaisha Structure of semiconductor device with improved reliability
TWI283906B (en) * 2001-12-21 2007-07-11 Esec Trading Sa Pick-up tool for mounting semiconductor chips
WO2003097552A1 (en) 2002-04-30 2003-11-27 Agency For Science Technology And Research A method of wafer/substrate bonding
US7259466B2 (en) 2002-12-17 2007-08-21 Finisar Corporation Low temperature bonding of multilayer substrates
US7361593B2 (en) 2002-12-17 2008-04-22 Finisar Corporation Methods of forming vias in multilayer substrates
FR2860178B1 (fr) * 2003-09-30 2005-11-04 Commissariat Energie Atomique Procede de separation de plaques collees entre elles pour constituer une structure empilee.
US7650688B2 (en) 2003-12-31 2010-01-26 Chippac, Inc. Bonding tool for mounting semiconductor chips
US7153759B2 (en) 2004-04-20 2006-12-26 Agency For Science Technology And Research Method of fabricating microelectromechanical system structures
KR101422867B1 (ko) 2006-06-29 2014-07-23 가부시키가이샤 니콘 웨이퍼 접합 장치
WO2010055730A1 (ja) * 2008-11-14 2010-05-20 東京エレクトロン株式会社 貼り合わせ装置及び貼り合わせ方法
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
JP6501447B2 (ja) 2013-03-26 2019-04-17 芝浦メカトロニクス株式会社 貼合装置および貼合基板の製造方法
US10586727B2 (en) 2013-09-25 2020-03-10 Shibaura Mechatronics Corporation Suction stage, lamination device, and method for manufacturing laminated substrate
EP3501037B1 (de) * 2017-09-21 2020-01-29 EV Group E. Thallner GmbH Vorrichtung und verfahren zum verbinden von substraten

Also Published As

Publication number Publication date
JPS61145839A (ja) 1986-07-03

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term