JPH0555287A - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JPH0555287A
JPH0555287A JP3213409A JP21340991A JPH0555287A JP H0555287 A JPH0555287 A JP H0555287A JP 3213409 A JP3213409 A JP 3213409A JP 21340991 A JP21340991 A JP 21340991A JP H0555287 A JPH0555287 A JP H0555287A
Authority
JP
Japan
Prior art keywords
lead frame
coil
integrated circuit
bonding wire
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3213409A
Other languages
English (en)
Inventor
Satoshi Sawada
智 澤田
Akira Nakada
章 中田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP3213409A priority Critical patent/JPH0555287A/ja
Publication of JPH0555287A publication Critical patent/JPH0555287A/ja
Pending legal-status Critical Current

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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
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  • Physics & Mathematics (AREA)
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  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Wire Bonding (AREA)

Abstract

(57)【要約】 【目的】半導体集積回路の出力端子からでる電磁波の不
要輻射の出力レベルを減衰させ、システム自身及び外部
機器に対する影響を削減させる。 【構成】半導体集積回路内のボンディングワイヤーはコ
イル形状で、チップとリードフレームとがボンディング
ワイヤーで接続され、リードフレームと接地電位間をチ
ップ内に形成したトランジスタの容量を用いて接続、樹
脂はフェライトを含有している。

Description

【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は、半導体集積回路から電
気信号を出力するための、出力端子の回路形成方法に関
する。
【０００２】
【従来の技術】現在、半導体集積回路は、数多くの電気
製品に利用され、小型、多機能化を実現してきた。
【０００３】しかし最近、半導体集積回路自身から輻射
される電磁波によるシステム全体の誤動作、また受信装
置への混信を問題視するケースが多くなってきている。
【０００４】半導体集積回路から輻射される電磁波は主
にエネルギーレベルの高い出力端子から輻射されるもの
である。この様な不要輻射が発生する原因は、出力波形
が方形波であり多くの高調波成分を含んでいる為であ
る。したがって、出力端子から輻射される周波数成分は
基本波の他に基本波の近傍及び基本波の正数倍にスプリ
アスを共なっている。
【０００５】近年、半導体集積回路の高集積度化が進む
につれて、集積される回路及び入力・出力の端子数は増
大する傾向にある。しかし、図７の従来の半導体集積回
路の出力部分の構造図で示されるように、不要輻射の低
減対策を行っている端子は殆ど無く、半導体集積回路を
使用してシステムを組む場合、システムの基板上で自己
防衛対策を行っているのが現状である。
【０００６】
【発明が解決しようとする課題】前記の様に、半導体集
積回路からの不要輻射に関する対策はシステム内部で行
わなければならなかった。本発明は、この様な従来技術
の不具合点を解消するもので、最小限の素子の追加によ
って半導体集積回路からの不要輻射の低減を目的として
いる。
【０００７】
【課題を解決するための手段】本発明は、チップとボン
ディングワイヤーとリードフレームと樹脂を含む半導体
集積回路装置において、ボンディングワイヤーはコイル
形状で、チップとリードフレームとがボンディングワイ
ヤーで接続され、リードフレームと接地電位間をチップ
内に形成したトランジスタの容量を用いて接続、樹脂は
フェライトを含有している事を特徴としている。
【０００８】
【作用】本発明の上記手段によりチップとリードフレー
ム間にフィルターが形成され、出力端子から輻射される
高調波成分を低減させる事ができる。
【０００９】
【実施例】以下、実施例に基づいて本発明を詳細に説明
する。
【００１０】図１は本発明を実施した集積回路の出力回
路の例である。この回路は出力パッドと出力ピン間にＴ
型の定Ｋ型ローパスフィルターを挿入したものである。
【００１１】各素子は次の様に形成する。まずフィルタ
ーの入力部分のコイルは、集積回路内部のチップの出力
パッドとリードフレーム間を継ぐボンディングワイヤー
を変形し空心コイルにする。この空心コイル拡大図を図
２に示す。フィルターの出力部分のコイルは、リードフ
レームをフェライトを含んだパッケージで上下から挟み
コイルを形成する。このフェライトを使ったコイルの断
面図を図３に示す。
【００１２】コンデンサはチップ内に容量接続用のトラ
ンジスタを形成し、このゲート容量を利用する。このト
ランジスタのゲートは専用のパッドを持っており、この
パッドとリードフレームをボンディングワイヤーで接続
してリードフレームとアース間に容量を付ける事ができ
る。
【００１３】この様に前述した２個のコイルと容量によ
りＴ型の定Ｋ型ローパスフィルターを形成する事ができ
る。
【００１４】従来、集積回路の出力部分にはフィルター
は挿入されていない為、図４の様な周波数成分を出力端
子から放射していた。
【００１５】今回挿入したローパスフィルターの一般的
な特性を図５に示す。
【００１６】この特性は通過帯域と減衰帯域に分けるこ
とができる。したがって出力パッドからでる基本波をフ
ィルターの通過帯域に、２倍以上の高調波を減衰帯域に
なる様にの値を設定する事で出力端子から出る高調波成
分を抑圧することができる。
【００１７】このフィルターのコイル３、コイル５とコ
ンデンサ４の定数は次式より求めることができる。
【００１８】 Ｌ1＝Ｌ2＝Ｚ0／（２πｆ） Ｃ1＝１／（２πｆＺ0） Ｌ1 ：フィルターの入力側コイルのインダクタンス［Ｈ］ Ｌ2 ：フィルターの入力側コイルのインダクタンス［Ｈ］ Ｃ1 ：リードフレームとアース間ののリアクタンス［Ｆ］ Ｚ0 ：フィルターの入出力インピーダンス ［Ω］ ｆ ：設計周波数 ［Ｈｚ］ Ｌ１，Ｌ２，Ｃ１の値を算出する場合、出力されるデー
タサイクルの最高周波数に設計周波数を設定する。この
場合の通過帯域は設計周波数の１．５５倍の周波数とな
る。
【００１９】Ｔ型の定Ｋ型ローパスフィルターを挿入し
た場合の出力端子から輻射される周波数成分を図６に示
す。
【００２０】
【発明の効果】以上述べてきた様に、本発明によれば、
ボンディングワイヤーを利用してローパスフィルターを
形成することにより半導体集積回路の出力端子からの高
調波の不要輻射を効果的に減少させる事が可能になっ
た。
【００２１】従って、半導体装置全体としての高調波に
よる不要輻射の発生を抑制することが可能になり誤動作
の発生、受信設備への混信の低減が可能になった。
【００２２】特に、本発明は、多数の出力端子を有する
大規模集積回路において著しく大きな効果を得ることが
できるであろう。
【図面の簡単な説明】
【図１】本発明を実施した半導体集積回路装置の出力回
路の構造図。
【図２】本発明を実施したボンディングワイヤーを変形
したコイルの拡大図。
【図３】本発明を実施したリードフレームの回りをフェ
ライトで囲んだコイルの断面図。
【図４】従来技術による半導体集積回路装置の出力端子
から輻射される周波数スペクトラムの例を示す図。
【図５】本発明を実施したローパスフィルターの周波数
特性の例を示す図。
【図６】本発明を実施した半導体集積回路装置の出力端
子から輻射される周波数スペクトラムの例を示す図。
【図７】従来の半導体集積回路の出力部分の構造図。
【符号の説明】
１ チップのウエハー ２ 容量接続用パッド ３ チップの出力パッド ４ ボンディングワイヤー ５ ボンディングワイヤーを変形したコイル ６ リードフレーム ７ コーティング材 ８ フェライト ９ 樹脂 １０ 通過帯域 １１ 減衰帯域

Claims (1)

    【特許請求の範囲】
  1. 【請求項１】 チップとボンディングワイヤーとリード
    フレームと樹脂を含む半導体集積回路装置において、ボ
    ンディングワイヤーはコイル形状で、チップとリードフ
    レームとがボンディングワイヤーで接続され、リードフ
    レームと接地電位間をチップ内に形成したトランジスタ
    の容量を用いて接続、樹脂はフェライトを含有している
    事を特徴とする半導体集積回路装置。
JP3213409A 1991-08-26 1991-08-26 半導体集積回路装置 Pending JPH0555287A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3213409A JPH0555287A (ja) 1991-08-26 1991-08-26 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3213409A JPH0555287A (ja) 1991-08-26 1991-08-26 半導体集積回路装置

Publications (1)

Publication Number Publication Date
JPH0555287A true JPH0555287A (ja) 1993-03-05

Family

ID=16638753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3213409A Pending JPH0555287A (ja) 1991-08-26 1991-08-26 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPH0555287A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998036454A1 (en) * 1997-02-18 1998-08-20 The Whitaker Corporation Integrated circuit having a parasitic resonance filter
EP1168607A3 (en) * 2000-06-22 2005-12-28 Texas Instruments Incorporated An on-chip signal filter with bond wire inductors
JP2007189241A (ja) * 1999-02-25 2007-07-26 Formfactor Inc 集積回路の相互接続システム

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998036454A1 (en) * 1997-02-18 1998-08-20 The Whitaker Corporation Integrated circuit having a parasitic resonance filter
JP2007189241A (ja) * 1999-02-25 2007-07-26 Formfactor Inc 集積回路の相互接続システム
EP1168607A3 (en) * 2000-06-22 2005-12-28 Texas Instruments Incorporated An on-chip signal filter with bond wire inductors

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