JPH0555241A - Diode and manufacture thereof - Google Patents

Diode and manufacture thereof

Info

Publication number
JPH0555241A
JPH0555241A JP3214994A JP21499491A JPH0555241A JP H0555241 A JPH0555241 A JP H0555241A JP 3214994 A JP3214994 A JP 3214994A JP 21499491 A JP21499491 A JP 21499491A JP H0555241 A JPH0555241 A JP H0555241A
Authority
JP
Japan
Prior art keywords
layer
emitter
electrode
diode
concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3214994A
Other languages
Japanese (ja)
Inventor
Mikio Takada
幹雄 高田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP3214994A priority Critical patent/JPH0555241A/en
Publication of JPH0555241A publication Critical patent/JPH0555241A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To provide a diode wherein a collector and a base of a transistor are connected as one electrode while an emitter as the other electrode, having a high backward breakdown strength and an easy assembling structure. CONSTITUTION:In this diode, an electrode connecting a low concentration base layer 4a encircled by separating layers formed on a high impurity concentration emitter layer 3 with collector layers 6 is specified as one electrode while an emitter as the other electrode. Thus, due to the low concentration of the base layer 4a, the backward breakdown strength of emitter junction is higher while due to the high concentration of the emitter, the current amplification factor is large thereby enabling the forward potential decline to be minimized. Furthermore, one and the other electrodes are composed respectively on one and the other surfaces thereby notably facilitating the assembling step.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は順方向電圧の低いダイ
オードおよびその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diode having a low forward voltage and a manufacturing method thereof.

【0002】[0002]

【従来の技術】従来整流作用を有するダイオードはP−
N接合で形成され逆方向の耐圧は十分高くすることがで
き、逆方向もれ電流も少ない。
2. Description of the Related Art Conventional diodes having a rectifying function are P-
The breakdown voltage in the reverse direction, which is formed by the N-junction, can be sufficiently high, and the reverse leakage current is small.

【0003】しかしながら順方向の電圧降下は例えばシ
リコンでなるダイオードの場合は、約0.7V程度あり
電力のロスとなっており用途によっては順方向の電圧降
下の小さいダイオードが求められる。
However, the forward voltage drop is about 0.7 V in the case of a diode made of silicon, for example, which results in power loss, and a diode with a low forward voltage drop is required depending on the application.

【0004】そこでショットキーバリア接合によるダイ
オードであれば順方向電圧降下は小さくなって一部用途
には使用されている。
Therefore, a diode having a Schottky barrier junction has a small forward voltage drop and is used in some applications.

【0005】しかしながらショットキーバリア接合によ
るダイオードは逆方向耐圧が高いものが得られず用途が
限定される。
However, a diode having a Schottky barrier junction cannot have a high reverse breakdown voltage and its application is limited.

【0006】一方図5に示す回路図のようにたとえばN
PNトランジスタのコレクタとベースを接続しアノード
1とし、エミッタをカソード2とする使用方法がある。
尚PNPトランジスタを用いる場合はアノードとカソー
ドが逆になる点が異なるのみである。
On the other hand, as shown in the circuit diagram of FIG.
There is a method of use in which the collector and the base of the PN transistor are connected to each other to form the anode 1 and the emitter to form the cathode 2.
When a PNP transistor is used, the only difference is that the anode and cathode are reversed.

【0007】上述の方法は順方向電圧降下に関しては通
常のPN接合のみによるダイオードに比較小さくなる。
The above-mentioned method is smaller in forward voltage drop than a diode having only a normal PN junction.

【0008】しかしながら通常のトランジスタはエミッ
タ接合の逆方向耐圧は低くしたがって、ダイオードの逆
耐圧が高いものが得られない。
However, since the normal transistor has a low reverse breakdown voltage of the emitter junction, a diode having a high reverse breakdown voltage cannot be obtained.

【0009】さらに通常のトランジスタはコレクタ電極
が裏面,ベース電極及びエミッタ電極が表面に形成され
るので、通常のダイオードのように表裏に電極を設けた
チップに対応するケースたとえばDHD(ダブルヒート
シンクダイオード)ケースに収納するようチップに電極
を設けることもむずかしい。
Furthermore, since a collector electrode is formed on the back surface and a base electrode and an emitter electrode are formed on the front surface of a normal transistor, a case corresponding to a chip having electrodes on the front and back sides like a normal diode, for example, a DHD (double heat sink diode) is provided. It is difficult to provide an electrode on the chip so that the chip can be housed in the case.

【0010】そこで図6のようにたとえばNPNトラン
ジスタのベースとエミッタとを接続しアノード1aと
し、コレクタをカソード2aとする方法が考えられる。
Therefore, as shown in FIG. 6, for example, a method of connecting the base and the emitter of the NPN transistor to form the anode 1a and the collector to the cathode 2a can be considered.

【0011】この方法によればダイオードの逆耐圧はP
NPトランジスタのコレクタ接合であるから十分高くし
得る。
According to this method, the reverse breakdown voltage of the diode is P
Since it is the collector junction of the NP transistor, it can be made sufficiently high.

【0012】また、ベース電極,エミッタ電極はチップ
の表面側にあるのでカソード電極は簡単に形成すること
ができて従来のP−N接合によるダイオードチップ同様
に表裏に電様を形成することができる。
Further, since the base electrode and the emitter electrode are on the surface side of the chip, the cathode electrode can be easily formed and the patterns can be formed on the front and back sides like the conventional diode chip by the P-N junction. ..

【0013】しかしながら、この方法はもともとコレク
タとして不純物の濃度の低い方をエミッタとして用いる
ので電流増幅率が低く、順方向電圧降下を小さくする作
用がほとんどなく、本来のベースコレクタのP−N接合
の特性とほとんど同じとなってしまう。
However, according to this method, since the collector having a lower impurity concentration is used as the emitter, the current amplification factor is low, there is almost no effect of reducing the forward voltage drop, and the original P-N junction of the base collector is used. The characteristics are almost the same.

【0014】[0014]

【発明が解決しようとする課題】そこで本発明は順方向
電圧降下が小さくて逆方向耐圧は高くでき、しかもチッ
プの一方の面にアノード電極,他方の面にカソード電極
を形成して組立容易なダイオードを提供することを目的
とする。
Therefore, the present invention has a small forward voltage drop and a high reverse breakdown voltage, and is easy to assemble by forming an anode electrode on one surface of the chip and a cathode electrode on the other surface. It is intended to provide a diode.

【0015】[0015]

【課題を解決するための手段】この発明のダイオードは
高不純物濃度の一導電型でなるエミッタ層と、前記エミ
ッタ層上にあり、表面を有して形成されれ、低不純物濃
度の他導電型でなり、周囲を表面から前記エミッタ層に
達する一導電型でなる分離層でかこまれたベース層と、
前記ベース層の表面側に選択的に形成された高不純物濃
度の一導電型でなるコレクタ層とでなり、前記ベース層
と前記コレクタ層を接続する電極を一方の電極とし、エ
ミッタを他方の電極とすることを特徴とする。
DISCLOSURE OF THE INVENTION A diode according to the present invention is an emitter layer of one conductivity type having a high impurity concentration, and an emitter layer formed on the emitter layer and having a surface, and having another conductivity type of a low impurity concentration. And a base layer surrounded by a separation layer of one conductivity type that reaches the emitter layer from the surface,
A collector layer of one conductivity type having a high impurity concentration selectively formed on the surface side of the base layer, wherein the electrode connecting the base layer and the collector layer is one electrode, and the emitter is the other electrode. It is characterized by

【0016】その製法は、エミッタとする高濃度の一導
電型の基板上に反対導電型でなる低不純物濃度のベース
層をエピタキシャル成長して形成することを特徴とす
る。
The manufacturing method is characterized in that a low impurity concentration base layer of opposite conductivity type is formed by epitaxial growth on a high concentration one conductivity type substrate used as an emitter.

【0017】また製法としてはベース層となる低不純物
濃度の反対導電型基板の一方の面から全面に、他方の面
から選択的に一導電型不純物を高濃度に拡散し、一方に
エミッタ層,他方に分離層を同時に形成することを特徴
とする。
As a manufacturing method, one conductivity type impurity is selectively diffused in a high concentration from one surface to the entire surface of the opposite conductivity type substrate having a low impurity concentration serving as a base layer and from the other surface, and an emitter layer, Another feature is that a separation layer is formed at the same time.

【0018】[0018]

【作用】上記構成によればベース層が低不純物濃度であ
るのでエミッタ接合の逆耐圧は高くしたがってダイオー
ドの逆耐圧に高い。
According to the above structure, since the base layer has a low impurity concentration, the reverse breakdown voltage of the emitter junction is high, and thus the reverse breakdown voltage of the diode is high.

【0019】またエミッタは高濃度不純物に形成されて
いるので電流増幅率は高くダイオードの順方向電圧降下
は小さくなる。
Further, since the emitter is formed of a high concentration impurity, the current amplification factor is high and the diode forward voltage drop is small.

【0020】コレクタをベース層の表面に選択的に形成
するのでコレクタとベースを接続する電極形成は同じ面
内で容易に形成できる。
Since the collector is selectively formed on the surface of the base layer, the electrodes for connecting the collector and the base can be easily formed in the same plane.

【0021】さらにエミッタは裏面にあるのでアノード
電極カソード電極はそれぞれ反対面に形成することは容
易でありケースへの組込みが容易となる。
Further, since the emitter is on the back surface, it is easy to form the anode electrode and the cathode electrode on the opposite surfaces, and the assembly into the case is facilitated.

【0022】[0022]

【実施例】本発明のダイオードは等価回路としては従来
の説明に用いた図5と同じとなる。但し従来はエミッタ
接合の逆耐圧が低かったが、本発明においては高くなる
点が異なる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The diode of the present invention has the same equivalent circuit as that shown in FIG. However, although the reverse withstand voltage of the emitter junction has been low in the past, it is different in the present invention.

【0023】本発明の一実施例を製法をともなって説明
する。図1は実施例の各製造工程の断面図である。なお
ダイオードチップは一枚の基板上に多数同時に作り込ま
れるが、1個分のみ図示する。 a)一導電型(たとえばN型)の不純物(たとえばA
s)を高濃度に含むSi基板3を準備し、その表面に他
の導電型不純物(たとえばB)を比較的低濃度に含むP
型層4をエピタキシャル成長により形成する。P型層4
の不純物濃度と厚みはダイオードの特性の要求に応じて
適宜に選ぶ必要がある。逆耐圧を満足する範囲で薄い方
が好ましい。(図1−a参照) b)次にP型層4のベースとなる領域4aを囲んで分離
層5をたとえばPを拡散して形成する。なお分離層5
は、高濃度N型基板3に接続して、島状にベース層4a
を分離する。引き続き、ベース層4aの表面に選択的に
N型不純物たとえばPを拡散して、コレクタ層6を形成
する。
An embodiment of the present invention will be described along with a manufacturing method. FIG. 1 is a sectional view of each manufacturing process of the embodiment. Although many diode chips are simultaneously formed on one substrate, only one diode chip is shown in the figure. a) One conductivity type (eg N type) impurity (eg A)
s) is prepared in a high concentration and a Si substrate 3 is prepared, and P containing a relatively low concentration of another conductivity type impurity (for example, B) on its surface.
The mold layer 4 is formed by epitaxial growth. P-type layer 4
It is necessary to appropriately select the impurity concentration and the thickness of the device according to the requirements of the characteristics of the diode. It is preferable that the thickness is thin as long as the reverse breakdown voltage is satisfied. (See FIG. 1-a) b) Next, a separation layer 5 is formed by diffusing P, for example, so as to surround the region 4a serving as the base of the P-type layer 4. The separation layer 5
Is connected to the high-concentration N-type substrate 3 to form an island-shaped base layer 4a.
To separate. Subsequently, an N-type impurity such as P is selectively diffused on the surface of the base layer 4a to form a collector layer 6.

【0024】なお図示しないがベース層4aの表面にオ
ーミックコンタクトをとるために必要であればB等を拡
散してP型の高濃度層を形成する。P型高濃度層は、上
記コレクタ層6の形成の前でも後でも良い。
Although not shown, if necessary for making ohmic contact with the surface of the base layer 4a, B or the like is diffused to form a P-type high concentration layer. The P-type high concentration layer may be formed before or after the collector layer 6 is formed.

【0025】また図示しないが通常プレーナ技術による
ものであって、拡散のマスク,パッシベーションのため
の酸化膜が形成されている。(図−1b参照) C)次にコレクタ層6とベース層4aとを接続する電極
7を形成するとともに基板3側に電極8を形成すれば電
極7をアノード,電極8をカソードとするダイオードと
なる。
Although not shown in the figure, it is usually based on a planar technique, and a diffusion mask and an oxide film for passivation are formed. (See FIG. 1b) C) Next, if an electrode 7 connecting the collector layer 6 and the base layer 4a is formed and an electrode 8 is formed on the substrate 3 side, a diode having the electrode 7 as an anode and the electrode 8 as a cathode is formed. Become.

【0026】d)その後分離層5の部分で切断分割すれ
ば表裏に電極を有するダイオードチップが完成する。
D) After that, by cutting and dividing at the part of the separation layer 5, a diode chip having electrodes on the front and back sides is completed.

【0027】この実施例によればベース層が低不純物濃
度であるのでエミッタの耐圧を高くしかも電流増幅率を
大きくできる。
According to this embodiment, since the base layer has a low impurity concentration, the breakdown voltage of the emitter can be increased and the current amplification factor can be increased.

【0028】上記NPNトランジスタにかえて、導電型
の異なるPNPとしても同様に実施できる。但し、ダイ
オードとしての電極は反対になる。
The NPN transistor may be replaced by a PNP having a different conductivity type. However, the electrodes as diodes are opposite.

【0029】前記実施例の変形として図2のようにエピ
タキシャル成形による低濃度不純物のP型層4を形成す
る前に基板3に不純物を分散しておいて分離層を表面か
ら拡散した分離層5aと基板3側から拡散した分離層5
bとを接続して形成しても良い。
As a modification of the above embodiment, as shown in FIG. 2, the separation layer 5a is formed by dispersing the impurities in the substrate 3 and diffusing the separation layer from the surface before forming the P-type layer 4 of the low concentration impurity by the epitaxial molding. And the separation layer 5 diffused from the substrate 3 side
It may be formed by connecting with b.

【0030】さらに図3のように表面から拡散する分離
層5aとコレクタ層6aとを同時に形成することもでき
る。
Further, as shown in FIG. 3, the separation layer 5a diffused from the surface and the collector layer 6a can be simultaneously formed.

【0031】[0031]

【実施例2】第2の実施例について説明する。図4は各
製造工程の断面図を示す。
Second Embodiment A second embodiment will be described. FIG. 4 is a sectional view of each manufacturing process.

【0032】a)低不純物濃度のP型Si基板4bを用
意し、一方の面(表)より選択的に分離層5c反対面
(裏)より全面にエミッタ層3aを同時に拡散して、略
中心で接続する。残った部分が分離層5cに囲まれた島
状のベース領域4cとなる。((図4a参照) b)次にベース4cの表面より選択的にN型不純物を拡
散して、コレクタ層6を形成する。(図4−b参照) C)次にベース4cとコレクタ6とを接続する電極7と
エミッタ3aの表面(基板裏面)に電極8を設ければそ
れぞれがアノード,カソードの電極となるダイオードチ
ップとなる。
A) A P-type Si substrate 4b having a low impurity concentration is prepared, and the emitter layer 3a is simultaneously diffused over the entire surface from the opposite surface (back surface) of the separation layer 5c selectively from one surface (front surface), and the substantially center is formed. Connect with. The remaining portion becomes an island-shaped base region 4c surrounded by the separation layer 5c. ((See FIG. 4a) b) Next, N-type impurities are selectively diffused from the surface of the base 4c to form the collector layer 6. (See FIG. 4-b.) C) Next, if an electrode 7 connecting the base 4c and the collector 6 and an electrode 8 on the front surface (back surface of the substrate) of the emitter 3a are provided, a diode chip becomes an anode electrode and a cathode electrode, respectively. Become.

【0033】以 上いずれもエミッタ電極は裏面に設
けるものに付いて説明したが、必要あれば分離層5,5
a,5cの表面に設けることもできる。
In all of the above explanations, the emitter electrode is provided on the back surface, but if necessary, the separation layers 5 and 5 are provided.
It can also be provided on the surfaces of a and 5c.

【0034】[0034]

【発明の効果】以上説明したようにこの発明はベース層
を低濃度不純物とし、ベース電極とコレクタ電極を同じ
面に設けたのでトランジスタのコレクタとベースを接続
し、エミッタ電極との間でダイオードとして利用する時
逆耐圧が高く順方向電圧降下の小さいしかも組立容易な
ダイオードチップ構造となる。
As described above, according to the present invention, since the base layer is made of a low concentration impurity and the base electrode and the collector electrode are provided on the same surface, the collector and the base of the transistor are connected and a diode is formed between the emitter electrode and the collector electrode. When used, the diode chip structure has a high reverse breakdown voltage, a small forward voltage drop and is easy to assemble.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の第1の実施例の製造工程を示す断面
FIG. 1 is a sectional view showing a manufacturing process of a first embodiment of the present invention.

【図2】 第1の実施例の一変形例の断面図FIG. 2 is a sectional view of a modification of the first embodiment.

【図3】 第1の実施例の他の変形例の断面図FIG. 3 is a cross-sectional view of another modification of the first embodiment.

【図4】 本発明の第2の実施例の断面図FIG. 4 is a sectional view of a second embodiment of the present invention.

【図5】 従来のダイオードの等価回路FIG. 5: Equivalent circuit of a conventional diode

【図6】 従来の他のダイオードの等価回路FIG. 6 is an equivalent circuit of another conventional diode.

【符号の説明】[Explanation of symbols]

3 高濃度N型Si基板(エミッタ層) 3a 高濃度N型拡散層(エミッタ層) 4 低濃度P型層 4a ベース層 4b 低濃度P型Si基板 4c ベース層 5 分離層 5a 分離層 5b 分離層 5c 分離層 6 コレクタ層 6a コレクタ層 7 電極(アノード) 8 電極(カソード) 3 High concentration N type Si substrate (emitter layer) 3a High concentration N type diffusion layer (emitter layer) 4 Low concentration P type layer 4a Base layer 4b Low concentration P type Si substrate 4c Base layer 5 Separation layer 5a Separation layer 5b Separation layer 5c Separation layer 6 Collector layer 6a Collector layer 7 Electrode (anode) 8 Electrode (cathode)

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】高不純物濃度の一導電型でなるエミッタ層
と、 前記エミッタ層上にあって、表面を有して形成されてい
て、周囲を表面から前記エミッタ層に達する一導電型で
なる分離層で囲まれ、低不純物濃度の他導電型でなるベ
ース層と、 前記ベース層の表面側に選択的に形成された高不純物濃
度の一導電型でなるコレクタ層とでなり、 前記ベース層と前記コレクタ層を接続する電極を一方の
電極とし、エミッタを他方の電極とすることを特徴とす
るダイオード。
1. An emitter layer of one conductivity type having a high impurity concentration, and one conductivity type which is formed on the emitter layer and has a surface and which reaches the emitter layer from the surface to the periphery. A base layer of another conductivity type surrounded by a separation layer and having a low impurity concentration; and a collector layer of one conductivity type having a high impurity concentration, which is selectively formed on the surface side of the base layer, A diode, wherein the electrode connecting the collector layer and the collector layer is one electrode, and the emitter is the other electrode.
【請求項2】エミッタとなる高濃度の一導電型不純物を
含む基板上に低濃度の他導電型不純物を含むベース層を
エピタキシャル成長して形成することを特徴とする請求
項1記載のダイオードの製造方法。
2. A diode according to claim 1, wherein a base layer containing a low concentration of another conductivity type impurity is epitaxially grown on a substrate containing a high concentration of one conductivity type impurity to be an emitter. Method.
【請求項3】ベース層となる低濃度の他導電型不純物を
含む基板に、一方面から全面に他方面から選択的に一導
電型不純物を高濃度に拡散し、一方にエミッタ層、他方
に分離層を同時に形成することを特徴とする請求項1の
記載のダイオードの製造方法。
3. A substrate containing a low-concentration impurity of another conductivity type serving as a base layer, one impurity of one conductivity type is selectively diffused in a high concentration from one surface to the entire surface of the other surface, and an emitter layer is formed on one side and an impurity is formed on the other side. The method for manufacturing a diode according to claim 1, wherein the separation layer is formed at the same time.
JP3214994A 1991-08-27 1991-08-27 Diode and manufacture thereof Pending JPH0555241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3214994A JPH0555241A (en) 1991-08-27 1991-08-27 Diode and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3214994A JPH0555241A (en) 1991-08-27 1991-08-27 Diode and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH0555241A true JPH0555241A (en) 1993-03-05

Family

ID=16664944

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3214994A Pending JPH0555241A (en) 1991-08-27 1991-08-27 Diode and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH0555241A (en)

Similar Documents

Publication Publication Date Title
JPH09129741A (en) Semiconductor integrated circuit and manufacture thereof
US4524376A (en) Corrugated semiconductor device
US3969747A (en) Complementary bipolar transistors with IIL type common base drivers
JPH0555241A (en) Diode and manufacture thereof
US4249192A (en) Monolithic integrated semiconductor diode arrangement
JPH11121768A (en) Semiconductor integrated circuit
JPS6327865B2 (en)
JPH0622998Y2 (en) Semiconductor device
JPS6126267A (en) Bidirectional zener diode
JPH0474478A (en) Diode
JPS62104068A (en) Semiconductor integrated circuit device
JPH09181335A (en) Semiconductor device
JPS61150383A (en) Semiconductor device
JPH0677237A (en) Manufacture of planar type diode
JPS61170058A (en) Composite circuit for level shifting
JPS6128224B2 (en)
JPH08227941A (en) Composite semiconductor element
JPS6116569A (en) Semiconductor integrated circuit device
JPS60776B2 (en) semiconductor equipment
JPS60219776A (en) Series diode
JPS61135147A (en) Semiconductor integrated circuit device
JPH08153800A (en) Semiconductor integrated circuit device
JPH0567624A (en) Semiconductor device
JPH0475660B2 (en)
JPS60157265A (en) Constant voltage diode

Legal Events

Date Code Title Description
FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 9

Free format text: PAYMENT UNTIL: 20120404

LAPS Cancellation because of no payment of annual fees