JPH054706B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a data conversion device used in an input/output channel of a data processing device, and more particularly to a conversion circuit for converting the bit length constituting one byte.

(Conventional technology) 1 byte consists of 9 bits (9-bit byte)
There are various types of central processing units that process data in which 1 word consists of 4 bytes, or peripheral devices that execute processing in units of bytes, with 1 byte consisting of 8 bits (8-bit byte). be. When connecting these devices to transfer data, a data conversion device is required that includes a conversion circuit that converts 9-bit byte data into 8-bit byte data.

Conventionally, the following types of conversion devices have been known.

The first data conversion device does not use one bit of each byte of data sent from the central processing unit to the peripheral device, but discards unused bits in the input/output channel and sends the data to the peripheral device as an 8-bit byte. It was hot. In such a system, not only is it necessary to convert the format so that one bit is not used before data is sent from the central processing unit to the peripheral device, but the main storage area is wasted.

The second data conversion device improves the shortcomings of the first data conversion device, for example,
This is shown in No. 31775 "Data mode conversion device". In Special Publication No. 54-31775, 36
In order to convert one word of data consisting of bits (36-bit word data) to 8-bit byte data, a 40-bit register is provided, the first word is set to bits 0 to 35 of the above register, and four 8-bit bytes are set. Take out the bit byte, and
Bit 36 of the 40-bit register above
Bit 40 and bits 0 to 31 are set and combined with the remaining 4 bits (bits 32 to 36) of the conversion bits of the first word to extract five 8-bit bytes. This converts 8 bytes of 9-bit byte data (72 bits) into 9 bytes of 8 bytes of data (72 bits).
Can be converted to bitbyte data (72 bits).

Since such a data conversion device requires a large register of 40 bits, unnecessary hardware is required.

(Problems to be Solved by the Invention) The first data conversion device according to the prior art described above requires pre-processing of data conversion by the central processing unit, resulting in a decrease in performance and wasting the area of the main storage device. The second data conversion device has the disadvantage that it requires a large circuit scale and is expensive.

The purpose of the present invention is to input byte data of the length to be converted one byte at a time, temporarily hold the unconverted bits of the input data each time the conversion is performed, and calculate the number of bits between the long byte and short byte. Eliminate the above drawback by counting the quotient of the least common multiple by the number of bits in the short byte minus 1, extracting the necessary bits according to the counted value, and generating the short byte. However, it is an object of the present invention to provide a data conversion device characterized in that it is configured to be able to effectively generate short byte data from long byte data.

(Means for Solving the Problems) A data conversion device according to the present invention includes a first register, a second register, a byte position counter, and an unpacking switch, and converts long byte data into one byte. It is configured so that it can be inputted one by one, converted into short byte data, and output.

The first register is for inputting long byte data to be converted one byte at a time.

The second register is for temporarily holding the remaining bits of the input data after conversion.

The byte position counter calculates 1 from the value of the quotient obtained by dividing the least common multiple of the number of bits of the long byte data and the short byte data by the number of bits of the short byte.
This is to count up to the value after subtracting .

The unpack switch extracts necessary bits from the output of the first register and the output of the second register according to the content value of the byte position counter to generate short byte data.

(Example) Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a data conversion device from 9-bit bytes to 8-bit bytes. In FIG. 1, 101 and 102 are registers, 103 is a byte position counter, 104 is an unpacking switch, and 105 is a cable driver.

FIG. 2 is an explanatory diagram showing the detailed bit arrangement of unpack switch 104 in FIG. 1.

In FIG. 1, register 101 is a 9-bit register (WR0), and data to be converted is input to register 101 one byte at a time. Register 102 is a 9-bit register (WR1) 10
2, and each time data conversion is executed, the data in register (WR0) 101 is transferred to register (WR1).
102. The byte position counter (BPC) 103 counts from 0 to 8, which is 1 subtracted from 9, which is the quotient of 72 bits divided by 8 bits, which is the least common multiple of 9 bits and 8 bits, and returns to 0 again. It is a counter. The unpack switch (UPX) 104 is an 8-bit unpack switch with a 9-way selection function, and according to the instruction of the byte position counter 103, the output of the register (WR0) 101 and the register (WR1) 1
This is a selector that selects and outputs the required 8-bit byte data of the conversion result from the output of 02. Cable driver 105 is a circuit for sending 8-bit byte data resulting from conversion to a peripheral device.

As shown in Figure 2, the unpack switch (UPX) 104 takes out the first 8 bits of the 9-bit byte from the register (WR0) 101 at byte position 0, and the remaining 1 bit is taken out at the first byte position. As the data transferred from register (WR0) 101 to register (WR1) 102 in
Take out the Bitbyte.

Similarly, a register (WR0) 101 for storing input 9-bit byte data,
Register (WR1) that stores remaining bits of conversion
102 and bite position counter 1
03 instruction creates 8-bit byte data.

FIG. 3 is a timing chart showing the operation of the data conversion device shown in FIG. 1.

Next, the operation of the data conversion apparatus shown in FIG. 1 will be explained using the timing chart shown in FIG.

In Figure 3, 9-bit byte data is continuously given to the register (WR0) 101 from byte 0 to byte 7, and data input is inhibited at the timing of the value of the byte position counter (BPC) 103, for example, 8. be done. This is because in the process of data conversion between a 9-bit byte and an 8-bit byte, an extra 8-bit byte is generated. The register (WR1) 102 operates so that the contents of the register (WR0) 101 are transferred to the unpack switch 104 every time conversion is performed, and data including the unconverted bits is temporarily held in the register (WR1) 102. The byte position counter (BPC) 103 is reset to 0 when the 0th byte of 8 bytes of 9-bit byte data is input, and thereafter is incremented by +1 every time conversion is performed. Counts up to 8, which is the number of bytes in an 8-bit byte.

FIG. 3 is an explanatory diagram showing how data is converted from a 9-bit byte to an 8-bit byte in the data conversion device shown in FIG.

In FIG. 3, as the byte position counter 103 counts up, register (WR0) 101 and register (WR1) 10
The contents of 2 are unpack switch (UPX) 104
A pattern is shown in which data is output as data WDi (i=0 to 7).

The output WDi (i=
0 to 7) are the outputs of the unpack switch (UPX) 104 shown in FIG. 1, and each byte of 8-bit data is output every time conversion is performed.

FIG. 4 is a block diagram showing an embodiment of a data processing device to which the present invention is applied. In FIG. 4, 401 is a main storage device, 402 is a system control device, 403 is an arithmetic processing unit, 404 is an input/output processing device, 405 is an input/output channel, 406 is a peripheral control device, and 407 is a peripheral device.

In FIG. 4, the numbers in parentheses indicate the number of bits that are the unit of processing; 36 bits means 1 word consisting of 4 bytes of 9 bits, and 8 bits means 1 byte of 8 bits.

In FIG. 4, the input/output channel 405 is equipped with the data conversion device shown in FIG.

The main storage device 401 is for storing programs and processing data. The system control device 402 is a device that controls access paths of the main storage device 401 by the arithmetic processing device 403 and the input/output processing device 404. The arithmetic processing unit 403 is
It executes a program stored inside the main storage device 401 and issues input/output commands to the input/output processing device 404 according to instructions from the program. The input/output processing device 404 is a device that executes data transfer between the main storage device 401 and the peripheral device 406 according to input/output instructions issued from the arithmetic processing device 403. Input/output channel 405
is a data transfer port from the input/output processing device 404 to the peripheral device 406. In the present invention, the input/output channel 405 has an interface, and the internal interface is the main storage device 401.
After converting the 36 bits=1 word=9 bit bytes×4 bytes of data read from the 9 bit bytes into 8 bit bytes, the data has a width of 8 bits for sending to the peripheral device 406.

The peripheral control device 406 is connected to a plurality of peripheral devices 407, and is a device that controls data transfer with the input/output channel 405 of the input/output control device 404, and controls data in units of 8-bit bytes. There is. Peripheral devices 307 include magnetic disks, magnetic tapes, card readers, table printing devices, and the like.

FIG. 5 is an explanatory diagram showing data conversion by the data processing device shown in FIG. 4.

Bit number conversion from 9-bit bytes to 8-bit bytes is performed as shown in Figure 5. For 72 bits, which is the least common multiple of 9 bits and 8 bits, 8 bytes of 9-bit bytes are converted to 9 bytes of 8-bit bytes. It is something to do.

(Effects of the Invention) As explained above, the present invention converts long bit byte data into short byte data one byte at a time, thereby reducing the amount of hardware, reducing the cost, and reducing the number of input/output bits. ,
This has the effect of making it easier to integrate into LSI.

[Brief explanation of drawings]

FIG. 1 shows an example of a 9-bit byte to 8
1 is a block diagram showing an embodiment of a bit-byte data conversion device; FIG. FIG. 2 is an explanatory diagram showing detailed bit allocation of the unpack switch shown in FIG. 1. FIG. 3 is an explanatory diagram showing how data is converted from a 9-bit byte to an 8-bit byte in the data converter shown in FIG. FIG. 4 is a block diagram showing an embodiment of a data processing device in which the data conversion device configured as shown in FIG. 1 is mounted on an input/output channel. FIG. 5 is an explanatory diagram showing a pattern of data conversion by the data processing device shown in FIG. 4. 101, 102...Register, 103...Byte position counter, 104...Unpack switch, 105...Cable driver, 401...
...Main storage device, 402...System control device, 4
03... Arithmetic processing unit, 404... Input/output processing unit, 405... Input/output channel, 406... Peripheral control device, 407... Peripheral device.

Claims (1)

[Claims] 1 a first register for inputting long byte data to be converted one byte at a time; a second register for temporarily holding conversion remaining bits of the input data each time the conversion is performed; a byte position counter for counting up to a value obtained by subtracting 1 from a value obtained by dividing the least common multiple of the number of bits of the long byte data and the short byte data by the number of bits of the short byte; and an unpacking switch for generating the short byte data by extracting necessary bits from the output of the first register and the output of the second register according to the content value of the processing counter, and generating the short byte data. 1. A data converting device characterized in that the data is inputted one byte at a time, converted into short byte data, and outputted.