JPH054280Y2 - - Google Patents

Info

Publication number
JPH054280Y2
JPH054280Y2 JP1986058054U JP5805486U JPH054280Y2 JP H054280 Y2 JPH054280 Y2 JP H054280Y2 JP 1986058054 U JP1986058054 U JP 1986058054U JP 5805486 U JP5805486 U JP 5805486U JP H054280 Y2 JPH054280 Y2 JP H054280Y2
Authority
JP
Japan
Prior art keywords
circuit board
hole
eprom
erasing
molding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1986058054U
Other languages
English (en)
Japanese (ja)
Other versions
JPS62170632U (US06811534-20041102-M00003.png
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986058054U priority Critical patent/JPH054280Y2/ja
Publication of JPS62170632U publication Critical patent/JPS62170632U/ja
Application granted granted Critical
Publication of JPH054280Y2 publication Critical patent/JPH054280Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
JP1986058054U 1986-04-17 1986-04-17 Expired - Lifetime JPH054280Y2 (US06811534-20041102-M00003.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986058054U JPH054280Y2 (US06811534-20041102-M00003.png) 1986-04-17 1986-04-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986058054U JPH054280Y2 (US06811534-20041102-M00003.png) 1986-04-17 1986-04-17

Publications (2)

Publication Number Publication Date
JPS62170632U JPS62170632U (US06811534-20041102-M00003.png) 1987-10-29
JPH054280Y2 true JPH054280Y2 (US06811534-20041102-M00003.png) 1993-02-02

Family

ID=30888304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986058054U Expired - Lifetime JPH054280Y2 (US06811534-20041102-M00003.png) 1986-04-17 1986-04-17

Country Status (1)

Country Link
JP (1) JPH054280Y2 (US06811534-20041102-M00003.png)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56150871A (en) * 1980-04-24 1981-11-21 Toshiba Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56150871A (en) * 1980-04-24 1981-11-21 Toshiba Corp Semiconductor device

Also Published As

Publication number Publication date
JPS62170632U (US06811534-20041102-M00003.png) 1987-10-29

Similar Documents

Publication Publication Date Title
US5869356A (en) Method and structure for constraining the flow of incapsulant applied to an I/C chip on a substrate
JP4536603B2 (ja) 半導体装置の製造方法及び半導体装置用実装基板及び半導体装置
JP3431406B2 (ja) 半導体パッケージ装置
KR900005576A (ko) 반도체 집적회로 장치
US6876090B2 (en) Semiconductor chip and method for producing housing
JPH054280Y2 (US06811534-20041102-M00003.png)
JPS58134449A (ja) Lsiパツケ−ジ
JP2797598B2 (ja) 混成集積回路基板
JPH09120976A (ja) 半導体チップの実装方法
JPH1092970A (ja) 基板モジュール
JPS5911658A (ja) 半導体装置
JPS6364899B2 (US06811534-20041102-M00003.png)
JPS5954941U (ja) 半導体装置の封止構造
JPH0537478Y2 (US06811534-20041102-M00003.png)
JPH0273663A (ja) 混成集積回路装置
JPH04188853A (ja) パッケージ
JPH09120975A (ja) 半導体チップの実装構造
FR2795200B1 (fr) Dispositif electronique comportant au moins une puce fixee sur un support et procede de fabrication d'un tel dispositif
JPH1070126A (ja) 半導体チップ及びそれを用いた液晶表示装置
JPS614436U (ja) 半導体装置用パツケ−ジ
JPH0430730U (US06811534-20041102-M00003.png)
JPH0339853U (US06811534-20041102-M00003.png)
JPH0410337U (US06811534-20041102-M00003.png)
JPS59146954U (ja) 混成集積回路の封止構造
JPH0470739U (US06811534-20041102-M00003.png)