JPH0542759B2 - - Google Patents
Info
- Publication number
- JPH0542759B2 JPH0542759B2 JP6169583A JP6169583A JPH0542759B2 JP H0542759 B2 JPH0542759 B2 JP H0542759B2 JP 6169583 A JP6169583 A JP 6169583A JP 6169583 A JP6169583 A JP 6169583A JP H0542759 B2 JPH0542759 B2 JP H0542759B2
- Authority
- JP
- Japan
- Prior art keywords
- ram
- data
- address
- data storage
- address latch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
- Static Random-Access Memory (AREA)
- Executing Machine-Instructions (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58061695A JPS59188760A (ja) | 1983-04-08 | 1983-04-08 | マイクロコンピュータ |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58061695A JPS59188760A (ja) | 1983-04-08 | 1983-04-08 | マイクロコンピュータ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59188760A JPS59188760A (ja) | 1984-10-26 |
| JPH0542759B2 true JPH0542759B2 (cs) | 1993-06-29 |
Family
ID=13178638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58061695A Granted JPS59188760A (ja) | 1983-04-08 | 1983-04-08 | マイクロコンピュータ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59188760A (cs) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61188627A (ja) * | 1985-02-18 | 1986-08-22 | Sanyo Electric Co Ltd | マイクロコンピユ−タ |
-
1983
- 1983-04-08 JP JP58061695A patent/JPS59188760A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59188760A (ja) | 1984-10-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5093783A (en) | Microcomputer register bank accessing | |
| KR100393860B1 (ko) | 랜덤액세스메모리 | |
| JPS62152050A (ja) | 半導体メモリ | |
| JPH077260B2 (ja) | 画像データ回転処理装置及びその方法 | |
| JPH0255878B2 (cs) | ||
| JPH05274862A (ja) | 半導体メモリ装置 | |
| US4949242A (en) | Microcomputer capable of accessing continuous addresses for a short time | |
| KR20080080587A (ko) | Sram 회로 및 이것을 이용한 버퍼 회로 | |
| JPH0542759B2 (cs) | ||
| KR960700490A (ko) | 행방향 주소 스트로브 사이클을 갖지않고 프레임버퍼에 영향을 미치는 동작을 제공하기 위한 방법 및 장치(method and apparatus for providing operations affecting a frame buffer without a row adderss strobe cycle) | |
| US5001629A (en) | Central processing unit with improved stack register operation | |
| JPH11338767A (ja) | 画像処理用機能メモリ装置 | |
| JPH0795269B2 (ja) | 命令コードのデコード装置 | |
| JPH0514359B2 (cs) | ||
| JP2950427B2 (ja) | レジスタバンク回路 | |
| KR920005121B1 (ko) | 반도체 기억장치 | |
| WO2025154744A1 (ja) | 中央演算処理装置 | |
| JP2512994B2 (ja) | ベクトルレジスタ | |
| JP2517126B2 (ja) | 半導体記憶装置 | |
| KR920008597A (ko) | 마이크로 컴퓨터 | |
| JPH0810443B2 (ja) | メモリ制御回路 | |
| SU1460740A1 (ru) | Запоминающее устройство | |
| KR910010136B1 (ko) | Lru 회로 | |
| JPH03273592A (ja) | キャッシュメモリ装置 | |
| JPH02187989A (ja) | デュアルポートメモリ |