JPH0540648A - Test execution system for information processor - Google Patents

Test execution system for information processor

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Publication number
JPH0540648A
JPH0540648A JP3195662A JP19566291A JPH0540648A JP H0540648 A JPH0540648 A JP H0540648A JP 3195662 A JP3195662 A JP 3195662A JP 19566291 A JP19566291 A JP 19566291A JP H0540648 A JPH0540648 A JP H0540648A
Authority
JP
Japan
Prior art keywords
test
execution
under test
execution result
instruction under
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3195662A
Other languages
Japanese (ja)
Inventor
Keiichiro Kato
啓一郎 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Solution Innovators Ltd
Original Assignee
NEC Software Hokuriku Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Software Hokuriku Ltd filed Critical NEC Software Hokuriku Ltd
Priority to JP3195662A priority Critical patent/JPH0540648A/en
Publication of JPH0540648A publication Critical patent/JPH0540648A/en
Pending legal-status Critical Current

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  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To analyze a fault in a short time by deciding automatically whether an error occurred or not with a tested instruction. CONSTITUTION:A test environment setting means 21 sets an executing environment of a tested instruction at a CPU 30. A tested instruction executing means 22 carries out the tested instruction through the CPU 30. An executing result deciding means 23 decides whether the executing result is normal or not through the CPU 30. A test environment setting means 41 sets a test environment again at a CPU 40 if the result of the first execution carried out the means 22 is not normal, and the set test carried out the means 22 is not normal., and the set test environment setting information is taken over by the means 22 which carries out the second execution. An executing result deciding means 42 takes over the executing result of the second tested instruction from the means 22 which carried out the tested instruction at the CPU 30. Then the means 42 decides whether the second executing result of the tested instruction is normal or not through the CPU 40.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は情報処理装置の試験実行
方式に関し、特に試験プログラムの実行結果でエラーが
発生した場合、そのエラーが試験に用いられた命令のエ
ラーに基づくものか否かを判定する情報処理装置の試験
実行方式に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test execution method of an information processing apparatus, and in particular, when an error occurs in the execution result of a test program, whether or not the error is based on the error of the instruction used for the test is checked. The present invention relates to a test execution method of an information processing device to be judged.

【0002】[0002]

【従来の技術】従来の情報処理装置の試験実行方式で
は、試験環境設定処理プログラム,被試験命令,実行結
果判定処理プログラムから構成される試験プログラム
を、ハードウェアの試験を実施しようとしているCPU
(被試験CPU)上で実行し、実行結果でエラーが生じ
た場合は、被試験命令のためにエラーが生じたのか、あ
るいは試験環境設定動作,実行結果判定動作のエラーに
よりエラーが生じたのかを判定するために、各処理の前
後でプログラムを停止させてメモリ及びレジスタの値を
解析していた。
2. Description of the Related Art In a conventional test execution method of an information processing apparatus, a CPU that is going to perform a hardware test of a test program including a test environment setting processing program, an instruction under test, and an execution result judgment processing program
If the error occurs in the execution result when executed on the (CPU under test), whether the error occurred due to the instruction under test, or whether the error occurred due to an error in the test environment setting operation or the execution result judgment operation In order to determine, the program was stopped before and after each process and the values of the memory and the register were analyzed.

【0003】[0003]

【発明が解決しようとする課題】上述した従来の情報処
理装置の試験実行方式は、試験プログラムの実行結果が
エラーとなった場合、被試験命令でエラーとなったか否
かを判定するために、各処理の前後でプログラムを停止
させてメモリ及びレジスタの値を解析しなければならな
いため、実行結果を見ただけでは被試験命令でエラーが
発生したか否かの判定ができず、障害解析に時間がかか
るという欠点を有していた。
In the conventional test execution method of the information processing apparatus described above, when the execution result of the test program results in an error, it is necessary to determine whether or not an error occurs in the instruction under test. Since it is necessary to stop the program before and after each process and analyze the memory and register values, it is not possible to judge whether or not an error has occurred in the instruction under test just by looking at the execution result. It had the drawback of being time consuming.

【0004】本発明の目的は、被試験命令でエラーが発
生したか否かの判定が自動的に行われ、障害解析を短時
間で行うことができる情報処理装置の試験実行方式を提
供することにある。
An object of the present invention is to provide a test execution method for an information processing apparatus, which can automatically determine whether or not an error has occurred in an instruction under test and can perform failure analysis in a short time. It is in.

【0005】[0005]

【課題を解決するための手段】第1の発明の情報処理装
置の試験実行方式は、少なくとも2の中央処理装置を備
えた情報処理装置の試験実行方式であって、(A)前記
中央処理装置のうちの第1の中央処理装置上で動作し、
前記第1の中央処理装置上で被試験命令を実行するため
の実行環境を設定する第1の試験環境設定手段、(B)
前記第1の中央処理装置上で動作し、前記被試験命令を
実行する被試験命令実行手段、(C)前記第1の中央処
理装置上で動作し、前記被試験命令が実行された結果
が、正常か否かを判定する第1の実行結果判定手段、
(D)前記被試験命令実行手段により行われた前記被試
験命令の1回目の実行結果が正常でないと前記第1の実
行結果判定手段により判定された場合、前記中央処理装
置のうちの第2の中央処理装置上で動作し、前記第1の
試験環境設定手段と同様の試験環境の設定を行い、設定
された試験環境設定情報を、被試験命令の2回目の実行
を行う前記被試験命令実行手段に引き継ぐ第2の試験環
境設定手段、(E)前記第2の中央処理装置上で動作
し、前記第1の中央処理装置上で被試験命令を実行した
前記被試験命令実行手段から、2回目の被試験命令の実
行結果の情報を引き継ぎ、前記被試験命令の2回目の実
行結果が、正常か否かを判定する第2の実行結果判定手
段、(F)前記被試験命令の1回目の実行結果が正常で
ないと前記第1の実行結果判定手段により判定された場
合、前記第2の試験環境設定手段を起動させて前記第2
の試験環境設定手段の実行結果を前記被試験命令実行手
段に引き継がせ、次に前記被試験命令実行手段の実行結
果を前記第2の実行結果判定手段に引き継がせるように
制御動作を行う実行制御手段、を備えて構成されてい
る。
A test execution method for an information processing apparatus according to a first aspect of the present invention is a test execution method for an information processing apparatus including at least two central processing units, wherein: (A) the central processing unit; Of the first central processing unit of
First test environment setting means for setting an execution environment for executing the instruction under test on the first central processing unit, (B)
An instruction-under-test execution means that operates on the first central processing unit and executes the instruction under test; (C) a result of executing the instruction under test operating on the first central processing unit; A first execution result judging means for judging whether or not it is normal,
(D) If the first execution result determining means determines that the first execution result of the instruction under test performed by the instruction under test executing means is not normal, the second one of the central processing units Of the instruction under test that operates on the central processing unit of (1), sets the test environment similar to that of the first test environment setting means, and executes the second execution of the instruction under test with the set test environment setting information. Second test environment setting means to be carried over to the executing means, (E) from the instruction under test execution means which operates on the second central processing unit and executes the instruction under test on the first central processing unit, Second execution result determining means for inheriting the information on the execution result of the second instruction under test and determining whether or not the second execution result of the instruction under test is normal, (F) 1 of the instruction under test If the result of the second execution is not normal, the first Results when it is determined by the determining means, the second activates the second test environment setting unit
Execution control for performing a control operation so that the execution result of the test environment setting means of (1) is inherited by the instruction under test executing means, and then the execution result of the instruction under test executing means of the second execution result determining means And means.

【0006】また、第2の発明の情報処理装置の試験実
行方式は、少なくとも2の中央処理装置を備えた情報処
理装置の試験実行方式であって、(A)前記中央処理装
置のうちの第1の中央処理装置上で動作し、前記第1の
中央処理装置上で被試験命令を実行するための実行環境
を設定する第1の試験環境設定手順、(B)前記第1の
中央処理装置上で動作し、前記被試験命令を実行する被
試験命令実行手順、(C)前記第1の中央処理装置上で
動作し、前記被試験命令が実行された結果が、正常か否
かを判定する第1の実行結果判定手順、(D)前記被試
験命令実行手順により行われた前記被試験命令の1回目
の実行結果が正常でないと前記第1の実行結果判定手順
により判定された場合、前記中央処理装置のうちの第2
の中央処理装置上で動作し、前記第1の試験環境設定手
順と同様の試験環境の設定を行い、設定された試験環境
設定情報を、被試験命令の2回目の実行を行う前記被試
験命令実行手順に引き継ぐ第2の試験環境設定手順、
(E)前記第2の中央処理装置上で動作し、前記第1の
中央処理装置上で被試験命令を実行した前記被試験命令
実行手順から、2回目の被試験命令の実行結果の情報を
引き継ぎ、前記被試験命令の2回目の実行結果が、正常
か否かを判定する第2の実行結果判定手順、(F)前記
被試験命令の1回目の実行結果が正常でないと前記第1
の実行結果判定手順により判定された場合、前記第2の
試験環境設定手順を起動させて前記第2の試験環境設定
手順の実行結果を前記被試験命令実行手順に引き継が
せ、次に前記被試験命令実行手順の実行結果を前記第2
の実行結果判定手順に引き継がせるように制御動作を行
う実行制御手順、を備えて構成されている。
A test execution method of an information processing apparatus according to the second invention is a test execution method of an information processing apparatus having at least two central processing units, wherein (A) the central processing unit A first test environment setting procedure that operates on one central processing unit and sets an execution environment for executing an instruction under test on the first central processing unit, (B) the first central processing unit An instruction under test execution procedure for operating the above instruction under test, (C) determining whether or not the result of execution of the instruction under test operating on the first central processing unit is normal A first execution result determination procedure, (D) when it is determined by the first execution result determination procedure that the first execution result of the instruction under test executed by the instruction under test execution procedure is not normal, Second of the central processing units
Of the instruction to be tested which operates on the central processing unit of (1), sets a test environment similar to the first test environment setting procedure, and executes the second execution of the instruction under test with the set test environment setting information. A second test environment setting procedure that is carried over to the execution procedure,
(E) Information on the execution result of the second instruction under test is obtained from the instruction under test execution procedure which operates on the second central processing unit and executes the instruction under test on the first central processing unit. A second execution result determination procedure for determining whether or not the second execution result of the instruction under test is normal, and (F) the first execution result of the instruction under test is not normal.
If it is determined by the execution result determining procedure of step S1, the second test environment setting procedure is activated, the execution result of the second test environment setting procedure is inherited by the instruction under test execution procedure, and then the test under test is performed. The execution result of the instruction execution procedure is the second
And an execution control procedure for performing a control operation so as to be taken over by the execution result determination procedure.

【0007】[0007]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0008】図1は、本発明の情報処理装置の試験実行
方式の一実施例を示す構成図である。また、図2は、図
1の実行制御手段の動作の一例を示す流れ図である。
FIG. 1 is a block diagram showing an embodiment of a test execution system of an information processing apparatus of the present invention. 2 is a flow chart showing an example of the operation of the execution control means of FIG.

【0009】図1に示す本実施例の情報処理装置の試験
実行方式は、試験対象であるCPU30上で動作する命
令を実行するための実行環境を設定する試験環境設定手
段21、CPU30上で上記被試験命令を実行する被試
験命令実行手段22、CPU30上で動作し、被試験命
令が実行された結果が、正常か否かを判定する実行結果
判定手段23、被試験命令実行手段22により行われた
被試験命令の1回目の実行結果が正常でないことが実行
結果判定手段23により判定された場合、CPU40上
で動作し、試験環境設定手段21と同様の試験環境の設
定を行い、設定された試験環境設定情報を、被試験命令
の2回目の実行を行う被試験命令実行手段22に引き継
ぐ試験環境設定手段41、CPU40上で動作し、被試
験CPU30上で被試験命令を実行した被試験命令実行
手段22から、2回目の被試験命令の実行結果の情報を
引き継ぎ、2回目の実行結果が正常か否かを判定する実
行結果判定手段42、上記各手段の動作を制御する実行
制御手段10、試験結果を表示するCRTディスプレイ
50から構成されている。
In the test execution method of the information processing apparatus of the present embodiment shown in FIG. 1, the test environment setting means 21 for setting an execution environment for executing an instruction operating on the CPU 30 to be tested and the above-mentioned on the CPU 30. An instruction under test executing means 22 for executing an instruction under test, an execution result judging means 23 which operates on the CPU 30 and judges whether or not the result of executing the instruction under test is normal, and an instruction under test executing means 22 When the execution result determining means 23 determines that the execution result of the first instruction of the test under test is not normal, it operates on the CPU 40, sets the test environment similar to the test environment setting means 21, and is set. The test environment setting means 41 that takes over the test environment setting information to the test instruction executing means 22 that executes the test instruction for the second time operates on the CPU 40, and on the CPU under test 30. Information of the execution result of the second instruction under test is inherited from the instruction under test execution means 22 that has executed the test instruction, and the execution result determination means 42 for determining whether the second execution result is normal or not. It is composed of an execution control means 10 for controlling the operation and a CRT display 50 for displaying the test result.

【0010】なお、図1において、CPU30とCPU
40とは試験対象である情報処理装置に含まれ、本実施
例では、CPU30が試験対象となるCPUである。そ
して、試験プログラム20は、被試験CPU30上で動
作してCPU30を試験するためのプログラムであり、
図1に示す試験環境設定手段21,被試験命令実行手段
22及び実行結果判定手段23は、試験プログラム20
によりCPU30上で実現される。
In FIG. 1, the CPU 30 and the CPU
40 is included in the information processing device to be tested, and in this embodiment, the CPU 30 is the CPU to be tested. The test program 20 is a program for operating on the CPU 30 under test to test the CPU 30,
The test environment setting means 21, the test instruction executing means 22 and the execution result determining means 23 shown in FIG.
Is realized on the CPU 30.

【0011】また、試験プログラム43は、CPU40
上で動作し、図1に示す試験環境設定手段41及び実行
結果判定手段42は、この試験プログラム43の動作に
より実現される。
The test program 43 is executed by the CPU 40.
The test environment setting means 41 and the execution result determining means 42 which operate above and are shown in FIG. 1 are realized by the operation of the test program 43.

【0012】次に、動作を説明する。Next, the operation will be described.

【0013】図1において、試験プログラム20が起動
されると、実行制御手段10が試験プログラム20を主
記憶装置に読み込み、実行CPU(試験プログラムが実
行されるCPU)をCPU30に設定する(ステップ6
0)。
In FIG. 1, when the test program 20 is activated, the execution control means 10 reads the test program 20 into the main memory and sets the execution CPU (CPU on which the test program is executed) in the CPU 30 (step 6).
0).

【0014】次に、実行制御手段10は、試験環境設定
手段21を起動する(ステップ61)。起動された試験
環境設定手段21は、被試験命令を実行するための試験
環境を設定する。試験環境が設定されると、実行制御手
段10は、次に被試験命令実行手段22を起動し(ステ
ップ62)、起動された被試験命令実行手段22は、被
試験命令を実行する。そして、被試験命令が実行された
後に、実行制御手段10は、実行結果判定手段23を起
動し(ステップ63)、実行結果判定手段23は、被試
験命令の実行結果と期待値とを比較し(ステップ6
4)、不一致ならば、実行結果エラーとする。
Next, the execution control means 10 activates the test environment setting means 21 (step 61). The activated test environment setting means 21 sets a test environment for executing the instruction under test. When the test environment is set, the execution control means 10 then activates the instruction under test executing means 22 (step 62), and the activated instruction under test executing means 22 executes the instruction under test. After the instruction under test is executed, the execution control means 10 activates the execution result determining means 23 (step 63), and the execution result determining means 23 compares the execution result of the instruction under test with the expected value. (Step 6
4) If they do not match, an execution result error occurs.

【0015】例えば、加算命令を例にとって説明する
と、「データA」と「データB」との加算結果が「デー
タC」となるとき、加算命令の実行結果である「データ
C」の値と、「データA」と「データB」との加算演算
の期待値との比較を行い、エラーを検出する。
For example, taking an addition instruction as an example, when the addition result of "data A" and "data B" becomes "data C", the value of "data C" which is the execution result of the addition instruction, An error is detected by comparing the expected value of the addition operation of "data A" and "data B".

【0016】次に、実行結果がエラーならば、被試験命
令を以下のように再度実行する。
Next, if the execution result is an error, the instruction under test is re-executed as follows.

【0017】まず、実行CPUをCPU40に設定して
(ステップ65)、CPU40上の試験環境設定手段4
1を起動する(ステップ66)。試験環境設定手段41
は、試験環境設定手段21と同様な動作により被試験命
令を実行するための試験環境を設定する。次に、実行C
PUをCPU30に設定し(ステップ67)、被試験命
令実行手段22を起動する(ステップ68)。そして、
被試験命令実行手段22は、被試験命令を実行する。
First, the execution CPU is set in the CPU 40 (step 65), and the test environment setting means 4 on the CPU 40 is set.
1 is activated (step 66). Test environment setting means 41
Sets the test environment for executing the instruction under test by the same operation as the test environment setting means 21. Then run C
The PU is set in the CPU 30 (step 67) and the instruction under test executing means 22 is activated (step 68). And
The instruction under test execution means 22 executes the instruction under test.

【0018】次に、実行CPUをCPU40に設定して
(ステップ69)、CPU上の実行結果判定手段42を
起動する(ステップ70)。実行結果判定手段42は、
実行結果判定手段23と同様な動作により、被試験命令
の実行結果と期待値とを比較し、不一致ならば、実行結
果エラーとする。そして、実行結果をCRTディスプレ
イ50上に表示する(ステップ71)。
Next, the execution CPU is set to the CPU 40 (step 69), and the execution result judging means 42 on the CPU is activated (step 70). The execution result judging means 42
By the same operation as the execution result judging means 23, the execution result of the instruction under test is compared with the expected value, and if they do not match, an execution result error is determined. Then, the execution result is displayed on the CRT display 50 (step 71).

【0019】すなわち、加算演算の期待値と実行結果と
が一致しせずエラーが発生した場合には、次に試験環境
設定手段41と実行結果判定手段42とを動作させて、
やはりエラーが発生すれば、被試験命令のエラーである
と判定することができる。そして、試験環境設定手段4
1と実行結果判定手段42とを動作させて、今度はエラ
ーが発生しないときには、試験環境設定手段21または
実行結果判定手段23のエラーと判定することができ
る。
That is, when the expected value of the addition operation and the execution result do not match and an error occurs, the test environment setting means 41 and the execution result judging means 42 are operated next,
If an error still occurs, it can be determined that the instruction under test has an error. And the test environment setting means 4
1 and the execution result judging means 42 are operated, and when no error occurs this time, it can be judged as an error of the test environment setting means 21 or the execution result judging means 23.

【0020】このように、試験プログラムの実行結果が
エラーとなった場合、被試験命令以外の処理をCPU上
で再度実行してみて、結果を比較できるように表示する
ことにより、被試験命令でエラーが発生したか否かの判
定が自動的に行われ、障害解析を短時間で行うことがで
きる。
As described above, when the execution result of the test program results in an error, the process other than the instruction under test is re-executed on the CPU, and the result is displayed so that the result can be compared. Whether or not an error has occurred is automatically determined, and failure analysis can be performed in a short time.

【0021】なお、上記の説明の被試験命令の実行は、
単独の命令の実行であっても、複数の命令の組み合せの
状態での実行であってもよい。
The execution of the instruction under test described above is
Execution of a single instruction or execution of a combination of a plurality of instructions may be performed.

【0022】[0022]

【発明の効果】以上説明したように、本発明の情報処理
装置の試験実行方式は、試験プログラムの実行結果がエ
ラーとなった場合、被試験命令以外の処理をCPU上で
再度実行してみて、結果を比較できるように表示するこ
とにより、被試験命令でエラーが発生したか否かの判定
が自動的に行われ、障害解析を短時間で行うことができ
るという効果を有している。
As described above, according to the test execution method of the information processing apparatus of the present invention, when the execution result of the test program results in an error, the process other than the instruction under test is executed again on the CPU. By displaying the results so that they can be compared with each other, it is possible to automatically determine whether or not an error has occurred in the instruction under test, and it is possible to perform the failure analysis in a short time.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の情報処理装置の試験実行方式の一実施
例を示す構成図である。
FIG. 1 is a configuration diagram showing an embodiment of a test execution system of an information processing apparatus of the present invention.

【図2】図1の実行制御手段の動作の一例を示す流れ図
である。
FIG. 2 is a flow chart showing an example of the operation of the execution control means of FIG.

【符号の説明】[Explanation of symbols]

10 実行制御手段 20 試験プログラム 21 試験環境設定手段 22 被試験命令実行手段 23 実行結果判定手段 30 CPU 40 CPU 41 試験環境設定手段 42 実行結果判定手段 50 CRTディスプレイ 10 Execution Control Means 20 Test Program 21 Test Environment Setting Means 22 Test Instruction Executing Means 23 Execution Result Judging Means 30 CPU 40 CPU 41 Test Environment Setting Means 42 Execution Result Judging Means 50 CRT Display

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも2の中央処理装置を備えた情
報処理装置の試験実行方式であって、 (A)前記中央処理装置のうちの第1の中央処理装置上
で動作し、前記第1の中央処理装置上で被試験命令を実
行するための実行環境を設定する第1の試験環境設定手
段、 (B)前記第1の中央処理装置上で動作し、前記被試験
命令を実行する被試験命令実行手段、 (C)前記第1の中央処理装置上で動作し、前記被試験
命令が実行された結果が、正常か否かを判定する第1の
実行結果判定手段、 (D)前記被試験命令実行手段により行われた前記被試
験命令の1回目の実行結果が正常でないと前記第1の実
行結果判定手段により判定された場合、前記中央処理装
置のうちの第2の中央処理装置上で動作し、前記第1の
試験環境設定手段と同様の試験環境の設定を行い、設定
された試験環境設定情報を、被試験命令の2回目の実行
を行う前記被試験命令実行手段に引き継ぐ第2の試験環
境設定手段、 (E)前記第2の中央処理装置上で動作し、前記第1の
中央処理装置上で被試験命令を実行した前記被試験命令
実行手段から、2回目の被試験命令の実行結果の情報を
引き継ぎ、前記被試験命令の2回目の実行結果が、正常
か否かを判定する第2の実行結果判定手段、 (F)前記被試験命令の1回目の実行結果が正常でない
と前記第1の実行結果判定手段により判定された場合、
前記第2の試験環境設定手段を起動させて前記第2の試
験環境設定手段の実行結果を前記被試験命令実行手段に
引き継がせ、次に前記被試験命令実行手段の実行結果を
前記第2の実行結果判定手段に引き継がせるように制御
動作を行う実行制御手段、 を備えたことを特徴とする情報処理装置の試験実行方
式。
1. A test execution system for an information processing apparatus comprising at least two central processing units, comprising: (A) operating on a first central processing unit of the central processing units; A first test environment setting means for setting an execution environment for executing the instruction under test on the central processing unit; (B) a device under test which operates on the first central processing unit and executes the instruction under test Instruction execution means, (C) first execution result determination means that operates on the first central processing unit and determines whether or not the result of execution of the instruction under test is normal, (D) the On the second central processing unit of the central processing units, when the first execution result determining unit determines that the first execution result of the instruction under test performed by the test instruction executing unit is not normal. The same as the first test environment setting means. Second test environment setting means for setting the test environment and passing the set test environment setting information to the instruction under test executing means for executing the second instruction under test, (E) the second central portion The information of the execution result of the second instruction under test is inherited from the instruction under test executing means which operates on the processor and executes the instruction under test on the first central processing unit, and Second execution result judging means for judging whether or not the execution result for the first time is normal; (F) it is judged by the first execution result judging means that the execution result for the first time of the instruction under test is not normal. If
The second test environment setting means is activated so that the execution result of the second test environment setting means is handed over to the instruction under test executing means, and then the execution result of the instruction under test executing means is changed over to the second test environment executing means. A test execution method for an information processing apparatus, comprising: an execution control unit that performs a control operation so that the execution result determination unit can take over.
【請求項2】 少なくとも2の中央処理装置を備えた情
報処理装置の試験実行方式であって、 (A)前記中央処理装置のうちの第1の中央処理装置上
で動作し、前記第1の中央処理装置上で被試験命令を実
行するための実行環境を設定する第1の試験環境設定手
順、 (B)前記第1の中央処理装置上で動作し、前記被試験
命令を実行する被試験命令実行手順、 (C)前記第1の中央処理装置上で動作し、前記被試験
命令が実行された結果が、正常か否かを判定する第1の
実行結果判定手順、 (D)前記被試験命令実行手順により行われた前記被試
験命令の1回目の実行結果が正常でないと前記第1の実
行結果判定手順により判定された場合、前記中央処理装
置のうちの第2の中央処理装置上で動作し、前記第1の
試験環境設定手順と同様の試験環境の設定を行い、設定
された試験環境設定情報を、被試験命令の2回目の実行
を行う前記被試験命令実行手順に引き継ぐ第2の試験環
境設定手順、 (E)前記第2の中央処理装置上で動作し、前記第1の
中央処理装置上で被試験命令を実行した前記被試験命令
実行手順から、2回目の被試験命令の実行結果の情報を
引き継ぎ、前記被試験命令の2回目の実行結果が、正常
か否かを判定する第2の実行結果判定手順、(F)前記
被試験命令の1回目の実行結果が正常でないと前記第1
の実行結果判 定手順により判定された場合、前記第2の試験環境設定
手順を起動させて前記第2の試験環境設定手順の実行結
果を前記被試験命令実行手順に引き継がせ、次に前記被
試験命令実行手順の実行結果を前記第2の実行結果判定
手順に引き継がせるように制御動作を行う実行制御手
順、 を備えたことを特徴とする情報処理装置の試験実行方
式。
2. A test execution system for an information processing apparatus having at least two central processing units, comprising: (A) operating on a first central processing unit of the central processing units; A first test environment setting procedure for setting an execution environment for executing an instruction under test on the central processing unit; (B) a device under test which operates on the first central processing unit and executes the instruction under test An instruction execution procedure, (C) a first execution result determination procedure for determining whether or not the result of execution of the instruction under test operating on the first central processing unit is normal, (D) the subject On the second central processing unit of the central processing units, if the first execution result determination procedure determines that the first execution result of the instruction under test performed by the test instruction execution procedure is not normal. The same as the first test environment setting procedure described above. A second test environment setting procedure for setting a test environment and inheriting the set test environment setting information to the instruction under test execution procedure for executing the second instruction under test; (E) the second center The information of the execution result of the second instruction under test is inherited from the instruction under test execution procedure which operates on the processor and executes the instruction under test on the first central processing unit. A second execution result determination procedure for determining whether or not the execution result for the first time is normal, (F) The first execution result for the instruction under test is not normal for the first execution result.
If it is determined by the execution result determination procedure of step S1, the second test environment setting procedure is activated, the execution result of the second test environment setting procedure is inherited by the instruction under test execution step, and then the second test environment setting procedure is executed. A test execution method for an information processing apparatus, comprising: an execution control procedure for performing a control operation so that the execution result of the test instruction execution procedure can be taken over by the second execution result determination procedure.
JP3195662A 1991-08-06 1991-08-06 Test execution system for information processor Pending JPH0540648A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3195662A JPH0540648A (en) 1991-08-06 1991-08-06 Test execution system for information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3195662A JPH0540648A (en) 1991-08-06 1991-08-06 Test execution system for information processor

Publications (1)

Publication Number Publication Date
JPH0540648A true JPH0540648A (en) 1993-02-19

Family

ID=16344909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3195662A Pending JPH0540648A (en) 1991-08-06 1991-08-06 Test execution system for information processor

Country Status (1)

Country Link
JP (1) JPH0540648A (en)

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