JPH0540458Y2 - - Google Patents
Info
- Publication number
- JPH0540458Y2 JPH0540458Y2 JP1987149575U JP14957587U JPH0540458Y2 JP H0540458 Y2 JPH0540458 Y2 JP H0540458Y2 JP 1987149575 U JP1987149575 U JP 1987149575U JP 14957587 U JP14957587 U JP 14957587U JP H0540458 Y2 JPH0540458 Y2 JP H0540458Y2
- Authority
- JP
- Japan
- Prior art keywords
- probe pin
- contact probe
- board
- pin board
- top plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Tests Of Electronic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987149575U JPH0540458Y2 (en:Method) | 1987-09-30 | 1987-09-30 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987149575U JPH0540458Y2 (en:Method) | 1987-09-30 | 1987-09-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6453973U JPS6453973U (en:Method) | 1989-04-03 |
JPH0540458Y2 true JPH0540458Y2 (en:Method) | 1993-10-14 |
Family
ID=31421927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987149575U Expired - Lifetime JPH0540458Y2 (en:Method) | 1987-09-30 | 1987-09-30 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0540458Y2 (en:Method) |
-
1987
- 1987-09-30 JP JP1987149575U patent/JPH0540458Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS6453973U (en:Method) | 1989-04-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20060279302A1 (en) | Probe card and method for using probe card, wafer prober utilizing same | |
KR100707686B1 (ko) | 패널의 검사장치 | |
CN219695219U (zh) | 一种smt加工成形电路板的测试治具 | |
US6876215B1 (en) | Apparatus for testing semiconductor integrated circuit devices in wafer form | |
DE19638402C2 (de) | Prüfvorrichtung für einen Mehrkontakt-Chip | |
JPH0540458Y2 (en:Method) | ||
JP4175492B2 (ja) | プリント基板検査治具 | |
JPS6273177A (ja) | 電子モジユ−ルのための保持兼試験装置 | |
JPH0540459Y2 (en:Method) | ||
JPH0637348Y2 (ja) | 電子部品の検査装置 | |
JP2001183402A (ja) | プリント基板のインピーダンス測定用プロービング装置 | |
JPH09138257A (ja) | プリント基板の検査装置および方法 | |
KR100361809B1 (ko) | 모듈 아이씨 핸들러용 캐리어 | |
KR101947454B1 (ko) | 디스플레이패널 팔레트용 콘택터 클램핑장치 | |
JPH0422309Y2 (en:Method) | ||
JPH0336938Y2 (en:Method) | ||
JP3307166B2 (ja) | 回路基板の検査装置 | |
JPH0430550Y2 (en:Method) | ||
KR100313405B1 (ko) | 회로기판 검사용 지그 | |
CN220455509U (zh) | 一种芯片测试校准装置 | |
JPH0129589Y2 (en:Method) | ||
KR0139952Y1 (ko) | 회로기판 검사장치 | |
JPH0138531Y2 (en:Method) | ||
KR0150141B1 (ko) | 지그박스의 자동 세팅장치 | |
KR100285213B1 (ko) | 디램소자 테스트용 지그 |