JPH0536605A - Manufacture of compound semiconductor substrate - Google Patents

Abstract

PURPOSE:To obtain the manufacturing method of a compound semiconductor substrate wherein a compound semiconductor thin film having little crystal defect can be epitaxially grown on a single crystal substrate. CONSTITUTION:A compound semiconductor thin film is epitaxially grown on a single crystal substrate at a normal growth temperature. Annealing is performed at a specified temperature by applying a specified hydrostatic pressure. Heat treatment is performed at least one time at a temperature higher or lower than the above temperature. Thereby the dislocation density of the compound semiconductor thin film grown on the single crystal substrate and the warp of a substrate can be reduced, so that a compound semiconductor substrate whose crystallinity is improved can be manufactured. Hence a compound semiconductor substrate for an electronic device which substrate has excellent crystallinity and large area can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to the field of manufacturing compound semiconductor substrates for optical or high speed devices, and relates to a method for epitaxially growing a compound semiconductor thin film on a single crystal substrate.

[0002]

2. Description of the Related Art In recent years, substrates in which a material for which a large-area substrate is difficult to manufacture are heteroepitaxially grown on a substrate made of a material different from that material have been manufactured. As such an example, there is a substrate in which GaAs is epitaxially grown on a silicon substrate. Compound semiconductors such as GaAs are
Since it has various features that cannot be realized with silicon, there is great demand for optical or high-speed devices. On the other hand, the major problems with GaAs wafers are not only that the price is very high, but also that it is difficult to form a perfect crystal, and the mechanical strength is small, and it is difficult to increase the area because it is fragile. is there. Therefore, if it is possible to fabricate a substrate in which a GaAs layer is formed on a silicon substrate, GaAs
It is possible to realize a device that takes advantage of each of the advantages of silicon and silicon.

Under such circumstances, G on the silicon substrate
A technique for epitaxially growing aAs has been attracting attention, and research and development have been actively conducted. However, the lattice constant of silicon and GaAs is about 4% (the lattice constant of silicon at room temperature: 5.4309Å, GaAs at room temperature).
Lattice constant: 5.6533 Å)
It is not possible to epitaxially grow a single crystal GaAs layer on a silicon substrate under the same growth conditions as when manufacturing the substrate, and it is necessary to relax the lattice mismatch between the two and to grow the single crystal GaAs layer epitaxially on the silicon substrate. Ingenuity is needed.

As one of such measures, there is known a method of epitaxially growing GaAs in two stages of a low temperature state and a high temperature state (Nikkei Microdevice 1).
January 986, p113-127). According to this method, GaA that is amorphous or crystallized to some extent at low temperature is used.
After epitaxially growing s, GaA is grown at high temperature.
By the two-step growth in which s is further epitaxially grown,
In this method, a single crystal GaAs layer is formed on a silicon substrate.

This method will be described below. First, according to the growth temperature profile shown in FIG. 3, the silicon substrate is heat-treated at about 1000 ° C. to clean the surface,
MOCVD (Metal Organic Chemical Vapor Depositio)
n; vapor phase growth by pyrolysis of organic metal) or MBE
(Molecular Beam Epitaxy) method, if MOCVD method, 450 ℃, MB
In the case of the E method, GaAs is epitaxially grown at a low temperature of about 400 ° C. and a film thickness of 20 is obtained as shown in FIG.
Silicon substrate 1 with GaAs layer 12 grown at low temperature of 0Å
Form on 1. Next, after suspending the growth once, the temperature of the silicon substrate 11 is raised to about 600 to 750 ° C. and GaAs is epitaxially grown again, and the film thickness is several μm.
Forming a monocrystalline GaAs layer 13 (FIG. 4)
(B)). By such a two-step growth method, the lattice mismatch due to the difference in lattice constant can be relaxed and the single crystal GaAs layers 12 and 13 can be formed on the silicon substrate 11.

[0006]

However, in the above method of manufacturing a compound semiconductor substrate, when the GaAs layers 12 and 13 are epitaxially grown on the silicon substrate 11, the coefficient of thermal expansion of silicon (α _Si = 2.6 × 10 6) is used. ^-6 /
° C) and the coefficient of thermal expansion of _GaAs (α _GaAs = 6.5 × 10 ^-6
/ ° C.) is significantly different from the growth temperature T _{G of the} GaAs layers 12 and 13 which are very thin with respect to the silicon substrate 11.
Thermal strain ε _T occurs due to the temperature difference ΔT when cooling from (700 ° C.) to room temperature T _R (25 ° C.). The thermal strain ε _T at this time is expressed by the following formula 1.

[0007]

[Equation 01]

At this time, due to the generated thermal strain, Ga
There has been a problem that dislocations are introduced into the As layers 12 and 13 and the crystallinity is lowered.

The dislocation density generated at this time is 1 × 10.
^{It is} about ⁷ / cm ^2, which is the practical maximum value 1 × that can be used for the fabrication of semiconductor devices such as FETs and semiconductor lasers.
Higher than 10 ⁵ / cm ² . Further, the compound semiconductor substrate 10 is moved to the state shown in FIG.
Since the GaAs layers 12 and 13 are warped as shown in (c), there is a problem in that the yield is lowered in the photolithography process at the time of manufacturing a semiconductor device.

The present invention has been made in view of the above problems, and provides a method of manufacturing a compound semiconductor substrate capable of epitaxially growing a compound semiconductor thin film having few crystal defects on a single crystal substrate. It is an object.

[0011]

In order to achieve the above object, a method for producing a compound semiconductor substrate according to the present invention is a method for producing a compound semiconductor substrate in which a compound semiconductor thin film is epitaxially grown on a single crystal substrate. The thin film is grown at a normal growth temperature, after which, under a predetermined temperature condition, a predetermined hydrostatic pressure is applied to perform an annealing treatment,
Then, the heat treatment is performed at least once at a temperature above and below the predetermined temperature.

[0012]

[Operation] GaA is divided into two stages, a low temperature state and a high temperature state.
When a compound semiconductor such as s is epitaxially grown,
As shown in FIG. 2A, the lattice mismatch is relaxed and the single crystal GaAs layers 12 and 13 are epitaxially grown on the silicon substrate 11. However, since the elastic stiffness of silicon and the elastic stiffness of GaAs are different, when hydrostatic pressure P _O is applied at a certain temperature T ₁ ,
As shown in FIG. 2B, the compound semiconductor substrate 10 is warped due to the compressive strain ε _Po . Compressive strain ε at this time
_Po is represented by the following equation 2.

[0013]

[Equation 02]

At this time, dislocations due to the compressive strain ε _Po occur, and the dislocations in the GaAs layers 12 and 13 increase. However, after this, the temperature T ₂ different from the temperature T ₁ and the temperature T ₂
By moving the temperature up and down n times to T ₃ different from ₁ and T ₂ , migration of dislocations in the GaAs layers 12 and 13 is promoted,
As shown in FIG. 2C, the stress in the GaAs layers 12 and 13 is released, the strain disappears, and the dislocations become GaA.
Dislocations are reduced to the surface of the s layers 12 and 13. On this occasion,
The relationship between T ₁ , T ₂ and T ₃ is T ₂ <T ₁ <T ₃ or T
_2> T _1> may be a T ₃ but, | T ₂ -T ₁ | and | T
_If the value of _3- T ₁ | is small, the effect of reducing dislocations and strains is small, and it is necessary to increase the number n of thermal cycles. Due to this effect, the strain of the GaAs layers 12 and 13 after the thermal cycle is zero.

Next, as shown in FIG. 1, when the temperature is lowered from point D, which is the temperature T ₁ after the thermal cycle, to point E, which is an arbitrary temperature T, the heat of silicon and GaAs as shown in equation 3 is obtained. Thermal strain ε _T is generated due to the difference in expansion coefficient.

[0016]

[Equation 03]

If the hydrostatic pressure P _O applied after the heat cycle is reduced to an arbitrary applied pressure P,
The compressive strain ε _P caused by this is expressed as in Equation 4.

[0018]

[Formula 04]

Therefore, in FIG. 1, the GaAs layers 12 and 1 when the temperature is lowered and lowered from the point D to an arbitrary point E after the end of the thermal cycle.
From Equation 3 and Equation 4, the total strain ε that occurs in 3 is

[0020]

[Equation 05]

[0021]

Therefore, the GaAs layer 1 is kept at room temperature and atmospheric pressure.
In order to eliminate the strains generated in Nos. 2 and 13, that is, in order to obtain the strain ε = 0 in the atmosphere at room temperature T _R and the applied pressure P = 0, from the formula 5,

[0023]

[Expression 06]

From this, when the hydrostatic pressure P _O to be applied after the end of the thermal cycle is determined,

[0025]

[Equation 07]

Therefore, at the point C (FIG. 1) where the hydrostatic pressure P _O is applied after the epitaxial growth of GaAs, if the hydrostatic pressure P _O corresponding to the pressure obtained by the equation 7 is applied, the GaAs is at room temperature and in the atmosphere. No strain is generated in the layers 12 and 13.

Further, in order to prevent the strain from being generated even in the process of lowering the temperature and lowering the pressure, it suffices if the equation 5 becomes 0.

[0028]

[Equation 08]

It becomes Substituting equation 7 into this,

[0030]

[Equation 09]

Therefore, if the temperature is reduced to atmospheric pressure and room temperature and the pressure is reduced while satisfying the relationship of the equation 9, no strain is generated even in the process of temperature reduction and pressure reduction.

For example, if the temperature decrease rate of the reactor is a and the time from the start of temperature decrease is t, the temperature T at an arbitrary point E is

[0033]

[Equation 10]

Is represented as

[0035]

[Equation 11]

It becomes Therefore, from equations 10 and 11, the depressurization time rate b of hydrostatic pressure is

[0037]

[Equation 12]

If this is done, the temperature can be lowered and the pressure can be reduced while satisfying the expression (9). Therefore,

[0039]

[Equation 13]

The temperature T = T _R (room temperature), the applied pressure P = 0 (atmospheric pressure) at the time of.

Therefore, according to the method described above, in the method of manufacturing a compound semiconductor substrate in which a semiconductor thin film is epitaxially grown on a single crystal substrate, the semiconductor thin film is grown at a normal growth temperature, and thereafter, under a predetermined temperature condition, a predetermined temperature condition is applied. The hydrostatic pressure is applied to perform the annealing treatment, and then the heat treatment at a temperature above and below the predetermined temperature is performed at least once. Therefore, the dislocation density in the compound semiconductor thin film grown on the single crystal substrate and the substrate A compound semiconductor substrate with reduced warpage and improved crystallinity can be obtained.

[0042]

EXAMPLES Examples of the method for manufacturing a compound semiconductor substrate according to the present invention will be described below. The components having the same functions as those of the conventional example are designated by the same reference numerals.

A silicon substrate which is off by 2 ° in the [011] direction from the (100) plane is used as a substrate, and TMG (trimeryl gallium) and AsH ₃ (arsine) are used as raw materials.
Is used to grow GaAs layers 12 and 13 on a silicon substrate 11 by MOCVD as shown in FIG.

According to the growth temperature profile as shown in FIG. 1, first, the wet-processed silicon substrate 11 is transferred onto a susceptor in a reaction furnace, and RF heating is performed at about 1000 ° C. for 30 minutes in an H ₂ atmosphere. To do. Then 45
The temperature is lowered to 0 ° C., AsH _{3 is} introduced, and then TMG is introduced to grow a 200 Å GaAs layer 12 by low temperature growth. Next, the temperature is raised to 700 ° C. which is a normal growth temperature, and a GaAs layer 13 having a thickness of 3 μm is further grown thereon (FIG. 2A). The other growth conditions of the GaAs layer 13 at this time are the same as the growth conditions of the GaAs layer 12 at the time of low temperature growth.

After growing the GaAs layers 12 and 13, the temperature inside the furnace is lowered to T ₁ = 500 ° C. and a hydrostatic pressure is applied. Here, the elastic stiffness of GaAs is C ₁₁ = 1.18 × 10 ¹² ,
C ₁₂ = 0.532 × 10 ¹² , the elastic stiffness of silicon is C
₁₁ = 1.66 x 10 ¹² , C ₁₂ = 0.639 x 10 ¹² (dyn / cm
² ), α _Si = 2.6 × 10 ⁻⁶ / ° C., α _GaAs = 6.5 × 1
Since at 0 ^-6 / ° C., the hydrostatic pressure P _O is applied than the number 7 is applied 1.76 × ^{10 10} dyn / cm ^2, and the hydrostatic pressure P _O corresponding thereto in an argon gas atmosphere.

Next, while keeping this pressure P _O constant, T ₂
= 800 ° C., T ₃ = 200 ° C. and 3 cycles. The average heating and cooling rates at this time are 100 ° C / min, 50 ° C / min, 800 ° C and 200 ° C, respectively.
Hold time was 1 minute. And again 500 ℃
Then, the temperature decrease time rate a was 1 ° C./minute, and the decompression time rate b was 3.7 × 10 ⁷ dyn / cm ² · minute.
The pressure was reduced and the mixture was cooled to room temperature and atmospheric pressure over 475 minutes.

The dislocation density and warpage of the thus obtained compound semiconductor substrate 10 having a diameter of 2 inches and a semiconductor laser was produced using this compound semiconductor substrate 10, and the average lifetime (sample at 30 ° C. and output of 3 mW) was measured. The average value of several hundreds) is shown in Table 1 together with the comparative examples. In the comparative example, after the growth of the GaAs layers 12 and 13 was completed, the GaAs layers were cooled to room temperature without applying pressure.

[0048]

[Table 1]

As is clear from Table 1, the dislocation density and warpage of the example are lower than those of the comparative example.

As described above, when a compound semiconductor thin film is grown by using the above-mentioned manufacturing method, the dislocation density and the warp can be reduced, and thermal imperfections, which have been one of the major causes of the deterioration of the GaAs crystallinity compared with the prior art. It is possible to lower the temperature to room temperature without being affected by, and it is possible to grow an GaAs epitaxial film with few crystal defects on the silicon substrate 11. Furthermore, by manufacturing an electronic device using these, it becomes possible to provide a device having improved characteristics.

[0051]

As described in detail above, in the method of manufacturing a compound semiconductor substrate according to the present invention, in the method of manufacturing a compound semiconductor substrate in which a compound semiconductor thin film is epitaxially grown on a single crystal substrate, the compound semiconductor thin film is It is grown at a normal growth temperature, then a predetermined hydrostatic pressure is applied under a predetermined temperature condition to perform an annealing treatment, and subsequently, at least one heat treatment is performed at a temperature higher or lower than the predetermined temperature.
Since this is repeated, the dislocation density of the compound semiconductor thin film grown on the single crystal substrate and the warp of the substrate can be reduced, and a compound semiconductor substrate having a compound semiconductor thin film with improved crystallinity can be manufactured. Therefore, it becomes possible to provide a large-area compound semiconductor substrate for electronic devices having good crystallinity.

[Brief description of drawings]

FIG. 1 is a diagram showing a growth temperature profile when a method for manufacturing a compound semiconductor substrate according to the present invention is carried out.

2A is a cross-sectional view of a compound semiconductor substrate immediately after completion of growth, FIG. 2B is a cross-sectional view of a compound semiconductor substrate when hydrostatic pressure is applied, and FIG. It is sectional drawing which shows the compound semiconductor substrate after doing.

FIG. 3 is a diagram showing a growth temperature profile when performing a conventional method for manufacturing a compound semiconductor substrate.

4A, 4B, and 4C are cross-sectional views of a compound semiconductor substrate for explaining a manufacturing process.

[Explanation of symbols]

 10 Compound semiconductor substrate 11 Silicon substrate (single crystal substrate) 12, 13 GaAs layer (semiconductor thin film)

Claims (1)

Claim: What is claimed is: 1. In a method for manufacturing a compound semiconductor substrate, which comprises epitaxially growing a compound semiconductor thin film on a single crystal substrate, the compound semiconductor thin film is grown at a normal growth temperature and then grown under a predetermined temperature condition. A method for producing a compound semiconductor substrate, characterized in that a predetermined hydrostatic pressure is applied to perform an annealing treatment, and then a heat treatment at a temperature above and below the predetermined temperature is performed at least once.