JP2696928B2 - Heteroepitaxial growth method - Google Patents

Description

The present invention relates to a heteroepitaxial growth method, for example, gallium arsenide (GaAs) on a silicon (Si) substrate.
It is suitable for application to heteroepitaxial growth.

[Summary of the Invention]

The heteroepitaxial growth method of the present invention comprises forming an amorphous or polycrystalline semiconductor layer on a substrate, and then performing a heat treatment to monocrystallize the amorphous or polycrystalline semiconductor layer to form a single crystal semiconductor layer. Forming a single-crystal semiconductor layer further on the single-crystal semiconductor layer, forming the amorphous or polycrystalline semiconductor layer on the single-crystal semiconductor layer, and then performing a heat treatment on the single-crystal semiconductor layer. Alternatively, the polycrystalline semiconductor layer is monocrystallized to form a single crystal semiconductor layer,
Forming the single crystal semiconductor layer on the single crystal semiconductor layer. Thus, a high-quality single crystal semiconductor layer having a low density of crystal defects such as dislocations can be heteroepitaxially grown.

[Conventional technology]

Heteroepitaxial growth is a technique for growing an epitaxial layer using substrates having different lattice constants. Si
Heteroepitaxial growth of a GaAs layer on a substrate is a typical example. However, the lattice constant of GaAs is 5.65.
The lattice constant of Si is 5.43086 ° while the angle is 34 °, and the difference between them is as large as about 4%. Therefore, when GaAs is directly grown on a Si substrate, the GaAs grows in an island shape,
No layered product is obtained. Therefore, single-crystal Ga
It can be said that it is difficult to grow the As layer directly.

Applied Physics, Vol. 55, No. 11, (1986), pp. 1069-10
On page 73, a two-stage growth method aimed at solving the above problem is discussed. According to the two-step growth method, first, a thin amorphous or polycrystalline GaAs layer is grown on a Si substrate, and then heat-treated (annealed) to be solid-phase grown to be a single crystal. A single crystal GaAs layer serving as an active layer is grown on the crystallized GaAs layer. The reason for growing the amorphous or polycrystalline thin GaAs layer first is that, in order to finally obtain a layered single crystal GaAs layer, the surface of the Si substrate is first covered with a GaAs layer anyway. This is because the GaAs layer does not necessarily have a function of bending threading dislocations as in the present invention.

[Problems to be solved by the invention]

However, the density of crystal defects such as dislocations present in the single crystal GaAs layer grown by the two-step growth method is 10 ⁸
It is still high at about pcs / cm ² and its quality is insufficient.

Accordingly, an object of the present invention is to provide a heteroepitaxial growth method capable of heteroepitaxially growing a high-quality single crystal semiconductor layer having a low density of crystal defects such as dislocations.

[Means for solving the problem]

In order to solve the above problems, a heteroepitaxial growth method according to the present invention provides an amorphous or polycrystalline semiconductor layer by performing a heat treatment after forming an amorphous or polycrystalline semiconductor layer (2) on a substrate (1). (2) single crystallizing to form a single crystal semiconductor layer (3), and further forming a single crystal semiconductor layer (4) on the single crystal semiconductor layer (3); , 10, 12), an amorphous or polycrystalline semiconductor layer (5, 8) is formed thereon, and then heat treatment is performed to monocrystallize the amorphous or polycrystalline semiconductor layer (5, 8). Forming a semiconductor layer (6, 9, 11, 13) and further forming a single crystal semiconductor layer (7, 10, 12, 14) on the single crystal semiconductor layer (6, 9, 11, 13). Have.

[Action]

According to the above means, a single-crystal semiconductor layer having a somewhat low crystal defect density can be formed by monocrystallizing an amorphous or polycrystalline semiconductor layer formed over a substrate. The crystal defect density in the single crystal semiconductor layer further formed on this single crystal semiconductor layer is approximately equal to or lower than the crystal defect density in the lower single crystal semiconductor layer. An amorphous or polycrystalline semiconductor layer is formed again on the single crystal semiconductor layer thus formed, and when this is heat-treated, the amorphous or polycrystalline semiconductor layer is monocrystallized by solid phase growth. During this solid phase growth, threading dislocations in the lower single crystal semiconductor layer are bent in a direction parallel to the interface between the single crystal semiconductor layer and the amorphous or polycrystalline semiconductor layer, or dislocations are formed. Or form a loop. As a result, propagation of threading dislocations in the lower single crystal semiconductor layer to the upper layer is suppressed as compared with the case where the single crystal semiconductor layer is formed directly on the single crystal semiconductor layer. Is lower than that of the lower single crystal semiconductor layer. The crystal defect density in the single crystal semiconductor layer further formed on the single crystal semiconductor layer having a lower crystal defect density is approximately equal to or lower than the crystal defect density of the lower single crystal semiconductor layer. Therefore, according to the above means, a high-quality single crystal semiconductor layer having a low density of crystal defects such as dislocations can be heteroepitaxially grown.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. This embodiment is an embodiment in which the present invention is applied to heteroepitaxial growth of a GaAs layer on a Si substrate.

As shown in FIG. 1A, first, for example, metal organic chemical vapor deposition (MOCV) is applied onto a Si substrate whose surface has been cleaned in advance.
The amorphous GaAs layer 2 having a thickness of, for example, about 200 ° is formed at a growth temperature of 410 ° C. in a hydrogen (H ₂ ) or arsine (AsH ₃ ) gas atmosphere by the method D).

Next, the amorphous GaAs layer 2 is solid-phase-grown by annealing at, for example, 720 ° C., to be single-crystallized. Thus, a single-crystal GaAs layer 3 is formed as shown in FIG. 1B. The density of crystal defects such as dislocations in the single crystal GaAs layer 3 is as high as about 10 ⁸ / cm ² .

Next, as shown in FIG. 1C, for example, at 750 to 770 ° C.
For example, the single crystal GaAs layer 4 is formed with
Is grown so that the total thickness thereof becomes, for example, about 0.7 μm. The crystal defect density in the single crystal GaAs layer 4 thus formed by the two-step growth method is
Like the layer 3, it is about 10 ⁸ / cm ² .

Next, as shown in FIG. 1D, an amorphous GaAs layer 5 having a thickness of, for example, about 200 ° is again formed on the single crystal GaAs layer 4 by, for example, the MOCVD method.

Next, the amorphous GaAs layer 5 is solid-phase grown (solid-phase homoepitaxial growth) to be single-crystal by annealing at, for example, 720 ° C. in the same manner as described above, and as shown in FIG. The GaAs layer 6 is formed. This amorphous GaAs layer 5
Is single crystallized by solid phase growth, the lower single crystal Ga
Threading dislocations in the As layer 4 are caused by the single crystal GaAs layer 4 and the amorphous GaAs.
As a result of being bent in a direction parallel to the interface with the layer 5 or forming a dislocation loop, the propagation of threading dislocations in the lower single crystal GaAs layer 4 to the upper layer is suppressed. Therefore, the number of threading dislocations in this single crystal GaAs layer 6 is
Therefore, the crystal defect density decreases. Thereafter, a single-crystal GaAs layer 7 is formed on the single-crystal GaAs layer 6 such that the total thickness of the single-crystal GaAs layer 6 is, for example, about 0.7 μm.

Next, as shown in FIG. 1F, an amorphous GaAs layer 8 having a thickness of, for example, about 200 ° is formed on the single crystal GaAs layer 7 again.

Next, this amorphous GaAs layer 8 is monocrystallized by annealing at, for example, 720 ° C., and as shown in FIG.
A single crystal GaAs layer 9 is formed. For the same reasons as above,
The crystal defect density in the single crystal GaAs layer 9 is the same as that of the single crystal GaAs.
It is even lower than layer 7. Thereafter, a single-crystal GaAs layer 10 is further formed on the single-crystal GaAs layer 9. This single crystal
The crystal defect density in the GaAs layer 10 is equal to or lower than that of the single crystal GaAs layer 9.

Next, an amorphous GaAs layer (not shown) having a thickness of, for example, 200 ° is formed on the single-crystal GaAs layer 10, and is monocrystallized to form a single-crystal GaAs layer 11. The crystal defect density in the single crystal GaAs layer 11 is lower than that in the single crystal GaAs layer 10. Next, a single crystal GaAs layer 12 is formed on the single crystal GaAs layer 11 such that the total thickness of the single crystal GaAs layer 11 and the single crystal GaAs layer 11 is about 0.7 μm, for example. The crystal defect density in the single crystal GaAs layer 12 is equal to or lower than that of the single crystal GaAs layer 11. Next, a thickness of, for example,
An amorphous GaAs layer (not shown) of about 200 ° is formed and is monocrystallized to form a single crystal GaAs layer 13. This single crystal
The crystal defect density in the GaAs layer 13 is lower than that in the single crystal GaAs layer 12. After that, a single crystal GaAs layer 14 to be used as an active layer is
It is formed so that the total thickness with the GaAs layer 13 is, for example, about 0.7 μm. The crystal defect density in the single crystal GaAs layer 14 is equal to or lower than that of the single crystal GaAs layer 13.

In this embodiment, the total thickness from the lowermost single-crystal GaAs layer 3 to the uppermost single-crystal GaAs layer 14 is, for example, 3.5 μm.
Becomes

As described above, the single crystal GaAs layer 14 formed by repeating a series of operations of forming an amorphous GaAs layer, single crystallization thereof, and forming a single crystal GaAs layer thereon five times in total.
In order to measure the crystal defect density in the single crystal GaAs layer 14,
Is etched with molten KOH and the density of the etch pits formed thereby (Etch Pit Density, EP
When D) was measured, it was about 5 × 10 ⁶ pieces / cm ² . Therefore,
The crystal defect density such as dislocations in the single crystal GaAs layer 14 is 5 × 10
^It can be seen that it is extremely low at about ⁶ / cm ² . The same measurement of the crystal defect density is performed by performing a series of operations including formation of an amorphous GaAs layer, single crystallization thereof, and a single crystal GaAs layer thereon.
The operation was performed on the uppermost single crystal GaAs layer in the case where the operation was performed four times. FIG. 2 shows the results together with the above results. In each case, the lowermost single crystal
The total thickness from the GaAs layer to the uppermost single crystal GaAs layer is unified to 3.5 μm. Therefore, the greater the number of repetitions of the above series of operations, the smaller the thickness of the single crystal GaAs layer formed immediately above the single crystal GaAs layer formed by single crystallization of the amorphous GaAs layer .

As can be seen from FIG. 2, when the number of amorphous GaAs layers to be formed is 1, that is, when the single crystal GaAs layer is formed by the conventional two-step growth method, the EPD is 10 ⁸ / cm ^2. On the other hand, when the number of amorphous GaAs layers to be formed is 2, the number is reduced to about 1 × 10 ⁷ / cm ² , and when the number of amorphous GaAs layers is 3, to about 8 × 10 ⁷ 10 decreased to ⁶ / cm ² or, further in the case of the number of amorphous GaAs layer 5 is reduced to about 5 × 10 ⁶ cells / cm ² as described above. In other words, the greater the number of repetitions of the series of operations of forming an amorphous GaAs layer, single-crystallizing the same, and forming a single-crystal GaAs layer thereon, the greater the final single-crystal GaAs layer finally formed It can be seen that the crystal defect density in the middle tends to be low.

As described above, according to the present embodiment, a series of operations of forming an amorphous GaAs layer, single-crystallizing the same, and forming a single-crystal GaAs layer thereon are repeatedly performed. The density of crystal defects such as dislocations in the GaAs layer 14 is 5 × 10 ⁶ / cm ²
Degree and extremely low. Therefore, a high-quality single-crystal GaAs layer 14 having a low density of crystal defects such as dislocations can be heteroepitaxially grown on the Si substrate 1.

By using the high-quality single-crystal GaAs layer 14 obtained in this embodiment as an active layer, a high-performance semiconductor device such as a high-speed semiconductor device can be manufactured. Further, by making the high-speed semiconductor element and the optical semiconductor element monolithic, a high-performance optoelectronic integrated circuit (OEIC) can be realized.

As mentioned above, although one Example of this invention was described concretely, this invention is not limited to said Example,
Various modifications based on the technical idea of the present invention are possible.

For example, the number of repetitions of a series of operations of forming an amorphous GaAs layer, single-crystallizing the same, and forming a single-crystal GaAs layer thereon can be selected as necessary. Also, amorphous
Instead of the GaAs layers 2, 5, 8, etc., it is also possible to use a polycrystalline GaAs layer. Further, instead of the Si substrate 1, a substrate in which a single crystal Si film is formed on an insulating substrate such as a quartz glass substrate can be used as the substrate. Note that, for example, a substrate in which an insulating film such as a SiO ₂ film is formed on the surface of a Si substrate or a Si film formed on various substrates, or a quartz glass substrate can be used as the substrate. Furthermore, it is also possible to use a molecular beam epitaxy (MBE) method instead of the MOCVD method used in the above embodiment.

In the above-described embodiment, the case where the present invention is applied to heteroepitaxial growth of a GaAs layer on a Si substrate has been described. However, the present invention is applied to a case where a single crystal semiconductor layer other than GaAs is heteroepitaxially grown. It is also possible.

〔The invention's effect〕

As described above, according to the present invention, during the single crystallization of an amorphous or polycrystalline semiconductor layer formed over a single crystal semiconductor layer having a relatively low crystal defect density, the lower single crystal semiconductor layer Of the threading dislocations to the upper layer is suppressed, so that the crystal defect density in the single crystal semiconductor layer formed by the single crystallization becomes low, and therefore, the single crystal semiconductor further formed on the single crystal semiconductor layer The crystal defect density in the layer will be about the same or lower. Thus, a high-quality single crystal semiconductor layer having a low density of crystal defects such as dislocations can be heteroepitaxially grown.

[Brief description of the drawings]

1A to 1G are cross-sectional views for explaining a heteroepitaxial growth method according to an embodiment of the present invention in the order of steps, and FIG. 2 is an etch pit of an uppermost single crystal GaAs layer formed by heteroepitaxial growth. Density and amorphous Ga
6 is a graph showing a relationship with the number of As layers. Description of main symbols in the drawings 1: Si substrate, 2, 5, 8: amorphous GaAs layer, 3, 4, 6, 7,
9, 10 to 14: single crystal GaAs layer.

Claims (1)

(57) [Claims] An amorphous or polycrystalline semiconductor layer is formed on a substrate, and heat treatment is performed to monocrystallize the amorphous or polycrystalline semiconductor layer to form a single crystal semiconductor layer.
A step of further forming the single-crystal semiconductor layer on the single-crystal semiconductor layer, and forming the amorphous or polycrystalline semiconductor layer on the single-crystal semiconductor layer, and then performing a heat treatment on the amorphous or polycrystalline semiconductor layer. Forming a single crystal semiconductor layer by monocrystallizing the polycrystalline semiconductor layer, and further forming the single crystal semiconductor layer on the single crystal semiconductor layer.