JPH053615B2 - - Google Patents

Info

Publication number
JPH053615B2
JPH053615B2 JP60106835A JP10683585A JPH053615B2 JP H053615 B2 JPH053615 B2 JP H053615B2 JP 60106835 A JP60106835 A JP 60106835A JP 10683585 A JP10683585 A JP 10683585A JP H053615 B2 JPH053615 B2 JP H053615B2
Authority
JP
Japan
Prior art keywords
input
bus
output
data
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60106835A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61265651A (ja
Inventor
Akihiro Sera
Kazuhiko Gokon
Juji Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60106835A priority Critical patent/JPS61265651A/ja
Priority to CA000509299A priority patent/CA1257400A/en
Priority to DE8686106922T priority patent/DE3687367T2/de
Priority to KR8603972A priority patent/KR900007680B1/ko
Priority to EP86106922A priority patent/EP0202675B1/en
Publication of JPS61265651A publication Critical patent/JPS61265651A/ja
Priority to US07/281,947 priority patent/US4933840A/en
Publication of JPH053615B2 publication Critical patent/JPH053615B2/ja
Granted legal-status Critical Current

Links

JP60106835A 1985-05-21 1985-05-21 入出力制御装置 Granted JPS61265651A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP60106835A JPS61265651A (ja) 1985-05-21 1985-05-21 入出力制御装置
CA000509299A CA1257400A (en) 1985-05-21 1986-05-15 Input/output control system
DE8686106922T DE3687367T2 (de) 1985-05-21 1986-05-21 Ein/ausgabe-steuerungssystem.
KR8603972A KR900007680B1 (en) 1985-05-21 1986-05-21 Input/output control system
EP86106922A EP0202675B1 (en) 1985-05-21 1986-05-21 Input/output control system
US07/281,947 US4933840A (en) 1985-05-21 1988-12-07 I/O control system using buffer full/empty and zero words signals to control DMA read/write commands

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60106835A JPS61265651A (ja) 1985-05-21 1985-05-21 入出力制御装置

Publications (2)

Publication Number Publication Date
JPS61265651A JPS61265651A (ja) 1986-11-25
JPH053615B2 true JPH053615B2 (enExample) 1993-01-18

Family

ID=14443773

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60106835A Granted JPS61265651A (ja) 1985-05-21 1985-05-21 入出力制御装置

Country Status (1)

Country Link
JP (1) JPS61265651A (enExample)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5663629A (en) * 1979-10-27 1981-05-30 Nec Corp Buffer control device
JPS608965A (ja) * 1983-06-29 1985-01-17 Fujitsu Ltd 入出力バツフアメモリ方式

Also Published As

Publication number Publication date
JPS61265651A (ja) 1986-11-25

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