JPH05346801A - Program operation control device - Google Patents

Abstract

PURPOSE:To check a bit change during the execution of a program developed on a DRAM. CONSTITUTION:A program operation controller 10 which executes the program developed on a DRAM 12, and controls the operation of auxiliary equipments 16 and 17, is equipped with a fixed arithmetic sum storage means 12T which stores each fixed arithmetic sum DtX of the program developed on the DRAM 20, actual arithmetic sum calculating means 11 and 12 which calculate each arithmetic sum DaX of the program developed on the DRAM 20 during the execution of the identity judging means 11 and 12 which compare each calculated actual arithmetic sum DaX with each corresponding fixed arithmetic sum DtX, and judge the identity, and program stoppage control means 11 and 12 which stop the program based on the condition that each calculated actual arithmetic sum DaX and each corresponding fixed arithmetic sum DtX are judged to be different from each other by the identify judging means 11 and 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program operation control device configured to execute a program on a DRAM.

[0002]

2. Description of the Related Art In order to expand the functions and speed up processing of all devices and equipment including electronic equipment and office automation equipment, a program operation control device for executing operation control of auxiliary equipment while executing a program is widely used. There is.

Among such program operation control devices,
In many cases, the programs are formed on the DRAM from the viewpoint of capacity and economy. However, DRA
Due to its nature, M causes inversion of the stored bits with a probability of about 1 to 100 Fit, so-called garbled bit.

Thus, in the conventional apparatus, a correction data bit of 4 bits or 1 bit is provided in the program data, an ECC check or a parity check is performed during operation control, and the garbled bit is detected to detect an abnormality. There is one formed to forcibly invert and correct bits.

[0005]

However, in the above-mentioned conventional inversion correction type structure, since correction data, check and inversion correction programs must be prepared,
It is necessary to increase the storage capacity of the ROM or the like by about 1.5 times. Therefore, the cost becomes high and the device becomes large.

Thus, it is often difficult to provide the above-described inversion correction function in an apparatus that is strongly required to be small, lightweight and low cost, and therefore, the check is made only when the apparatus power is turned on. However, with this configuration, there is a strong risk that program runaway or data destruction due to this may occur during operation control, and reliability is lacking.

An object of the present invention is to provide a small-capacity, low-cost program operation control device capable of preventing program runaway and data destruction due to it by automatically detecting garbled bits during operation control. It is in.

[0008]

According to the present invention, even if the program is stopped halfway in the present apparatus, the trouble to the operation control is small and the program can be recovered in a relatively short time. However, focusing on the fact that it is often a serious problem that data is destroyed due to this, each of the program data when the program is normal and the actual program data expanded in the DRAM is When a difference is found between the two arithmetic sums while comparing the data arithmetic sums during operation control, it is determined that a garbled bit has occurred, and the program is configured to make an emergency stop.

That is, the program operation control apparatus according to the present invention is a program operation control apparatus for executing operation control of an auxiliary device while executing a program development on a DRAM, and a program of the program developed on the DRAM. Fixed arithmetic sum storage means for storing each fixed arithmetic sum of each divided unit program data obtained by dividing the data into a plurality of pieces, and each actual unit program data corresponding to each divided unit program data of the program data expanded on the DRAM. The actual arithmetic sum calculation means for calculating each arithmetic sum of the above and the calculated actual arithmetic sum and the corresponding fixed arithmetic sum read from the fixed arithmetic sum storage means corresponding thereto, The same-sex discrimination means for discriminating the opposite sex and the professional discrimination provided that this discrimination is different. Program stop control means for causing the ram stop, characterized in that the provided.

[0010]

In the present invention having the above structure, the fixed arithmetic sum storage means stores in advance the arithmetic sum of the divided unit program data obtained by dividing the program data of the program to be expanded in the DRAM into a plurality of units, that is, the fixed arithmetic sum. Here, when the operation control is performed while executing the program on the DRAM, the actual arithmetic sum calculation means sequentially calculates in real time each arithmetic sum of each actual unit program data corresponding to each divided unit program data as it progresses. To do. At the same time, the homosexual discrimination means compares the corresponding fixed arithmetic sums with the calculated actual arithmetic sums and automatically discriminates those homosexuals. If they are the same, the program is normal,
If they are different, it is detected that garbled bits have occurred. If it is determined to be different, the program stop control means stops the program and stops the accessory device. Therefore, it is possible to prevent the program from running out of control and the data from being destroyed, and to safely stop the attached device.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. This program operation control device, as shown in FIG.
The basic configuration is the POS terminal machine 10, and the fixed arithmetic sum storage means 12T and the actual arithmetic sum calculation means (11, 1)
2) The same-sex discrimination means (11, 12) and the program stop control means (11, 12) are provided to automatically detect garbled bits while executing the program on the DRAM 20 and to execute the program if the garbled bits occur. The auxiliary equipment (16, 17) is configured to make an emergency stop.

First, the terminal machine 10 will be described. Figure 1
In the above, the terminal machine comprises a CPU 11, a ROM 12 storing a basic program and fixed data, a RAM 13 temporarily storing various data, a clock circuit 14, an input / output port 15, an input device 16 and an output device 17 as auxiliary devices, and the like. Has been done.

In addition to the work area, the RAM 13 also forms a product file for storing product data (code, name, unit price) and a registration file for registering sales data. The input device 16 includes a keyboard, a scanner, a card reader / writer, and the like. Output device 17
Includes a display device, a printer, a drawer, and the like.

Here, for example, for sales registration work and the like, an external storage device (for example, HDD, FD) is provided through the writing circuit 31.
The program read from 30 is expanded on the DRAM 20 and executed by the program. That is,
In the case of sales registration work, when a product code or the like is input using the input device 16, the CPU 11 searches the product file (13) to obtain the product name, unit price, etc. and sets and registers this in the registration file (13).

Therefore, it is necessary to strictly prevent the program from running away during business and destroying various data stored in the product file (13) and the registration file (13). On the other hand, it is understood that, even if the program is once stopped and destroyed, it is relatively easy to restore a new program to the DRAM 20 and can be recovered in a short time.

Here, the fixed arithmetic sum storage means 12T is D
A memory for storing each fixed arithmetic sum (DtX) of each division unit program data obtained by dividing the program data of the program developed on the RAM 20 into a plurality of areas. As shown in FIGS. ) Is formed.

That is, in this embodiment, as shown in FIG. 2, when the total number of pages of program data expanded on the DRAM 20 is N, it is divided into a plurality of pages (1 Mbytes), The arithmetic sum Dt1 to DtN of the program data from the first address to the final address ADt1 to ADtX of each page is stored as fixed data for each page.

The actual arithmetic sum calculation means is the DRAM 2
4 is a means for calculating the arithmetic sum DaX of each actual unit program data corresponding to each division unit program data of the program data expanded on 0 (one page) during execution of the program. Is executed in ST10 to ST15.

That is, in this embodiment, the CPU 11,
An interval timer consisting of the ROM 12 and the clock circuit 14 reads 16 bytes of data every 100 ms to calculate the arithmetic sum DaX of the data, and calculates one page, that is, 1M.
It is formed to check for garbled bits for each byte. With this method, 1M every 1 hour (47 minutes)
It is possible to determine whether or not the program data on the DRAM 20 is garbled bit by byte.

In order to efficiently execute the above, the address pointers (11, 12) and the check data storage means 13
T and are provided. This check data storage means 13T
Is formed by a partial storage area of the RAM 13, and is calculated by the checking page number (Na) and the address ADaX being checked by the address pointers (11, 12) and the address ADaX as shown in FIG. The arithmetic sum DaX is updated and stored.

More specifically, the interval timer (11, 1
2, 14), an interrupt is started every 100 ms (FIG. 4), the 16-byte counter 21 shown in FIG. 1 is set (ST10 in FIG. 4). Then, DRA is performed at the address ADaX by the address pointer (11, 12).
Read the program data Dt on M20 (ST1
1).

Here, the actual arithmetic sum calculation means (11, 1)
2) works, and the read data Dt is added to the arithmetic sum DaX obtained so far to calculate the arithmetic sum (DaX) so far (ST12). At this time, the address pointer (1
The addresses 1, 2) are updated (ST13). The arithmetic sum DaX and the address ADaX are stored in the check data storage means 13T as shown in FIG. The above is continuously executed for 16 bytes (ST1
4).

Next, the same-sex determination means reads the actual arithmetic sum DaX read from the DRAM 20 and the fixed arithmetic sum DtX read from the fixed arithmetic sum storage means 12T corresponding to the actual arithmetic sum DaX. Fixed arithmetic sum D for each page
This is a means for comparing tX (DtM in the case of M page) and discriminating the same isomer of the both, which is composed of the CPU 11 and the ROM 12 and is executed in ST16. DRA if they are the same
The program data expanded on the M20 is not garbled, but if it is different, the bit garbled.

Therefore, there is a strong possibility that the program will run away if it is continued despite the bitization, and due to this, various data stored in the data areas of the RAM 13 and the DRAM 20 will be destroyed. Therefore, when it is determined that they are different (NO in ST16), CP
U11 displays an error on the display of the output device 17 (ST
17). Further, the program stop control means formed by the CPU 11 and the ROM 12 stops the program, that is, forcibly stops the devices (16, 17) (ST18).

When it is determined that they are the same (YES in ST16), the calculation arithmetic sum DaX up to that page is cleared (ST19 in FIG. 5). Furthermore, all pages (1 to N)
Ends (YES in ST20), the checked page number Na shown in FIG. 3 is cleared to zero (0) (ST2).
2). Of course, in the middle of the process, the page number (Na) is sequentially updated (ST21).

Next, the operation of this embodiment will be described. First, in the fixed arithmetic sum storage means 12T, as shown in FIG. 2, the total page number N of program data expanded on the DRAM 20 and the final addresses ADt1 to ADt of each page.
N and its logical arithmetic sum Dt1 to DtN are stored. Then, the program is expanded in the program area of the DRAM 20 from the storage device 30 of each unit via the writing circuit 31.

Using the input device 16, for example, product sales registration work is performed by a conventional method. This is performed while executing the program expanded on the DRAM 20. RAM1 for various data
3, stored in the data area on the DRAM 20.

When the interval timer (11, 12, 14) starts an interrupt every 100 ms, it becomes 1
The 6-byte counter 21 is set (ST1 of FIG. 4
0). Thus, the program data D on the DRAM 20
t is read (ST11), and the actual arithmetic sum calculation means (1
1, 12) is the arithmetic sum DaX up to the address ADaX
Is calculated (ST12). The calculated arithmetic sum DaX is
It is stored in the check data storage unit 13T shown in FIG. The updated address (ADaX) is also stored (S
T13). Continuously for 16 bytes (ST1
1-14).

When the arithmetic sum Da1 for one page is calculated (ST15), the same sex discrimination means (11, 12) stores the actual arithmetic sum Da1 and one page stored in the fixed arithmetic sum storage means 12T. The same isomer is discriminated by comparing with the arithmetic sum Dt1 of the eyes (ST16).

If they are the same (YES in ST16), D
Since the program data on the RAM 20 is normal, the arithmetic sum Da1 of the check data storage means 13T is cleared (ST19 in FIG. 5). Subsequently, the page number being checked (Na = “1”) is updated to “2” (S21), and the next interval is waited for. When all pages (N pages) are completed, they are cleared (ST22).

Here, the same sex discrimination means (11, 12)
However, if it is determined that they are different (NO in ST16), the CPU
11 displays an error on the display (17) (ST17), and the program stop control means (11, 12) stops the program to stop the equipment (16, 17) (ST1).
8).

The initial value of the check data storage means 13T is set when the status is cleared.

Therefore, according to this embodiment, the fixed arithmetic sum storage means 12T and the actual arithmetic sum calculation means (11, 12) are used.
And the program stop control means (11, 12) are provided, and the program data expanded on the DRAM 20 are sequentially checked to determine whether bit garbling has occurred or not. In this case, since the program is configured to stop, it is possible to prevent the program from running out of control and to completely prevent the data from being destroyed.

The actual arithmetic sum calculation means (11, 12)
The same sex discrimination means (11, 12) reads 16 bytes of data every 100 ms by the interval timer (11, 12, 14) to calculate the actual arithmetic sum DaX, and at the same time, one page (1 MB). Since it is formed such that the same sex is discriminated for each, the burden on the CPU 11 and the like is reduced, and it is possible to surely check any garbled bit.

[0035]

According to the present invention, the fixed arithmetic sum storage means, the actual arithmetic sum calculation means, the same sex discrimination means, and the program stop control means are provided to sequentially check the program data expanded on the DRAM. Since it is configured to determine the presence or absence of garbled bits and stop the program when they occur, runaway of the program can be prevented and data destruction due to this can be completely prevented.

[Brief description of drawings]

FIG. 1 is an overall configuration diagram showing an embodiment of the present invention.

FIG. 2 is also a diagram for explaining fixed arithmetic sum storage means.

FIG. 3 is also a diagram for explaining check data storage means.

FIG. 4 is likewise a flow chart (1) for explaining the operation.

FIG. 5 is likewise a flowchart (2) for explaining the operation.

[Explanation of symbols]

10 terminal (program operation control device) 11 CPU (actual arithmetic sum calculation means, same-sex discrimination means,
Program stop control means) 12 ROM (actual arithmetic sum calculation means, same sex discrimination means,
Program stop control means) 12T fixed arithmetic sum storage means 13 RAM 13T check data storage means 14 clock circuit 15 input / output port 16 input device 17 output device (display) 20 DRAM 21 counter 30 external storage device

Claims (1)

[Claims] 1. A program operation control device for controlling the operation of an auxiliary device while executing a program expanded on a DRAM, wherein the program data of the program expanded on said DRAM is divided into a plurality of divided unit program data. Fixed arithmetic sum storage means for storing each fixed arithmetic sum, and each arithmetic sum of each actual unit program data corresponding to each divided unit program data of the program data expanded on the DRAM is calculated during execution of the program. An actual arithmetic sum calculation means for performing the above, and an actual heterojunction determining means for comparing each actual arithmetic sum calculated and the corresponding fixed arithmetic sum read out from the fixed arithmetic sum storage means corresponding thereto to determine the same sex, A program stop control means for stopping the program on the condition that the different sex determination means determines that they are different. Program operation control apparatus characterized by the.