JPH05343530A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To control that a burn-in mode is set and released without using a terminal exclusively used for a burn-in operation. CONSTITUTION:The following are installed: a clock circuit 4 which counts a clock signal A and which generates a pulse signal D at each arbitrary time; and a burn-in mode setting circuit 5 which turns on and off a burn-in mode setting signal E used to decide the setting and releasing of a burn-in mode on the basis of a burn-in mode instruction signal C for instructing the setting of the burn-in mode from a prescribed input port terminal 3. In addition, the following is installed: a burn-in mode control circuit 6 which collates the pulse signal D output from the clocking circuit 4 with the burn-in mode setting signal E output from the burn-in mode setting circuit 5 and which turns on and off a burn-in mode control signal G used to control the setting and releasing of the burn-in mode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit having a function of setting and releasing a burn-in mode by a built-in circuit without using a dedicated terminal for setting a burn-in mode.

[0002]

2. Description of the Related Art Conventionally, setting and release of a burn-in mode of a semiconductor integrated circuit has been performed by setting one or more burn-in dedicated terminals of the semiconductor integrated circuit to an arbitrary state.

[0003]

The conventional semiconductor integrated circuit as described above has a drawback that one or more dedicated burn-in terminals are required to set and release the burn-in mode. There is a problem that it is necessary to increase the number of pads and the number of terminals of the circuit.

The object of the present invention is to solve the above problems,
An object of the present invention is to provide an economical semiconductor integrated circuit capable of controlling the setting and cancellation of the burn-in mode without using the burn-in dedicated terminal.

[0005]

A semiconductor integrated circuit according to the present invention comprises a clock circuit for counting a clock signal and generating a pulse signal at every arbitrary time, and a burn-in mode for instructing a burn-in mode setting from a predetermined input port terminal. Burn-in mode setting circuit that turns on / off the burn-in mode setting signal for determining the setting and cancellation of the burn-in mode based on the mode instruction signal, and a pulse signal output from the timing circuit and a burn-in output from the burn-in mode setting circuit And a burn-in mode control circuit for turning on / off a burn-in mode control signal for collating the mode setting signal and controlling the setting and cancellation of the burn-in mode.

[0006]

In the time counting circuit, the clock signal input from the clock input terminal of the semiconductor integrated circuit is counted, and a pulse signal is intermittently generated every time an arbitrary number of clock signals are input. When a burn-in mode instruction signal for instructing burn-in mode setting is input from a predetermined input port terminal of the semiconductor integrated circuit, the burn-in mode setting signal is turned on in the burn-in mode setting circuit. In the burn-in mode control circuit, the pulse signal from the timing circuit and the burn-in mode setting signal from the burn-in mode setting circuit are compared. If the burn-in mode setting signal is turned on when the pulse signal is output, the burn-in mode control signal is turned on to set the burn-in mode, and the burn-in mode setting signal is set when the pulse signal is output. If it is off, the burn-in mode control signal is turned off and the burn-in mode is released. Therefore, the burn-in mode is set while the burn-in mode setting signal is on when the pulse signal is output from the timing circuit.

As described above, according to the semiconductor integrated circuit of the present invention, the setting and cancellation of the burn-in mode can be controlled by inputting a signal from a predetermined input port terminal, and the burn-in dedicated terminal as in the prior art can be used. do not need.

[0008]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a burn-in circuit portion of a semiconductor integrated circuit.

In FIG. 1, among the terminals of the semiconductor integrated circuit,
Clock input terminal (1), system reset input terminal (2)
And one input port terminal (3) are shown, clock signal A from the clock input terminal (1), reset input signal B from the reset input terminal (2), and input port terminal (3). A burn-in mode instruction signal C for instructing burn-in mode setting is input to the burn-in circuit. The clock signal A is repeatedly turned on and off at a constant cycle and is also used as a system clock. When the reset input signal B is on, it enters the reset mode. Instructing signal C represents the burn-in mode setting when turned on. Port input signals are also input from the input port terminal (3).

The burn-in circuit includes a clock circuit (4), a burn-in mode setting circuit (5), and a burn-in mode control circuit.
(6) and reset circuit (7) are provided. Timing circuit
(4) is for counting the clock signal A and generating the pulse signal D which is turned on every arbitrary time. The setting circuit (5) generates a burn-in mode setting signal E for determining the setting and cancellation of the burn-in mode based on the instruction signal C. Setting signal E represents the setting of the burn-in mode when it is on. Reset circuit
(7) is for generating the reset signal F based on the clock signal A and the pulse signal D. The control circuit (6) compares the pulse signal D with the setting signal E to generate a burn-in mode control signal G for controlling the setting and cancellation of the burn-in mode. Control signal G represents setting the burn-in mode when turned on.

The reset input signal B is the first NOT circuit.
Input in (8). A first NOT circuit which is a signal (inverted reset input signal) NB obtained by inverting the reset input signal B.
The output of (8) is input to the first input terminal of the first NOR circuit (9), and the output of the first NOR circuit (9) is input to the first input terminal of the second NOR circuit (10). The output of the second NOR circuit (10) is an ACL signal, which is input to the second input terminal of the first NOR circuit (9). Reset input signal B and normal A
The CL release signal is input to the first OR circuit (11), the output of the first OR circuit (11) is input to the first input terminal of the second OR circuit (12), and the output of the second OR circuit (12) is the second NOR circuit. Circuit (1
Input to the second input terminal of 0).

The reset circuit (7) includes an AND circuit (13) and an O circuit.
It has an R circuit (14). The pulse signal D is the AND circuit (1
Input to the first input terminal of 3) and clock signal A is clock circuit
It is input to (4) and also to the second input terminal of the AND circuit (13) via the second NOT circuit (15). The reset input signal B and the output of the AND circuit (13) are the OR circuit.
Enter it in (14). The output of the OR circuit (14) is the reset signal F.
This is input to the reset terminal of the timing circuit (4) and the reset terminal of the setting circuit (5).

The inverted reset input signal NB and the instruction signal C are input to the AND circuit (16), and the output of the AND circuit (16) is input to the setting circuit (5).

The control circuit (6) comprises a flip-flop (17) and an AND circuit (18). The pulse signal D is the CK terminal (clock pulse input terminal) of the flip-flop (17)
To enter. The setting signal E is D of the flip-flop (17)
Input to the terminal (input terminal). Inverted reset input signal N
B and the output Q of the flip-flop (17) are AND circuits (18)
To enter. The output of the AND circuit (18) is the control signal G, which is input to the second input terminal of the second OR circuit (12).

FIG. 2 is a time chart showing signals of respective parts of the burn-in circuit described above. Next, an example of the operation of the burn-in circuit will be described with reference to FIG.

First, the state in which the reset input signal B is off will be described. In FIG. 2, from part a to b
The part up to the part is the part where the reset input signal B is off. In this case, if the count value of the clock signal A in the timing circuit (4) reaches a preset predetermined value, c
As in the section, the pulse signal D is turned on. The pulse signal D turns on when the clock signal A rises. While the pulse signal D is off, the first input terminal of the AND circuit (13) of the reset circuit (7) is off, so the output of the AND circuit (13) is off.
Further, since the reset input signal B is also off, the OR circuit
Both inputs of (14) are turned off, and the reset signal F
Is off. When the pulse signal D is turned on, while the clock signal A is turned on, A of the reset circuit (7)
A second NOT circuit for inputting to the second input terminal of the ND circuit (13)
Since the output of (15) is off, the output of the AND circuit (13) is off, and the reset signal F remains off. Therefore, the pulse signal D is held in the ON state. When the clock signal A is turned off while the pulse signal D is turned on, the second signal of the AND circuit (13) of the reset circuit (7)
Since the output of the second NOT circuit (15) input to the input terminal is turned on and the pulse signal D input to the first input terminal of the AND circuit (13) is turned on, the output of the AND circuit (13) Is turned on, and the reset signal F is turned on, as in part d. When the reset signal F is turned on, the clock circuit
(4) is reset and the pulse signal D is turned off. When the pulse signal D turns off, the first input terminal of the AND circuit (13) of the reset circuit (7) turns off and the reset signal F also turns off. Also, when the clock circuit (4) is reset,
The count value is cleared, counting is performed again, and the above operation is repeated. Therefore, like the c section, the e section, and the f section, the pulse signal D is turned on every fixed time for a fixed time. Further, like the d portion, the g portion, and the h portion, every time the pulse signal D is turned on, the reset signal F is also turned on for a fixed time shorter than the pulse signal D. Input port terminal
A pulsed instruction signal C is input from the outside to the section (3) like the section i and the section j. Since the reset input signal B is off, the inverted reset input signal NB input to the AND circuit (16) is on. Therefore, the output of the AND circuit (16) is turned on only while the instruction signal C is turned on, and this is input to the setting circuit (5). The setting signal E, which is the output of the setting circuit (5), turns on when the output of the AND circuit (16) changes from on to off like the k part and the l part, and turns on in the m part and the n part. Thus, when the reset signal F input to the reset terminal of the setting circuit is turned on, it turns off. Therefore, when the setting signal E is turned on at a certain time point, the setting signal E is turned on the next time the pulse signal D is turned on, and the setting signal E is turned off when the reset signal F is turned on. Become. In the flip-flop (17) of the control circuit (6), when the pulse signal D input to the CK terminal is turned on, the setting signal E input to the D terminal is output to the AND circuit (18) as the output Q. Is output. On the other hand, since the reset input signal B is off, AN
The inverted reset input signal NB input to the first input terminal of the D circuit (18) is on. Therefore, when the pulse signal D is turned on, as in the parts c and f, the setting signal E
When is turned on, the output Q input to the second input terminal of the AND circuit (18) is turned on, and the control signal G which is the output of the AND circuit (18) is turned on. In the portion c, since the control signal G has been turned on before that, the on state is maintained. If the setting signal E is turned off when the pulse signal D is turned on as in the part e, the output Q input to the second input terminal of the AND circuit (18) is output.
Is turned off, and the control signal G is turned off. As is clear from the above description, when the reset input signal B is off, the instruction signal C is on while the pulse signal D is off, and when the pulse signal D is on. As long as the setting signal E is on, the control signal G is kept on. On the contrary, if the instruction signal C is not turned on while the pulse signal D is turned off and the setting signal E is not turned on when the pulse signal D is turned on, the control signal G is turned off. Become. Therefore, by repeatedly turning on the instruction signal C, the control signal G is turned on to set the burn-in mode, and by keeping the instruction signal C in the off state, the burn-in mode is released.

When the reset input signal B is off and the normal ACL release signal is also off, the first OR circuit
The output of (11) is turned on and the first input terminal of the second OR circuit (12) is turned off. Then, when the control signal G is turned on, the output of the second OR circuit (12) is turned on and the ACL signal is turned off. On the other hand, since the inverted reset input signal NB is on, the output of the first NOR circuit (9) is also off,
The first input terminal of the second NOR circuit (10) is off. When the control signal G is turned off, the output of the second OR circuit (12) is turned off because the first input terminal of the second OR circuit (12) is turned off, and the first input terminal of the second NOR circuit (10) is turned off. Is off, the ACL signal is turned on. When the reset input signal B is off, the normal ACL
When the release signal is turned on, the output of the first OR circuit (11) is turned on, regardless of whether the control signal G is turned on or off.
The output of the R circuit (12) is turned on, which turns off the ACL signal.

Next, the state where the reset input signal B is turned on will be described. In FIG. 2, when the reset input signal B is turned on as in the part b, the inverted reset input signal NB is turned off and the AND circuit (1) of the setting circuit (6)
The first input terminal of 8) turns off. Therefore, the control signal G is held in the form rotary press state regardless of whether the pulse signal D, the setting signal E, or the like is on or off. On the other hand, when the reset input signal B is turned on, the output of the first OR circuit (11) is turned on and the output of the second OR circuit (12) is turned on, which turns off the ACL signal.

[0020]

As described above, according to the semiconductor integrated circuit of the present invention, it is possible to control the setting and cancellation of the burn-in mode without using the burn-in dedicated terminal. Therefore,
It is economical because there is no need to increase the number of pads or the number of terminals.

[Brief description of drawings]

FIG. 1 is a block diagram of a burn-in circuit portion of a semiconductor integrated circuit showing an embodiment of the present invention.

FIG. 2 is a time chart showing signals of respective parts of the circuit of FIG.

[Explanation of symbols]

 (1) Clock input terminal (3) Input port terminal (4) Clock circuit (5) Burn-in mode setting circuit (6) Burn-in mode control circuit A Clock signal C Indication signal D Pulse signal E Burn-in mode setting signal G Burn-in mode control signal

Claims (1)

[Claims] 1. A burn-in mode is set and released based on a clock circuit that counts a clock signal and generates a pulse signal at an arbitrary time, and a burn-in mode instruction signal for instructing burn-in mode setting from a predetermined input port terminal. The burn-in mode setting circuit that turns the burn-in mode setting signal on and off to determine the burn-in mode setting signal is compared with the pulse signal output from the timing circuit and the burn-in mode setting signal output from the burn-in mode setting circuit. Integrated circuit having a burn-in mode control circuit for turning on / off a burn-in mode control signal for controlling the semiconductor integrated circuit.