JPH05343418A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the number of manufacturing processes which cover the manufacturing method of NMOS-FET under LDD structure. CONSTITUTION:A side wall 16, which includes impurities, is formed on a side wall of a gate electrode 13. The impurities are diffused on a substrate 11 by thermal diffusion, thereby forming an n- layer 18, which activates and heat- treats an n<+> layer 17.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, in particular, an LDD (Lightly Doped Drein) structure NMOS-FET.
The present invention relates to a method of manufacturing (N-type MOS field effect transistor).

[0002]

2. Description of the Related Art FIG. 2 shows an LD of a conventional NMOS-FET.
It shows an example of a manufacturing method of the D structure.

This method is described in detail in IEDM 83, (1
983) IEEE (US) p. 392-395. First, as shown in FIG. 2A, a field oxide film 1 is formed on a semiconductor substrate 4 by a selective oxidation method, and a gate oxide film is formed thereon by thermal oxidation. Form 2.
Next, the gate electrode 3 (generally polysilicon) is formed by the LP-CVD (low pressure chemical vapor deposition) method and the photolithography (hereinafter abbreviated as photolithography) technique. next,
Phosphorus is ion-implanted using the gate electrode 3 as a mask to shallowly form the n ⁻ layer 5 in the entire source / drain formation region of the silicon substrate 4. After that, as shown in FIG. 2B, a sidewall 6 made of a CVD SiO ₂ film is formed on the sidewall of the gate electrode 3 by RIE (Reactive Ion Etc).
Hing) is used, and then arsenic is ion-implanted by using the sidewall 6 and the gate electrode 3 as a mask to form an n ⁺ layer 7 in a portion apart from the gate electrode 3 in the source / drain formation region. It forms deeply.

[0004]

However, the above-mentioned conventional method has the following problems.

First, in forming the n ⁻ layer 5 in FIG. 2, photolithography is performed to pattern the region in which the n ⁻ layer 5 is to be formed (by resist coating), and then to form the n ⁻ layer 5. Ion implantation is performed. After that, the resist is removed, and the side wall 6 made of the CVD-SiO ₂ film is formed.
To form. After forming the sidewalls 6, photolithography is performed again for the next n ⁺ ion implantation. After patterning of the region for forming the n ⁺ layer 7, ion implantation for forming the n ⁺ layer 7, LDD structure is obtained. As described above, the conventional method of forming the LDD is a method of performing photolithography and ion implantation twice each, which has a problem of complicating the process.

In order to eliminate the above-mentioned problem that the process is complicated, the present invention simplifies the process by forming the n ^- layer by thermal diffusion of impurities from the sidewalls to manufacture the LDD structure. The purpose is to provide a possible method.

[0007]

To this end, the present invention is directed to a CVD Si containing phosphorus in the aforementioned sidewall material.
An O ₂ film is used, and an n ⁻ layer is formed by impurity diffusion from the sidewall of the O ₂ film to simplify the process and obtain an LDD structure.

[0008]

As described above, according to the method of the present invention, the n ⁻ layer of the LDD structure is formed by thermal diffusion of the impurities contained in the sidewalls. Therefore, the process can be simplified to obtain the LDD structure. ..

[0009]

FIG. 1 is a sectional view showing an embodiment of the present invention. An embodiment of the present invention will be described below with reference to this drawing.

First, in FIG. 1 (A), 11 is a silicon single crystal semiconductor substrate (hereinafter abbreviated as substrate),
A field oxide film 12 is formed on the substrate 11 by a normal selective oxidation method (LOCOS method) using a silicon nitride film (not shown) as an oxidation resistant mask, and the active region 21 and the field region 22 are separated from each other. next,
A gate oxide film 14 is formed on the substrate 11 by a thermal oxidation method, and a polysilicon film 13 is formed on the entire surface including the gate oxide film 14. Next, as shown in FIG. 1B, the polysilicon film 13 and the gate oxide film 14 are etched by a photolithography technique using a photoresist (not shown) as a mask to form a gate electrode 13. Next, FIG.
As shown in (C), a thin oxide film 15 of about 50 Å is formed by thermal oxidation.

The thin oxide film 15 has an effect of softening damage to the substrate 11 at the time of ion implantation for forming an n ⁺ layer 17, which will be described later, and n ⁻ by diffusion of impurities from a sidewall 16 described later. The concentration of the layer 18 can be controlled by the generated film thickness.

Next, as shown in FIG. 1D, a SiO ₂ film containing phosphorus is formed on the entire surface by a CVD method, and RIE is used to form a sidewall 16 on the side wall of the gate electrode 13. Let

Next, as shown in FIG. 1E, an impurity such as arsenic is ion-implanted into the substrate 11 using the gate electrode 13 and the sidewall 16 as a mask to form an n ⁺ layer 17 serving as a source / drain. To do. Then, heat treatment (annealing) is performed to activate the ion-implanted impurities. At this time, phosphorus contained in the sidewalls 16 diffuses through the thin oxide film 15 into the substrate 11 to form the sidewalls 16. An n ⁻ layer 18 is formed below (see FIG. 1F).

In this way, the LDD-structured NMOSF is formed.
ET is obtained. Although this example shows the method of manufacturing the LDD structure of the NMOS by using the impurity containing phosphorus as the sidewall material, it is possible to manufacture the LDD structure of the PMOS by using the impurity containing boron as the sidewall material. It goes without saying that it can be applied.

[0015]

As described above in detail, according to the method of the present invention, the n ⁻ layer having the LDD structure is formed by thermal diffusion of impurities contained in the sidewalls. It becomes possible to obtain the structure. Specifically, in the prior art, photolithography and ion implantation steps were required twice to form an LDD structure, but the method of the present invention requires only one step each, which reduces the number of steps. , TAT improvement, etc. are obtained.

[Brief description of drawings]

FIG. 1 Example of the present invention

FIG. 2 Conventional example

[Explanation of symbols]

11 substrate 13 a gate electrode 15 oxide film 16 sidewall 17 n ⁺ layer 18 n ^- layer

Claims (1)

[Claims] 1. A step of: (a) forming a gate electrode as a transistor on a semiconductor substrate, and forming an oxide film on the substrate including the gate electrode; (b) adding impurities to a side wall of the gate electrode. Forming a side wall including; (c) implanting an impurity into the substrate using the gate electrode and the sidewall as a mask; (d) activating the implanted impurity;
A method of manufacturing a semiconductor device, comprising: a step of performing a heat treatment for diffusing the impurities contained in the sidewalls into the substrate by thermal diffusion; and the above steps.