JPH05337710A - Manufacture of multilayer printed circuit board - Google Patents
Manufacture of multilayer printed circuit boardInfo
- Publication number
- JPH05337710A JPH05337710A JP4141595A JP14159592A JPH05337710A JP H05337710 A JPH05337710 A JP H05337710A JP 4141595 A JP4141595 A JP 4141595A JP 14159592 A JP14159592 A JP 14159592A JP H05337710 A JPH05337710 A JP H05337710A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- pin
- circuit board
- printed circuit
- driven
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Drilling And Boring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は電気機器、電子機器、通
信機器、計算機器等に用いられる多層配線基板の製造方
法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a multilayer wiring board used in electric equipment, electronic equipment, communication equipment, computing equipment and the like.
【0002】[0002]
【従来の技術】従来の多層配線基板は、2次成形により
内層回路がばらついて収縮しているため、NCドリルマ
シン等にセットするための基準穴のピッチにもぱらつき
が発生するので、通常実施されている2穴同時のピン打
ち込み機によりピンを押し込むと、穴の周囲を破壊しな
がら押し込むことになる。この結果、本来の位置と異な
る位置にピンが立つことになり、穴開けの位置精度を低
下させていた。2. Description of the Related Art In a conventional multi-layer wiring board, the inner layer circuit is shrunk and contracted by the secondary molding, so that the pitch of the reference holes for setting in the NC drill machine etc. also fluctuates. When the pin is pushed in by the same two-hole simultaneous pin driving machine, it is pushed while destroying the periphery of the hole. As a result, the pin is set up at a position different from the original position, thus degrading the positional accuracy of drilling.
【0003】[0003]
【発明が解決しようとする課題】従来の技術で述べたよ
うに、従来の多層配線基板では穴開けの位置精度が低い
という欠点があった。本発明は従来の技術における上述
の問題点に鑑みてなされたもので、その目的とするとこ
ろは、穴開けの位置精度の良い多層配線基板の製造方法
を提供することにある。As described in the prior art, the conventional multi-layer wiring board has a drawback in that the positional accuracy of drilling is low. The present invention has been made in view of the above problems in the prior art, and an object of the present invention is to provide a method for manufacturing a multi-layer wiring board with good positional accuracy for making holes.
【0004】[0004]
【課題を解決するための手段】本発明は、回路設計時の
基準点側に先ずピンを打ち込み開穴後、バラツキ相当分
穴間寸法より小さくした逆側のピンを打ち込んでから穴
開け加工することを特徴とする多層配線基板の製造方法
のため、上記目的を達成することができたもので、以下
本発明を詳細に説明する。According to the present invention, a pin is first driven into a reference point side during circuit design to open a hole, and then a pin on the opposite side having a size smaller than the inter-hole size corresponding to the variation is driven and then drilled. The above object can be achieved by the method for manufacturing a multilayer wiring board characterized by the above. The present invention will be described in detail below.
【0005】本発明に用いる内層材用積層板、プリプレ
グ、外層材に用いられる樹脂としては、エポキシ樹脂
系、フェノール樹脂系、不飽和ポリエステル樹脂系、ビ
ニルエステル樹脂系、ポリフェニレンオキサイド樹脂
系、シリコン樹脂系、ポリフェニレンサルファイド樹脂
系、ポリエチレンテレフタレート樹脂系、ポリブチレン
テレフタレート樹脂系、ポリイミド樹脂系、ポリブタジ
エン樹脂系、フッ素樹脂系等の単独、変性物、混合物の
ように樹脂全般を用いることができ、必要に応じてタル
ク、クレー、シリカ、炭酸カルシュウム、水酸化アルミ
ニゥム等の無機質粉末充填剤や、ガラス繊維、アスベス
ト繊維、パルプ繊維、合成繊維、セラミック繊維等の繊
維質充填剤を含有させることができる。基材としては、
ガラス、アスベスト等の無機質繊維やポリエステル、ポ
リアミド、ポリアクリル、ポリビニルアルコール、ポリ
イミド、フッ素樹脂等の有機質繊維や木綿等の天然繊維
の織布、不織布、マット、紙等を用いることができる。
金属箔としては銅、アルミニュウム、真鍮、ニッケル、
鉄等の単独、合金、複合の金属箔を用いることができ
る。外層材としては片面金属箔張積層板、両面金属箔張
積層板、上記金属箔等を用いることができる。かくして
上記材料をプレス、真空プレス、ダブルベルト成形機等
で積層成形して得られる多層配線基板の回路設計時の基
準点側に先ずピンを打ち込み開穴後、バラツキ相当分穴
間寸法より小さくした逆側のピンを打ち込んでから穴開
け加工するものである。バラツキ相当分は20〜100
ミクロンをみておくことが望ましい。The resin used for the laminate for inner layer material, prepreg and outer layer material used in the present invention includes epoxy resin type, phenol resin type, unsaturated polyester resin type, vinyl ester resin type, polyphenylene oxide resin type and silicone resin. System, polyphenylene sulfide resin system, polyethylene terephthalate resin system, polybutylene terephthalate resin system, polyimide resin system, polybutadiene resin system, fluororesin system, etc. alone, modified products, and general resins such as mixtures can be used, and if necessary Accordingly, an inorganic powder filler such as talc, clay, silica, calcium carbonate or aluminum hydroxide, or a fibrous filler such as glass fiber, asbestos fiber, pulp fiber, synthetic fiber or ceramic fiber may be contained. As the base material,
Inorganic fibers such as glass and asbestos, organic fibers such as polyester, polyamide, polyacryl, polyvinyl alcohol, polyimide and fluororesin, and natural fibers such as cotton can be used as woven fabrics, non-woven fabrics, mats and papers.
The metal foil is copper, aluminum, brass, nickel,
A single, alloy, or composite metal foil of iron or the like can be used. As the outer layer material, a single-sided metal foil-clad laminate, a double-sided metal foil-clad laminate, the above metal foil or the like can be used. Thus, the pins are first punched at the reference point side in the circuit design of the multilayer wiring board obtained by laminating and molding the above materials with a press, a vacuum press, a double belt molding machine, etc., and then made smaller than the inter-hole size corresponding to the variation. A hole is drilled after the pin on the opposite side is driven. 20-100 equivalent to variation
It is desirable to look at the micron.
【0006】以下本発明を実施例に基づいて説明する。The present invention will be described below based on examples.
【0007】[0007]
【実施例】厚さ0.6mmのガラス布基材両面銅張エポ
キシ樹脂積層板の両面に回路形成して得た内層材2枚の
上下面に、厚さ0.1mmのエポキシ樹脂含浸ガラス布
プリプレグ2枚を各々介し、更に最外側に厚さ0.03
5mmの銅箔を各々配設した積層体を成形圧力40Kg
/cm2 、165℃で90分間加熱加圧成形して6層配
線基板を得、該多層配線基板の回路設計時の基準点側に
先ずピンを打ち込み開穴後、穴間寸法より50ミクロン
小さくした逆側のピンを打ち込んでから穴開け加工して
多層配線基板を得た。[Example] A glass cloth base material having a thickness of 0.6 mm and two inner layer materials obtained by forming a circuit on both sides of a double-sided copper-clad epoxy resin laminated board, and an epoxy resin-impregnated glass cloth having a thickness of 0.1 mm on the upper and lower surfaces of the inner layer material. Thickness of 0.03 on the outermost side through two prepregs
Molding pressure of 40Kg for laminates with 5mm copper foil
/ Cm 2 at 165 ° C. for 90 minutes under heat and pressure to obtain a 6-layer wiring board. First, a pin is driven into the reference point side of the multilayer wiring board when designing a circuit, and then a hole is formed, which is 50 microns smaller than the hole-to-hole dimension. Then, a pin on the opposite side was driven and then punched to obtain a multilayer wiring board.
【0008】[0008]
【比較例】逆側のピン径を、穴間寸法と同一にしてから
穴開け加工した以外は実施例と同様に処理して多層配線
基板を得た。[Comparative Example] A multilayer wiring board was obtained in the same manner as in Example, except that the diameter of the pin on the opposite side was made the same as the hole-to-hole dimension and then drilling was performed.
【0009】実施例及び比較例の多層配線基板の基準ガ
イド付近のパターンと穴の最大ズレ量をミクロンで示し
た結果は表1のようである。Table 1 shows the results of the maximum deviation between the pattern and the hole in the vicinity of the reference guide of the multilayer wiring boards of Examples and Comparative Examples in microns.
【0010】[0010]
【表1】 [Table 1]
【0011】[0011]
【発明の効果】本発明は上述した如く構成されている。
特許請求の範囲に記載した構成を有する多層配線基板の
製造方法においては、位置精度が向上する効果がある。The present invention is constructed as described above.
In the method for manufacturing a multilayer wiring board having the structure described in the claims, there is an effect that the positional accuracy is improved.
Claims (1)
込み開穴後、バラツキ相当分穴間寸法より小さくした逆
側のピンを打ち込んでから穴開け加工することを特徴と
する多層配線基板の製造方法。1. A multilayer wiring board characterized in that after a pin is first driven into a reference point side in circuit design and a hole is formed, a pin on the opposite side having a size smaller than the inter-hole size corresponding to the variation is driven and then a hole is formed. Manufacturing method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4141595A JPH05337710A (en) | 1992-06-02 | 1992-06-02 | Manufacture of multilayer printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4141595A JPH05337710A (en) | 1992-06-02 | 1992-06-02 | Manufacture of multilayer printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05337710A true JPH05337710A (en) | 1993-12-21 |
Family
ID=15295666
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4141595A Pending JPH05337710A (en) | 1992-06-02 | 1992-06-02 | Manufacture of multilayer printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05337710A (en) |
-
1992
- 1992-06-02 JP JP4141595A patent/JPH05337710A/en active Pending
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