JPH0533521B2 - - Google Patents
Info
- Publication number
- JPH0533521B2 JPH0533521B2 JP61036627A JP3662786A JPH0533521B2 JP H0533521 B2 JPH0533521 B2 JP H0533521B2 JP 61036627 A JP61036627 A JP 61036627A JP 3662786 A JP3662786 A JP 3662786A JP H0533521 B2 JPH0533521 B2 JP H0533521B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- resistive
- shaped insulating
- chip
- resistive thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000010409 thin film Substances 0.000 claims description 58
- 239000000758 substrate Substances 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 19
- 239000000919 ceramic Substances 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 238000007733 ion plating Methods 0.000 claims description 8
- 238000004544 sputter deposition Methods 0.000 claims description 8
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 229910018487 Ni—Cr Inorganic materials 0.000 claims description 6
- 238000007738 vacuum evaporation Methods 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 238000005520 cutting process Methods 0.000 claims description 4
- 238000001771 vacuum deposition Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 9
- 239000011651 chromium Substances 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 4
- 238000005476 soldering Methods 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、プリント基板にチツプ状電子部品と
して装着するのに適したリード線の無いチツプ抵
抗器の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a chip resistor without lead wires suitable for mounting as a chip-shaped electronic component on a printed circuit board.
（従来の技術）
従来、チツプ抵抗器としては、チツプ状絶縁板
上にスクリーン印刷法で抵抗膜を設け、端部電極
をAg−Pdの塗布、焼き付けで設けた厚膜系のも
のが一般的であつた。(Conventional technology) Conventionally, chip resistors have generally been thick-film type, in which a resistive film is formed on a chip-shaped insulating plate by screen printing, and end electrodes are formed by coating and baking Ag-Pd. It was hot.
（発明が解決しようとする問題点）
ところで、厚膜系のチツプ抵抗器は、抵抗ペー
ストを印刷、焼き付けるため抵抗膜の抵抗精度、
温度特性や高周波特性の信頼性に不満足な点があ
る。(Problems to be Solved by the Invention) By the way, in thick-film chip resistors, the resistance accuracy of the resistive film and the
There are some unsatisfactory points in the reliability of temperature characteristics and high frequency characteristics.
この点を考慮して、チツプ状絶縁板に、真空蒸
着、スパツタ、イオンプレーテイング等の薄膜技
術で抵抗薄膜を形成することが本出願人により検
討されているが、この場合には端部電極となる部
分の剥離強度やはんだ耐熱性が問題となる。 In consideration of this point, the applicant is considering forming a resistive thin film on a chip-shaped insulating plate using thin film techniques such as vacuum evaporation, sputtering, and ion plating. The peel strength and solder heat resistance of the parts that become the problem become problems.
（問題点を解決するための手段）
本発明は、上記の点に鑑み、薄膜技術で抵抗薄
膜を形成して、抵抗精度、温度特性や高周波特性
を向上させるとともに、チツプ状絶縁板の端部を
コ字状に囲むように抵抗薄膜を当該チツプ状絶縁
板の裏面の一部にまで延長して、端部電極となる
部分の付着強度及びはんだ耐熱性を増大させ、信
頼性の高いチツプ抵抗器の製造方法を提供しよう
とするものである。(Means for Solving the Problems) In view of the above points, the present invention forms a resistive thin film using thin film technology to improve resistance accuracy, temperature characteristics, and high frequency characteristics, and also improves resistance accuracy, temperature characteristics, and high frequency characteristics. A resistive thin film is extended to a part of the back surface of the chip-shaped insulating plate so as to surround it in a U-shape, increasing the adhesion strength and soldering heat resistance of the part that will become the end electrode, resulting in a highly reliable chip resistor. The purpose is to provide a method for manufacturing vessels.
本発明は、上面と両端面との角部に丸みを持た
せた絶縁セラミツク基板の前記上面、両端面及び
下面の一部に、Crの含有割合が30重量％以上で
あるNi−Cr系抵抗合金の真空蒸着、スパツタ、
イオンプレーテイング等の薄膜技術で連続する抵
抗薄膜を形成した後、前記絶縁セラミツク基板の
両端面及びその近傍の前記抵抗薄膜上に銅又は銅
合金の真空蒸着、スパツタ、イオンプレーテイン
グ等の薄膜技術で電極薄膜を形成し、その後前記
絶縁セラミツク基板を個々のチツプ状絶縁板に切
断、分離した手段により上記従来技術の問題点を
解決している。 The present invention provides a Ni-Cr based resistor having a Cr content of 30% by weight or more on a part of the upper surface, both end surfaces and the lower surface of an insulating ceramic substrate in which the corners of the upper surface and both end surfaces are rounded. Vacuum deposition of alloys, sputtering,
After forming a continuous resistive thin film using a thin film technique such as ion plating, a thin film technique such as vacuum evaporation, sputtering, or ion plating of copper or copper alloy is applied to the resistive thin film on both end faces of the insulating ceramic substrate and in the vicinity thereof. The above-mentioned problems of the prior art are solved by forming an electrode thin film and then cutting and separating the insulating ceramic substrate into individual chip-shaped insulating plates.
（作 用）
本発明のチツプ抵抗器の製造方法は、抵抗体と
なる抵抗薄膜をCrの含有割合が30重量％以上で
あるNi−Cr系抵抗合金の真空蒸着、スパツタ、
イオンプレーテイング等の薄膜技術により作成し
ており、厚膜技術による場合の抵抗ペーストのよ
うな不純物を含まず、マイクロ波回路、Ａ／Ｄ変
換回路等の抵抗素子の抵抗精度、温度特性や高周
波特性が特に要求される分野での要望に応えるこ
とができる。また、Crの含有割合が30重量％以
上であるNi−Cr系抵抗合金は、アルミナ等の絶
縁セラミツク基板に対する付着力が大きいので、
抵抗薄膜が基板裏側にまで回り込んで付着してい
ることと相俟つて、抵抗薄膜の基板付着性を良好
に維持できる。また、抵抗薄膜を基板裏面の一部
にまで延長することにより、端部電極となる部分
の付着強度及びはんだ耐熱性を充分満足させる強
さとすることができる。さらに、上面と両端面と
の角部に丸みを持たせた絶縁セラミツク基板を用
いることも薄膜形成工程の信頼性を向上させる上
で有効である。(Function) The method for manufacturing a chip resistor of the present invention includes forming a resistive thin film as a resistor by vacuum evaporation, sputtering,
It is created using thin film technology such as ion plating, and does not contain impurities like resistor paste that is produced using thick film technology, and is highly effective for resistance accuracy, temperature characteristics, and high frequency of resistance elements such as microwave circuits and A/D conversion circuits. It can meet demands in fields where special characteristics are required. In addition, Ni-Cr resistance alloys with a Cr content of 30% by weight or more have strong adhesion to insulating ceramic substrates such as alumina, so
Coupled with the fact that the resistive thin film wraps around and adheres to the back side of the substrate, good adhesion of the resistive thin film to the substrate can be maintained. Further, by extending the resistive thin film to a part of the back surface of the substrate, it is possible to obtain a strength that satisfies the adhesion strength and soldering heat resistance of the portion that will become the end electrode. Furthermore, it is also effective to use an insulating ceramic substrate whose top surface and both end surfaces have rounded corners in order to improve the reliability of the thin film forming process.
（実施例）
以下、本発明に係るチツプ抵抗器の製造方法の
実施例をその製造工程順に図面に従つて説明す
る。(Example) Hereinafter, an example of the method for manufacturing a chip resistor according to the present invention will be described in the order of manufacturing steps with reference to the drawings.
まず、第２図のように、１枚のアルミナ等の幅
広絶縁セラミツク基板を特定の形状のブレード１
で多数の棒状の絶縁基板２に切断、分離する。こ
の場合、第３図の棒状絶縁基板２の上面Ｕと両端
面Ｓとの角部は、ブレード１の先端形状により自
動的に円く形成される。また、押し出し成型によ
つても同様な棒状絶縁基板（又は４つの角部の総
てが丸みを帯びた棒状絶縁基板）２を得ることが
できる。前記角部を円くすることは、後述のエツ
チング工程においてレジストを塗布する際に、鋭
利な角部でレジストが切れてしまわないようにす
るためであり、またプリント基板実装時にはんだ
収縮の応力集中を緩和させる働きもする。 First, as shown in Figure 2, a wide insulating ceramic substrate made of alumina or the like is placed on a blade of a specific shape.
The substrate is cut and separated into a large number of rod-shaped insulating substrates 2. In this case, the corners between the upper surface U and both end surfaces S of the rod-shaped insulating substrate 2 in FIG. A similar rod-shaped insulating substrate (or a rod-shaped insulating substrate with all four corners rounded) 2 can also be obtained by extrusion molding. The purpose of rounding the corners is to prevent sharp corners from cutting the resist when applying the resist in the etching process described later, and also to prevent stress concentration due to solder contraction when mounting a printed circuit board. It also works to alleviate
次に、第４図のように、棒状の絶縁基板２の上
面Ｕを下にし、下面Ｄにマスク３を配置した状態
で、Ni−Cr系合金をるつぼＬから蒸発させる等
して、真空蒸着、スパツタ、イオンプレーテイン
グ等の薄膜技術で抵抗金属や抵抗合金からなる抵
抗薄膜４を成膜する。この際、マスク３の位置す
る部分以外に抵抗薄膜４が形成されるから、第５
図のように棒状絶縁基板２の上面Ｕ、両端面Ｓ及
び下面Ｄの一部にまで連続する抵抗薄膜４が形成
される。すなわち、絶縁基板２の端部をコ字状に
囲むように抵抗薄膜４は絶縁基板２の裏面の一部
にまで延長して付着する。また、抵抗薄膜４の絶
縁基板２への付着力は、抵抗薄膜４の組成にも関
係があり、Ni−Cr系合金の場合、Cr（クロム）の
含有割合が30重量％以上であることが好ましい。 Next, as shown in FIG. 4, with the upper surface U of the rod-shaped insulating substrate 2 facing down and the mask 3 placed on the lower surface D, the Ni-Cr alloy is evaporated from the crucible L to form a vacuum evaporation layer. A resistive thin film 4 made of a resistive metal or a resistive alloy is formed using a thin film technique such as , sputtering or ion plating. At this time, since the resistive thin film 4 is formed in areas other than the portion where the mask 3 is located, the fifth
As shown in the figure, a continuous resistive thin film 4 is formed on the upper surface U, both end surfaces S, and part of the lower surface D of the rod-shaped insulating substrate 2. That is, the resistive thin film 4 is attached to extend to a part of the back surface of the insulating substrate 2 so as to surround the end of the insulating substrate 2 in a U-shape. In addition, the adhesion of the resistive thin film 4 to the insulating substrate 2 is also related to the composition of the resistive thin film 4, and in the case of a Ni-Cr alloy, the content of Cr (chromium) is preferably 30% by weight or more. preferable.
それから、薄膜技術で同様に第６図のように
銅、銅合金の電極薄膜５を前記抵抗薄膜４上に形
成する。 Then, as shown in FIG. 6, an electrode thin film 5 of copper or copper alloy is formed on the resistive thin film 4 using thin film technology.
さらに、エツチング工程で銅、銅合金の電極薄
膜５の不要部分を除去して第７図のように電極薄
膜５を棒状絶縁基板２の両端面及びその近傍の前
記抵抗薄膜上に残す。 Further, in an etching step, unnecessary portions of the electrode thin film 5 of copper or copper alloy are removed, leaving the electrode thin film 5 on both end surfaces of the rod-shaped insulating substrate 2 and the resistive thin film in the vicinity thereof, as shown in FIG.
その次エツチング工程で抵抗薄膜４の方もエツ
チングして所定の抵抗値のパターンとして第８図
のように所定のパターンの抵抗薄膜４を多数設け
た棒状の絶縁基板２を得る。 In the next etching step, the resistive thin film 4 is also etched to obtain a bar-shaped insulating substrate 2 having a predetermined pattern of resistive thin films 4 as shown in FIG.
さらに、第８図の１点鎖線Ｘの通りに棒状の絶
縁基板２を個々のチツプ状絶縁板に切断、分離
し、第１図のごとくチツプ状絶縁板２Ａの上面、
両端面及び下面の一部に薄膜技術による連続する
抵抗薄膜４を有し、チツプ状絶縁板２Ａの両端面
及びその近傍の前記抵抗薄膜上に薄膜技術による
電極薄膜５を有してなるチツプ抵抗器が得られ
る。通常、トリミング後、抵抗薄膜４の保護のた
めに、樹脂又はガラス被膜６をさらに設ける。 Furthermore, the rod-shaped insulating substrate 2 is cut and separated into individual chip-shaped insulating plates along the dashed line X in FIG. 8, and the upper surface of the chip-shaped insulating plate 2A is
A chip resistor having a continuous resistive thin film 4 made by thin film technology on both end faces and a part of the lower face, and an electrode thin film 5 made by thin film technology on both end faces of the chip-shaped insulating plate 2A and the resistive thin film in the vicinity thereof. A vessel is obtained. Usually, after trimming, a resin or glass coating 6 is further provided to protect the resistive thin film 4.
（発明の効果）
以上説明したように、本発明のチツプ抵抗器の
製造方法によれば、チツプ状絶縁板の上面、両端
面及び下面の一部に薄膜技術により連続する抵抗
薄膜を形成し、前記チツプ状絶縁板の両端面及び
その近傍の前記抵抗薄膜上に薄膜技術による電極
薄膜を形成したので、以下のような効果を得るこ
とができる。(Effects of the Invention) As explained above, according to the method for manufacturing a chip resistor of the present invention, a continuous resistive thin film is formed on the upper surface, both end surfaces, and part of the lower surface of a chip-shaped insulating plate by thin film technology, Since electrode thin films are formed by thin film technology on both end faces of the chip-shaped insulating plate and on the resistive thin film in the vicinity thereof, the following effects can be obtained.
(1) 抵抗薄膜は、Crの含有割合が30重量％以上
であるNi−Cr系抵抗合金の真空蒸着、スパツ
タ、イオンプレーテイング等による薄膜技術で
成膜されるため、絶縁セラミツク基板に対する
付着性が良好で、高精度の抵抗値が得られ、ま
た温度特性、高周波特性も良好である。従つ
て、マイクロ波通信機器、計測機器、ビデオ機
器、OA機器等の回路素子として好適に利用で
きる。(1) Since the resistive thin film is formed using thin film techniques such as vacuum evaporation, sputtering, and ion plating of a Ni-Cr-based resistive alloy with a Cr content of 30% by weight or more, it has poor adhesion to the insulating ceramic substrate. It has good resistance, high precision resistance values, and good temperature characteristics and high frequency characteristics. Therefore, it can be suitably used as a circuit element for microwave communication equipment, measuring equipment, video equipment, OA equipment, etc.
(2) 抵抗薄膜がチツプ状絶縁板の裏面にも回り込
んで付着しているので、付着力が大きく、チツ
プ抵抗器端部の端部電極となる部分の剥離強度
やはんだ耐熱性を大きくできる。また、端部電
極となる部分も金属薄膜で形成するので、外形
寸法の精度を良くすることができ、自動装着の
場合に有利である。(2) Since the resistive thin film wraps around and adheres to the back side of the chip-shaped insulating plate, the adhesion is strong and the peel strength and soldering heat resistance of the end electrode of the chip resistor can be increased. . In addition, since the portion that becomes the end electrode is also formed of a metal thin film, the accuracy of the external dimensions can be improved, which is advantageous in the case of automatic mounting.
また、予め上面と両端面との角部に丸みを持
たせた絶縁セラミツク基板を用いたことで、薄
膜形成工程の信頼性を向上させ得る。 Furthermore, by using an insulating ceramic substrate in which the corners of the top surface and both end surfaces are rounded in advance, the reliability of the thin film forming process can be improved.
(3) 量産性に優れた製造工程であり、低コストで
ある。(3) It is a manufacturing process that is suitable for mass production and is low cost.
第１図は本発明に係るチツプ抵抗器の製造方法
の実施例によつて得られたチツプ抵抗器を示す正
面図、第２図は実施例において棒状の絶縁基板を
製造する工程を示す断面図、第３図は棒状の絶縁
基板の斜視図、第４図は棒状の絶縁基板に抵抗薄
膜を形成する工程の説明図、第５図は抵抗薄膜形
成後の正面図、第６図は電極薄膜形成後の正面
図、第７図は電極薄膜をエツチングで除去した後
の正面図、第８図は棒状の絶縁基板を切断分離す
る工程を示す斜視図である。
１…ブレード、２…棒状の絶縁基板、２Ａ…チ
ツプ状絶縁板、３…マスク、４…抵抗薄膜、５…
電極薄膜。
FIG. 1 is a front view showing a chip resistor obtained by an example of the method for manufacturing a chip resistor according to the present invention, and FIG. 2 is a sectional view showing the process of manufacturing a rod-shaped insulating substrate in the example. , Fig. 3 is a perspective view of a rod-shaped insulating substrate, Fig. 4 is an explanatory diagram of the process of forming a resistive thin film on a rod-shaped insulating substrate, Fig. 5 is a front view after forming the resistive thin film, and Fig. 6 is an electrode thin film. FIG. 7 is a front view after formation, FIG. 7 is a front view after the electrode thin film has been removed by etching, and FIG. 8 is a perspective view showing the step of cutting and separating the rod-shaped insulating substrate. DESCRIPTION OF SYMBOLS 1... Blade, 2... Rod-shaped insulating substrate, 2A... Chip-shaped insulating plate, 3... Mask, 4... Resistive thin film, 5...
Electrode thin film.
Claims (1)
絶縁セラミツク基板の前記上面Ｕ、両端面Ｓ及び
下面の一部に、Crの含有割合が30重量％以上で
あるNi−Cr系抵抗合金の真空蒸着、スパツタ、
イオンプレーテイング等の薄膜技術で連続する抵
抗薄膜を形成した後、前記絶縁セラミツク基板の
両端面及びその近傍の前記抵抗薄膜上に銅又は銅
合金の真空蒸着、スパツタ、イオンプレーテイン
グ等の薄膜技術で電極薄膜を形成し、その後前記
絶縁セラミツク基板を個々のチツプ状絶縁板に切
断、分離したことを特徴とするチツプ抵抗器の製
造方法。1 Ni-Cr-based material containing 30% by weight or more of Cr on a part of the upper surface U, both end surfaces S, and the lower surface of an insulating ceramic substrate in which the corners of the upper surface U and both end surfaces S are rounded. Vacuum deposition of resistance alloys, sputtering,
After forming a continuous resistive thin film using a thin film technique such as ion plating, a thin film technique such as vacuum evaporation, sputtering, or ion plating of copper or copper alloy is applied to the resistive thin film on both end faces of the insulating ceramic substrate and in the vicinity thereof. 1. A method for manufacturing a chip resistor, comprising: forming an electrode thin film, and then cutting and separating the insulating ceramic substrate into individual chip-shaped insulating plates.
Priority Applications (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61036627A JPS62195101A (en) | 1986-02-21 | 1986-02-21 | Chip resistor |
| US07/015,282 US4792781A (en) | 1986-02-21 | 1987-02-17 | Chip-type resistor |
| DE3705279A DE3705279C2 (en) | 1986-02-21 | 1987-02-19 | Process for manufacturing resistors in chip form |
| KR1019870001452A KR910000969B1 (en) | 1986-02-21 | 1987-02-20 | Chip-type resistor |
| CA000530229A CA1272769A (en) | 1986-02-21 | 1987-02-20 | Chip-type resistor |
| FR878702279A FR2595000B1 (en) | 1986-02-21 | 1987-02-20 | CHIP TYPE RESISTANCE AND MANUFACTURING METHOD THEREOF |
| GB08704141A GB2187598B (en) | 1986-02-21 | 1987-02-23 | Chip-type resistor |
| SG926/91A SG92691G (en) | 1986-02-21 | 1991-11-02 | Chip-type resistor |
| HK1064/91A HK106491A (en) | 1986-02-21 | 1991-12-23 | Chip-type resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61036627A JPS62195101A (en) | 1986-02-21 | 1986-02-21 | Chip resistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62195101A JPS62195101A (en) | 1987-08-27 |
| JPH0533521B2 true JPH0533521B2 (en) | 1993-05-19 |
Family
ID=12475060
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61036627A Granted JPS62195101A (en) | 1986-02-21 | 1986-02-21 | Chip resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62195101A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62202504A (en) * | 1986-03-03 | 1987-09-07 | ティーディーケイ株式会社 | Manufacture of chip resistor |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59143303A (en) * | 1983-02-03 | 1984-08-16 | 株式会社村田製作所 | Method of producing chip-shaped electronic part |
-
1986
- 1986-02-21 JP JP61036627A patent/JPS62195101A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59143303A (en) * | 1983-02-03 | 1984-08-16 | 株式会社村田製作所 | Method of producing chip-shaped electronic part |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62195101A (en) | 1987-08-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |