JPS63172401A - Chip resistor, chip resistor assembly and manufacture of chip resistor - Google Patents
Chip resistor, chip resistor assembly and manufacture of chip resistorInfo
- Publication number
- JPS63172401A JPS63172401A JP62004473A JP447387A JPS63172401A JP S63172401 A JPS63172401 A JP S63172401A JP 62004473 A JP62004473 A JP 62004473A JP 447387 A JP447387 A JP 447387A JP S63172401 A JPS63172401 A JP S63172401A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- resistor
- shaped
- chip resistor
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000010408 film Substances 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 24
- 239000010409 thin film Substances 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 19
- 238000005516 engineering process Methods 0.000 claims description 16
- 238000000034 method Methods 0.000 description 21
- 230000001681 protective effect Effects 0.000 description 7
- 238000007747 plating Methods 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 4
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 239000002585 base Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000010410 layer Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000002253 acid Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 2
- 238000010924 continuous production Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 229910001120 nichrome Inorganic materials 0.000 description 2
- 238000012856 packing Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 229910017727 AgNi Inorganic materials 0.000 description 1
- -1 Pb--8n Substances 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
Landscapes
- Details Of Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、プリント基板にチップ状電子部品として装着
するのに適したリードの無いチップ抵抗器、その集合体
及びチップ抵抗器の製造方法に関する。Detailed Description of the Invention (Industrial Application Field) The present invention relates to a leadless chip resistor suitable for mounting as a chip-shaped electronic component on a printed circuit board, an assembly thereof, and a method for manufacturing the chip resistor. .
（従来の技術）
従来、チップ抵抗器としては、チップ状絶縁板上にスク
リーン印刷法で抵抗膜を設け、さらに端部電極をＡ ｇ
−ｐ ｄの塗布、焼き付け、その後Ｎｉ、Ｐ ｂ−８ｎ
（又はＳｎ）メッキ等を行う厚膜・湿式（端部電極に関
してはメッキ）法によるものが一般的である。ＩＡた、
＊要者側への供給方式は、マガジン詰め又はテーピング
となっている。(Prior art) Conventionally, as a chip resistor, a resistive film is provided on a chip-shaped insulating plate by a screen printing method, and further end electrodes are attached to the A g
-p d coating, baking, then Ni, P b-8n
(or Sn) plating, etc. A thick film wet method (plating for end electrodes) is generally used. IA,
*The supply method to the personnel is magazine packing or taping.
（発明が解決しようとする問題点）
ところで、従来の厚膜系のチップ抵抗器は、一般に１枚
基板上で抵抗膜を印刷、焼き付は後、端部電極の形成の
ために１枚基板を棒状に分割し、 ７Ａｇ−Ｐｄの塗
布、焼き付けを実施し、その後棒状の分割基板をチップ
状に分割してＮｉ％Ｐ ｂ−８ｎ（又はＳｎ）等のメッ
キを施す。(Problems to be Solved by the Invention) Conventional thick-film chip resistors generally print a resistive film on a single substrate, and then print the resistive film on a single substrate to form end electrodes. is divided into rod shapes, coated with 7Ag-Pd and baked, and then the rod-shaped divided substrates are divided into chips and plated with Ni%Pb-8n (or Sn) or the like.
この場合、端部電極形成時のＡ ｇ−ｐ ｄの塗布精度
の問題で、製品形状の寸法精度が悪化し、Ａｇ−Ｐｄ焼
成によって前工程で焼か付けた抵抗膜の抵抗値がシフト
する。また、チップ状態で酸、アルカリ等を含むメッキ
液へ浸漬するため、製品としての信頼性及びメッキ時に
おけるプロセス制御が問題となる。さらに、生産性を考
慮した場合、１枚基板を棒状に分割したり、棒状の分割
基板をチップ状に分割したりする作業が必要で、連続作
業におけるロフト管理、進捗管理等が複雑化する。In this case, the dimensional accuracy of the product shape deteriorates due to the accuracy of application of Ag-pd during the formation of the end electrodes, and the resistance value of the resistive film baked in the previous process shifts due to Ag-Pd baking. Furthermore, since the chip is immersed in a plating solution containing acid, alkali, etc., reliability as a product and process control during plating become a problem. Furthermore, when considering productivity, it is necessary to divide a single board into rod shapes, or to divide a rod-shaped divided board into chips, which complicates loft management, progress management, etc. in continuous work.
（問題点を解決するための手段）
本発明は、上記の点に鑑み、チップ状絶縁板の端部を略
コ字状に囲むように薄膜技術で端部電極を形成する構造
として、従来のＡｇ−Ｐｄの塗布、焼き付け、その後の
メッキによる端部電極の形成に起因する製品形状の寸法
精度の低下、信頼性の低下の問題を除去し、さらに製造
工程において穴明さ絶縁基板を使用した場合において穴
明す絶縁基板の状態で端部電極の形成を可能として製造
工程の簡略化を図ったチップ抵抗器、その集合体及びチ
ップ抵抗器の製造方法を提供しようとするものである。(Means for Solving the Problems) In view of the above points, the present invention provides a structure in which end electrodes are formed using thin film technology so as to surround the ends of a chip-shaped insulating plate in a substantially U-shape, compared to the conventional method. Eliminates the problems of reduced dimensional accuracy and reliability of the product shape caused by the formation of end electrodes by applying Ag-Pd, baking, and subsequent plating, and also uses a perforated insulating substrate in the manufacturing process. The object of the present invention is to provide a chip resistor, an assembly thereof, and a method for manufacturing the chip resistor, which can simplify the manufacturing process by making it possible to form end electrodes in an insulating substrate with a hole punched therein.
本発明に係るチップ抵抗器は、チップ状絶縁板の一面に
厚膜技術により抵抗厚膜を形成し、前記チップ状絶縁板
の端部を略コ字状に囲むように前記抵抗厚膜に接続する
薄膜技術による金属１ｉ！膜を形成し、抵抗値のシフト
しない低温プロセスを採用可能としたことにより上記従
来の問題点を解消している。In the chip resistor according to the present invention, a thick resistive film is formed on one surface of a chip-shaped insulating plate by thick-film technology, and connected to the thick resistive film so as to surround an end of the chip-shaped insulating plate in a substantially U-shape. Metal 1i using thin film technology! The above-mentioned conventional problems have been solved by forming a film and making it possible to employ a low-temperature process that does not shift the resistance value.
また、本発明のチップ抵抗器集合体は、チップ状絶縁板
の一面に厚膜技術により抵抗厚膜を形成し、前記チップ
状絶縁板の端部を略コ字状に囲むように前記抵抗厚膜に
接続する薄膜技術による金属薄膜を形成してなるチップ
抵抗器を、ベース基板上に所定位置関係で配列したもの
で、各チップ抵抗器の位置精度を保った状態で需要者に
供給することにより、需要者はチップ抵抗器集合体より
直接的に個々のチップ抵抗器を取り出してプリント基板
等に実装することができる。これにより、従来のマガジ
ン詰め又はテーピングを省略できる。Further, in the chip resistor assembly of the present invention, a resistive thick film is formed on one surface of a chip-shaped insulating plate by thick film technology, and the resistive thick film is formed so as to surround an end of the chip-shaped insulating plate in a substantially U-shape. Chip resistors made by forming a thin metal film connected to a film using thin film technology are arranged in a predetermined positional relationship on a base substrate, and are supplied to customers while maintaining the positional accuracy of each chip resistor. This allows the consumer to directly take out individual chip resistors from the chip resistor assembly and mount them on a printed circuit board or the like. Thereby, conventional magazine packing or taping can be omitted.
さらに、本発明のチップ抵抗器の製造方法においては、
複数の棒状部が一体に形成された穴明き絶縁基板の各棒
状部の一面に厚膜技術により抵抗体を形成し、薄膜技術
により前記棒状部の端部を略コ字状に囲むように金属薄
膜を形成した後、前記棒状部を複数個に切断分離して、
チップ抵抗器を得ることができる。Furthermore, in the method for manufacturing a chip resistor of the present invention,
A resistor is formed using thick film technology on one surface of each rod-shaped part of a perforated insulating substrate in which a plurality of rod-shaped parts are integrally formed, and a resistor is formed using thin film technology so as to surround the ends of the rod-shaped parts in a substantially U-shape. After forming the metal thin film, the rod-shaped portion is cut and separated into a plurality of pieces,
Chip resistors can be obtained.
（作用）
本発明においては、抵抗体をスクリーン印刷等の厚膜技
術により形成するが、従来の１枚基板を棒状に分割して
からＡｇ−Ｐｄを塗布、焼き付け、チップ状に分割後に
メッキして端部電極を形成する厚膜・湿式製造法に対し
て、スパッタ、イオンブレーティング、Ｐ−ＣＶＤ等の
薄膜技術を駆使して、穴明き絶縁基板状態で前記抵抗体
上の一部を含む基板端部を略コ字状に囲むように金属ｒ
ｉｍを当該穴明き絶縁基板の裏面一部にまで延長して端
部電極を乾式で形成できる。これにより、従来製法によ
るチップ抵抗器に対して、製品形状の寸法精度、信頼性
、作業効率、連続プロセス、制御の向上を図ることがで
きる。さらに、スパッタ、イオンブレーティング、Ｐ−
ＣＶＤ等の抵抗値がシフトしない低温プロセスを導入す
ることで、従来のＡｇ−Ｐｄ焼き付け（８５０℃高温プ
ロセス）による抵抗膜の抵抗値シフトが解消できる。(Function) In the present invention, the resistor is formed by thick film technology such as screen printing, but in contrast to the conventional method of dividing a single substrate into rod shapes, applying Ag-Pd, baking, and plating after dividing into chip shapes. In contrast to the thick film/wet manufacturing method in which end electrodes are formed using thin films, thin film technologies such as sputtering, ion blating, and P-CVD are used to form part of the resistor on a perforated insulating substrate. A metal r is placed so as to surround the edge of the substrate including the
By extending im to a part of the back surface of the perforated insulating substrate, an end electrode can be formed by a dry method. As a result, it is possible to improve the dimensional accuracy, reliability, work efficiency, continuous process, and control of the product shape compared to chip resistors manufactured using conventional methods. Furthermore, sputtering, ion blating, P-
By introducing a low-temperature process such as CVD in which the resistance value does not shift, it is possible to eliminate the resistance value shift of the resistive film caused by conventional Ag-Pd baking (850° C. high-temperature process).
さらに、端部電極の乾式形成後、ベース基板に貼り付け
、前記穴明き絶縁基板の棒状部分を複数個に切断分離し
てチップ状となし、各々の製品位置精度を保った状態で
チップ抵抗器集会体として需要者に供給することにより
、従来のマガジン、テーピング等の製品供給方式とは異
なる新しい面実装への供給手段を提供で終る。Furthermore, after the end electrodes are dry-formed, they are pasted on a base substrate, and the rod-shaped portion of the perforated insulating substrate is cut and separated into multiple pieces to form chips. By supplying the product to customers as an assembly, we can provide a new surface mounting supply method that is different from conventional product supply methods such as magazines and taping.
（実施例）
以下、本発明に係るチップ抵抗器、その集合体及びチッ
プ抵抗器の製造方法の実施例を図面に従って説明する。(Embodiments) Hereinafter, embodiments of a chip resistor, an assembly thereof, and a method for manufacturing a chip resistor according to the present invention will be described with reference to the drawings.
まず、完成状態のチップ抵抗器を第１図で説明する。ア
ルミナ等のチップ状絶縁板１の上面にはスクリーン印刷
等の厚膜技術により例えばＲｕ Ｏ２系の抵抗体２が形
成される。抵抗体２に接続する端部電極３はチップ状絶
縁板１の両方の端部を略コ字状に囲むようにスパッタ、
イオンブレーティング、Ｐ−ＣＶＤ等の薄膜技術による
金属薄膜４Ａ、４Ｂ、４Ｃを３層重ねて形成したもので
ある。First, a completed chip resistor will be explained with reference to FIG. For example, a RuO2-based resistor 2 is formed on the upper surface of a chip-shaped insulating plate 1 made of alumina or the like by a thick film technique such as screen printing. The end electrode 3 connected to the resistor 2 is sputtered so as to surround both ends of the chip-shaped insulating plate 1 in a substantially U-shape.
It is formed by stacking three metal thin films 4A, 4B, and 4C using thin film techniques such as ion blating and P-CVD.
ここで、下層の金属薄Ｊｌ１４ＡＪｔＣｒ、次の金属薄
ｍ４Ｂｌｊ：Ｎｉで、表層の金Ｘ”ｆＷｌｉ４ ＣハＡ
ｇｔ’ アル。Here, the lower metal thin layer Jl14AJtCr, the next metal thin layer m4Blj:Ni, and the surface layer gold X''fWli4ChaA
gt' al.
前記抵抗体２の表面には、第１の保護コート（樹脂）５
が設けられ、その上に第２の保護コート（樹脂又はガラ
ス）６が設けられる。A first protective coat (resin) 5 is applied to the surface of the resistor 2.
is provided thereon, and a second protective coat (resin or glass) 6 is provided thereon.
なお、下層の金属薄膜４Ａとしては、Ｔｉ、 Ｃｒを３
０ｗｔ％以上含むＮｉＣｒ等の抵抗膜（Ｒｕ Ｏ２）と
の密着性が確保出来る材料が使用できる。また、その上
の金属１１１１４Ｂとしては、耐はんだ性を確保できる
材料ＮｉＣｒ合金、ＡｇＮｉ合金、５ｎＮｉ合金等を使
用できる１表層の金属薄膜４Ｃとしては、Ｐｂ−−８ｎ
、Ｓｎ等のはんだとなじみ易い材料を使用できる。Note that the lower metal thin film 4A contains 3 Ti and Cr.
A material that can ensure adhesion to the resistive film (RuO2), such as NiCr containing 0 wt% or more, can be used. Further, as the metal 11114B on it, a material that can ensure solder resistance such as NiCr alloy, AgNi alloy, 5nNi alloy, etc. can be used.1 As the metal thin film 4C on the surface layer, Pb--8n
, Sn, and other materials that are easily compatible with solder can be used.
上記のチップ抵抗器の製造は、次の順序で行う。The above chip resistor is manufactured in the following order.
まず、第２図のようにスリット状穴１１によって区画さ
れた複数の棒状部１２を一体に有するアルミナ等の穴明
き絶縁基板１０を受は入れ、表面を洗浄してお（。First, as shown in FIG. 2, a perforated insulating substrate 10 made of alumina or the like, which integrally has a plurality of rod-shaped parts 12 partitioned by slit-shaped holes 11, is inserted into the receiver, and the surface is cleaned.
次に第３図のように、抵抗ペーストをスクリーン印刷し
、乾燥、焼成（焼成温度８５０℃）する等の厚膜技術で
Ｒｕ Ｏｆ系抵抗体２を各棒状部１２上に設ける。Next, as shown in FIG. 3, a RuOf-based resistor 2 is provided on each rod-shaped portion 12 using a thick film technique such as screen printing a resistor paste, drying it, and firing it (firing temperature: 850° C.).
それから、第４図の如く、穴明き絶縁基板の状態のまま
でスパッタ、イオンブレーティング、Ｐ−ＣＶＤ等の薄
膜技術による金属薄膜をＣｒ＊ＮＬＡｇの順に設ける。Then, as shown in FIG. 4, a metal thin film is formed in the order of Cr*NLAg using a thin film technique such as sputtering, ion blasting, or P-CVD while leaving the perforated insulating substrate in its original state.
この場合、各金属薄膜は前記抵抗体２上の一部を含む棒
状部１２の両端部を略コ字状に囲むように当該棒状部の
裏面一部にまで延長して形成する。このような３層の金
属ｍｓで端部電極３が乾式でしかも低温プロセスで形成
される。その後、第５図のよ°う・に第１の保護コート
５が設けられる。In this case, each metal thin film is formed so as to surround both ends of the rod-shaped portion 12 including a portion on the resistor 2 in a substantially U-shape, and extend to a part of the back surface of the rod-shaped portion. The end electrode 3 is formed from such three layers of metal ms using a dry process at a low temperature. Thereafter, a first protective coat 5 is applied as shown in FIG.
抵抗体２及び端部電極３を形成した穴明き絶縁基板１０
の裏面を、第６図のようにベース基板１３上に貼り付け
、各棒状部１２を複数個のチップ状絶縁板に切断分離し
、チップ状絶縁板に抵抗体２と端部電極３が形成された
個々のチップ抵抗器１５が所定の位置精度を保った状態
で配列されたチップ抵抗器集合体２０を得る。このチッ
プ抵抗器集合体２０の状態で抵抗値の調整を行い、第２
の保護コート６を設ける。第２の保護コート６を設けた
後、１’ｌ要者側の用途に応じチップ抵抗器集合体２０
の状態で出荷する。A perforated insulating substrate 10 on which a resistor 2 and an end electrode 3 are formed.
The back side of the is pasted on the base substrate 13 as shown in FIG. 6, and each rod-shaped part 12 is cut and separated into a plurality of chip-shaped insulating plates, and the resistor 2 and end electrode 3 are formed on the chip-shaped insulating plates. A chip resistor assembly 20 is obtained in which the individual chip resistors 15 are arranged while maintaining a predetermined positional accuracy. The resistance value is adjusted in this state of the chip resistor assembly 20, and the second
A protective coat 6 is provided. After providing the second protective coat 6, the chip resistor assembly 20 is
It will be shipped in this condition.
通常の場合、ベース基板を外し、チップ抵抗器１５をば
らばらに分離してマガジンに詰めるか、テーピングする
。In a normal case, the base substrate is removed and the chip resistors 15 are separated into pieces and packed in a magazine or taped.
（発明の効果）
以上説明したように、本発明によれば、チップ状絶縁板
の一面に厚膜技術により抵抗体を形成し、前記チップ状
絶縁板の端部を略コ字状に囲むように前記抵抗体に接続
する薄膜技術による金属薄膜の端部電極を形成したので
、以下のような効果を得ることができる。(Effects of the Invention) As described above, according to the present invention, a resistor is formed on one surface of a chip-shaped insulating plate by thick film technology, and the resistor is formed so as to surround the end of the chip-shaped insulating plate in a substantially U-shape. Since the end electrode of the metal thin film connected to the resistor is formed using thin film technology, the following effects can be obtained.
（１） 端部電極となる部分が、スパッタ、イオンブレ
ーティング、Ｐ−ＣＶＤ等の乾式成膜法（しかも低温プ
ロセス）を使りて金属薄膜で形成されるので、製品の外
形寸法の精度向上及び抵抗値の精度向上が可能で、また
酸、アルカリ浸漬が避けられるため、製品の信頼性向上
を図ることができ゛る。(1) The part that becomes the end electrode is formed of a thin metal film using a dry film formation method (and a low-temperature process) such as sputtering, ion blating, or P-CVD, improving the accuracy of the external dimensions of the product. It is possible to improve the precision of the resistance value and avoid immersion in acids and alkalis, thereby improving the reliability of the product.
（２） 穴明・き絶縁基板を使用することによツて、従
来の端部電極形成法に起因する１枚基板を棒状に分割す
菖工程を省くことができ、製造の際の作業性の向上、製
造時間の短縮、連続プロセス制御の向上がもたらされる
。(2) By using a perforated insulating substrate, it is possible to omit the iris process of dividing a single substrate into rod shapes, which is caused by the conventional method of forming end electrodes, and improves workability during manufacturing. This results in improved manufacturing efficiency, reduced manufacturing time, and improved continuous process control.
第１図は本発明の実施例であってチップ抵抗器完成状態
を示す正面図、第２図は本発明の製造工程で使用する穴
明き絶縁基板゛を示す斜視図、第３図は抵抗体を設ける
工程の斜視図、第４図の端部電極を設ける工程の斜視図
、第５図は第１の保護コートを設ける工程の正断面図、
第６図はチップ抵抗器集合体を示す斜視図である。
１・・・チップ状絶縁板、２・・・抵抗体、３・・・端
部電極、４Ａ、４Ｂ、４Ｃ・・・金属薄膜、５，６・・
・保護コート、１０・・・穴明き絶縁基板、１２・・・
棒状部。Fig. 1 is an embodiment of the present invention, which is a front view showing a completed state of a chip resistor, Fig. 2 is a perspective view showing a perforated insulating substrate used in the manufacturing process of the present invention, and Fig. 3 is a resistor. 4 is a perspective view of the step of providing the end electrode, FIG. 5 is a front sectional view of the step of providing the first protective coat,
FIG. 6 is a perspective view showing the chip resistor assembly. DESCRIPTION OF SYMBOLS 1... Chip-shaped insulating plate, 2... Resistor, 3... End electrode, 4A, 4B, 4C... Metal thin film, 5, 6...
・Protective coat, 10... Perforated insulating substrate, 12...
Rod-shaped part.
Claims (3)
形成し、前記チップ状絶縁板の端部を略コ字状に囲むよ
うに前記抵抗体に接続する薄膜技術による金属薄膜の端
部電極を形成したことを特徴とするチップ抵抗器。(1) A resistor is formed on one surface of a chip-shaped insulating plate using thick film technology, and the edge of a metal thin film is formed using thin-film technology to connect to the resistor so as to surround the end of the chip-shaped insulating plate in a substantially U-shape. A chip resistor characterized by forming a partial electrode.
形成し、前記チップ状絶縁板の端部を略コ字状に囲むよ
うに前記抵抗体に接続する薄膜技術による金属薄膜の端
部電極を形成してなるチップ抵抗器を、ベース基板上に
所定位置関係で配列したことを特徴とするチップ抵抗器
集合体。(2) A resistor is formed on one surface of a chip-shaped insulating plate using thick film technology, and the edge of a metal thin film is formed using thin-film technology to connect to the resistor so as to surround the end of the chip-shaped insulating plate in a substantially U-shape. 1. A chip resistor assembly characterized in that chip resistors formed with partial electrodes are arranged in a predetermined positional relationship on a base substrate.
の各棒状部の一面に厚膜技術により抵抗体を形成し、薄
膜技術により前記棒状部の端部を略コ字状に囲むように
金属薄膜の端部電極を形成した後、前記棒状部を複数個
に切断分離することを特徴とするチップ抵抗器の製造方
法。(3) A resistor is formed on one surface of each bar-shaped part of a perforated insulating substrate in which a plurality of bar-shaped parts are integrally formed, and the ends of the bar-shaped parts are formed into a substantially U-shape by thin film technology. A method of manufacturing a chip resistor, comprising forming an end electrode of a metal thin film so as to surround the rod-shaped portion, and then cutting and separating the rod-shaped portion into a plurality of pieces.
Priority Applications (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62004473A JPS63172401A (en) | 1987-01-12 | 1987-01-12 | Chip resistor, chip resistor assembly and manufacture of chip resistor |
| US07/015,282 US4792781A (en) | 1986-02-21 | 1987-02-17 | Chip-type resistor |
| DE3705279A DE3705279C2 (en) | 1986-02-21 | 1987-02-19 | Process for manufacturing resistors in chip form |
| CA000530229A CA1272769A (en) | 1986-02-21 | 1987-02-20 | Chip-type resistor |
| FR878702279A FR2595000B1 (en) | 1986-02-21 | 1987-02-20 | CHIP TYPE RESISTANCE AND MANUFACTURING METHOD THEREOF |
| KR1019870001452A KR910000969B1 (en) | 1986-02-21 | 1987-02-20 | Chip-type resistor |
| GB08704141A GB2187598B (en) | 1986-02-21 | 1987-02-23 | Chip-type resistor |
| SG926/91A SG92691G (en) | 1986-02-21 | 1991-11-02 | Chip-type resistor |
| HK1064/91A HK106491A (en) | 1986-02-21 | 1991-12-23 | Chip-type resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62004473A JPS63172401A (en) | 1987-01-12 | 1987-01-12 | Chip resistor, chip resistor assembly and manufacture of chip resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63172401A true JPS63172401A (en) | 1988-07-16 |
Family
ID=11585087
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62004473A Expired - Lifetime JPS63172401A (en) | 1986-02-21 | 1987-01-12 | Chip resistor, chip resistor assembly and manufacture of chip resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63172401A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02132804A (en) * | 1988-11-12 | 1990-05-22 | Tdk Corp | Chip type resistance network and manufacture thereof |
| JPH02110302U (en) * | 1989-02-18 | 1990-09-04 | ||
| JPH0380501A (en) * | 1989-08-23 | 1991-04-05 | Tdk Corp | Chip resistor and manufacture thereof |
| WO2003060929A1 (en) * | 2002-01-15 | 2003-07-24 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing chip resistor |
| JP2005259892A (en) * | 2004-03-10 | 2005-09-22 | Koa Corp | Manufacturing method of chip component |
| US8193899B2 (en) | 2008-06-05 | 2012-06-05 | Hokuriku Electric Industry Co., Ltd. | Chip-like electric component and method for manufacturing the same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5316153B2 (en) * | 1971-12-13 | 1978-05-30 | ||
| JPS59143303A (en) * | 1983-02-03 | 1984-08-16 | 株式会社村田製作所 | Method of producing chip-shaped electronic part |
| JPS61219124A (en) * | 1985-03-25 | 1986-09-29 | 関西日本電気株式会社 | Manufacture of ceramic part |
-
1987
- 1987-01-12 JP JP62004473A patent/JPS63172401A/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5316153B2 (en) * | 1971-12-13 | 1978-05-30 | ||
| JPS59143303A (en) * | 1983-02-03 | 1984-08-16 | 株式会社村田製作所 | Method of producing chip-shaped electronic part |
| JPS61219124A (en) * | 1985-03-25 | 1986-09-29 | 関西日本電気株式会社 | Manufacture of ceramic part |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02132804A (en) * | 1988-11-12 | 1990-05-22 | Tdk Corp | Chip type resistance network and manufacture thereof |
| JP2640767B2 (en) * | 1988-11-12 | 1997-08-13 | ティーディーケイ株式会社 | Method of manufacturing chip-type resistor network |
| JPH02110302U (en) * | 1989-02-18 | 1990-09-04 | ||
| JPH0380501A (en) * | 1989-08-23 | 1991-04-05 | Tdk Corp | Chip resistor and manufacture thereof |
| JP2526131B2 (en) * | 1989-08-23 | 1996-08-21 | ティーディーケイ株式会社 | Chip resistor and manufacturing method thereof |
| WO2003060929A1 (en) * | 2002-01-15 | 2003-07-24 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing chip resistor |
| US7237324B2 (en) | 2002-01-15 | 2007-07-03 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing chip resistor |
| CN100353467C (en) * | 2002-01-15 | 2007-12-05 | 松下电器产业株式会社 | Method for manufacturing chip resistor |
| JP2005259892A (en) * | 2004-03-10 | 2005-09-22 | Koa Corp | Manufacturing method of chip component |
| US8193899B2 (en) | 2008-06-05 | 2012-06-05 | Hokuriku Electric Industry Co., Ltd. | Chip-like electric component and method for manufacturing the same |
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