JPH05313200A - Active matrix substrate - Google Patents

Abstract

PURPOSE:To improve the production yield of a TFT array substrate by short circuiting nearly both ends of gate wiring groups with a metal formed before anodic oxidation. CONSTITUTION:The gate wiring groups are so constituted as to be all the circuit shorted at both ends thereof. A disconnection defect 7 of the gate wirings is assumed to be generated by the defect in photolithography at the time of forming the gate wirings or the defect at the time of etching at the time. The gate wiring groups are, however, short circuited even at the anodic oxidation current supply ends of the gate wiring groups and the anodic oxidation current is therefore supplied from the power feed ends of the gate wirings through the other normal gate wirings even behind the disconnected part. As a result, the anodic oxide films 2 are formed. The gate panel signals are supplied to the wirings after the disconnection of the liquid crystal panel by executing the rescue of the disconnection and, therefore, the normal display is possible.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate which constitutes a display device in combination with a liquid crystal or the like.

[0002]

2. Description of the Related Art Here, a typical thin film transistor (hereinafter abbreviated as TFT) array substrate of an active matrix substrate used for a liquid crystal display device will be described as an example. In recent years, as a material for forming a gate insulating film of a TFT, a gate is used.
Attention has been focused on an insulating film obtained by anodizing a metal such as aluminum or tantalum that forms a wiring. The insulating film formed by the anodic oxidation method has a feature that a film with fewer pinhole defects can be easily formed as compared with an insulating film formed by a conventional chemical vapor deposition (CVD) method, a sputtering method, or the like. Have

A conventional TFT array substrate using an anodic oxide film will be described below with reference to (FIG. 5), (FIG. 6) and (FIG. 7). FIG. 5 shows a planar configuration of the TFT array substrate after anodization. Further, (FIG. 6) shows the cross-sectional structure of the TFT array substrate using the anodic oxide film (FIG. 7).
Shows a plan configuration of a TFT array substrate using an anodized film.

In the method of manufacturing this TFT array substrate, first, the gate wiring 1 is formed of a metal such as aluminum or tantalum. At this time, as shown in (FIG. 5), all of the gate wirings are configured so that one terminal thereof is short-circuited.

In this state, the substrate is dipped in an electrolytic solution (oxalic acid or the like), a platinum electrode is placed on the cathode in parallel with the main substrate, and an anode voltage is applied to the short-circuited gate wiring group of the main substrate. About 100
A voltage of V is applied to the gate wiring group, electrolysis is performed to generate oxygen, and the anodic oxide film 2 is formed on the gate wiring group.

Thereafter, the silicon nitride film 3 is formed by the CVD method. The gate insulating film forming the TFT is composed of two layers of the anodic oxide film 2 and the silicon nitride film 3. And
The i-type semiconductor film 4 that forms the TFT is formed. Next, a pixel electrode is formed by the ITO film 5 which is a transparent conductive film.

At this time, the mounting portion of the drive IC for supplying the gate pulse signal is also formed. Since the ITO film has a stable surface state as compared with other conductive films, a good connection with the drive IC can be obtained, and thus the ITO film is used for the IC mounting portion. Then, the source / drain electrode 6 is formed, and the pixel and the TFT are formed.
Connect.

After the TFT array substrate is completed, it is assembled into a liquid crystal panel. Another transparent glass substrate on which an ITO film is deposited is bonded while holding a gap of several microns, and liquid crystal is injected into this gap. Excess glass substrate around the LCD panel is cut. When cutting this board,
By cutting along the substrate cutting line 8 shown in FIG. 3, the short-circuited gate wiring group is separated.

After that, signals are supplied to the gate and source wirings from the IC mounting portion formed of the ITO film to display the liquid crystal panel, and image evaluation is performed. At this time, the gate or
If the source line is broken, rescue is performed.

A rescue method for a gate disconnection will be described with reference to FIG. FIG. 4 is a simplified explanatory diagram of the TFT array. In Fig. 4, the source wiring is
Omitted. By mounting the IC on the drive IC mounting unit 13, a gate pulse signal is supplied to the gate wiring group, and the TFT on the wiring is driven. As shown in the figure, T
Rescue wiring 14 is formed in the peripheral portion of the FT array substrate so as to cross the input end and the end portion of the gate wiring group.

However, at this time, the rescue wiring 14 and the gate wiring 1 are configured so as to be separated via the insulating film and not to be short-circuited. Further, a rectangular pattern (referred to as a rescue pad) 11 made of aluminum is formed between the gate wirings and connected to the rescue wiring 14. Further, a rectangular pattern (also referred to as a signal pad) 12 also made of aluminum is formed at the signal input end and the terminal end so as to be connected to each gate wiring 1.

If a wire breaks 7,
The signal pad 12 and the rescue pad 11 at the input end of the wiring, and the signal pad 12 and the rescue pad 11 at the terminal end are connected by the wire bonding method using the gold wire 15. As a result, the signal input from the drive IC is also supplied to the wiring after the disconnection portion through the rescue wiring 14 from the wiring end portion, and the disconnection defect is eliminated.

[0013]

In order to anodize the gate wiring, it is necessary to short all the gate wirings.
However, as shown in FIG. 5, a disconnection 7 may occur in the gate wiring 1 due to a defect in photolithography when forming the gate wiring or a defect in etching. Since the anodizing current is not supplied to the wiring having the disconnection defect after the disconnection portion, the anodized film 2 is not formed.

In the TFT on the gate wiring where the anodic oxide film is not formed, since the gate insulating film is one layer of the silicon nitride film 3, the TFT characteristics are different from those of other normal portions, and as a result, an image defect occurs in the liquid crystal panel. .. Further, in the gate / source crossing portion 16 shown in (FIG. 7), two wirings cross each other through only one layer of the silicon nitride film 3, so that a gate / source short-circuit defect is likely to occur. When a gate-source short circuit defect occurs, a normal signal is not supplied to the wiring, and thus an image defect also occurs in the liquid crystal panel.

[0015]

Means for Solving the Problems With a metal formed before anodization, almost both ends of a gate wiring group are short-circuited.

[0016]

Function Before the anodizing process, even if a disconnection occurs in a certain gate wiring, an anodizing current is supplied through another normal gate wiring, so that an anodized film is formed on the wiring after the disconnection. To be done. Therefore, the manufacturing yield of the TFT array substrate is improved.

[0017]

EXAMPLE A first example (FIG. 1) will be described.
(FIG. 1) is a diagram at the stage when the gate wiring 1 and the anodic oxide film 2 constituting the TFT are formed. The gate wiring group is
The both ends thereof are short-circuited and are made of metal such as aluminum or tantalum. In this state, the substrate is immersed in an electrolytic solution (oxalic acid or the like), one short-circuited gate wiring group of this substrate is connected with a clip, and an anode voltage is applied. Further, a platinum electrode is placed on the cathode in parallel with the substrate. Then, a voltage of about 100 V is applied to the short-circuited main gate wiring group, electrolysis is performed to generate oxygen, and the anodic oxide film 2 is formed on the gate wiring group. After this, first (Fig. 6), 7
In the same manner as described above, the silicon nitride film 3 is formed by the CVD method and the i-type semiconductor film 4 forming the TFT is formed. Then, by the ITO film 5 which is a transparent conductive film,
A pixel electrode is formed, a source / drain electrode 6 is formed using aluminum, and a pixel and a TFT are connected.

As shown in FIG. 1, it is assumed that a disconnection defect 7 of the gate wiring 1 occurs due to a defect in photolithography at the time of forming the gate wiring or a defect in etching. Even at the anodizing current supply end (referred to as the power supply end) of the gate wiring group on the right side of the drawing, the gate wiring group is short-circuited, so that there is no disconnection even after the disconnection. Anodizing current is supplied from the feeding end of the gate wiring through the normal gate wiring. Therefore, the anodic oxide film 2 is formed.

Further, as described above, by performing the disconnection rescue, in the liquid crystal panel, the gate panel signal is also supplied to the wiring after the disconnection, so that the normal display can be performed.

By carrying out the present embodiment, even if the gate disconnection occurs before the anodization, the anodizing current is supplied to form the anodized film, so that the manufacturing yield of the TFT array substrate is improved.

Further, when static electricity generated at the time of manufacturing the TFT array substrate and at the time of assembling the liquid crystal panel enters into one gate wiring, the TFT arranged on the gate wiring.
Cause a defect that changes the characteristics of. The structure in which the gate wiring is short-circuited also has the effect of dispersing this static electricity to other wiring and alleviating this TFT characteristic defect. In the structure of this embodiment, both ends of the gate wiring are short-circuited, so that the gate wiring is more resistant to static electricity than the conventional one.

A second embodiment (FIG. 2) and (FIG. 3) 3 will be described. (FIG. 2) is a diagram at the stage when the gate wiring 1 and the anodic oxide film 2 which form the TFT are formed. First, a pattern extending vertically is formed on both ends of the TFT array substrate by the chromium film 9. Next, as shown in (1) of FIG. 3, the gate wiring group 1 is formed so that both ends thereof overlap the chromium film 9 previously formed. As shown in FIG. 2, the gate wiring group 1 is short-circuited by the chromium film 9 at both ends thereof. Next, (Fig. 3) (2)
As shown in, the resist film 10 is formed in a shape that completely covers the chromium film. In this state, the substrate is dipped in an electrolytic solution (oxalic acid, etc.), one short-circuited gate wiring group of this substrate is connected with a clip, and an anode voltage is applied, as in the first embodiment (see FIG. (3) As shown in (3), the anodic oxide film 2 is formed on the gate wiring group, and the resist film is removed. After that, the process is performed in the same manner as in the first embodiment, and the TFT is
Create an array substrate.

As shown in FIG. 2, as in the first embodiment, even if the disconnection failure 7 of the gate wiring 1 occurs, the gate wiring group is short-circuited at the gate wiring feeding end portion. Therefore, the anodic oxidation current is supplied from the end portion of the power supply to the gate wiring even after the disconnection portion through the other normal gate wiring in which the disconnection has not occurred. Therefore, the anodic oxide film 2 is formed.

Further, as described above, by performing the disconnection rescue, in the liquid crystal panel, the gate panel signal is also supplied to the wiring after the disconnection, so that the normal display can be performed.

By carrying out this embodiment, similarly to (Embodiment 1), even if the gate disconnection occurs before the anodic oxidation, the anodic oxide film is formed, and the manufacturing yield of the TFT array substrate is improved.

Further, as in the case of (Example 1), even if static electricity generated at the time of manufacturing the TFT and at the time of assembling the liquid crystal panel is input, it is short-circuited at both ends of the gate wiring. Has strong resistance to static electricity.

Further, the short-circuited gate wiring group can be separated by cutting the substrate as in the case of the first embodiment, but since it is short-circuited by the Cr pattern, it is on the Cr pattern. If the insulating film is removed, it can be separated by etching.

A cerium-ammonium sulfate aqueous solution is used as the Cr etching solution. This etching solution is
Since aluminum and tantalum that form the gate and source wiring are not melted, defects such as disconnection do not occur. When the gate wiring group is separated by cutting the substrate as in the first embodiment, static electricity generated at the time of cutting the substrate may enter the gate wiring because the gate wiring is cut. However, when the gate wiring is separated by etching,
As shown in FIG. 2, since it is not necessary to cut the substrate 8 on the gate wiring, it is unlikely that static electricity enters the gate wiring, and the yield of the TFT array substrate is improved.

[0029]

[Effects of the Invention] Even if a wire breaks, an anodizing current is supplied from another wire, and even after the wire breaks,
An anodic oxide film is formed. Therefore, the manufacturing yield of the TFT array substrate is improved.

In addition, when static electricity generated at the time of manufacturing the TFT array substrate and at the time of assembling the liquid crystal panel enters one gate wiring, the TFT arranged on the gate wiring.
Cause a defect that changes the characteristics of. The structure in which the gate wiring is short-circuited also has the effect of dispersing this static electricity to other wiring and alleviating this TFT characteristic defect. In the structure of the present invention, since both ends of the gate wiring are short-circuited, the gate wiring is more resistant to static electricity than the conventional one.

[Brief description of drawings]

FIG. 1 is a schematic plan configuration diagram of a TFT array substrate after forming a gate wiring and an anodic oxide film in the first embodiment.

FIG. 2 is a schematic plan configuration diagram of a TFT array substrate after forming a gate wiring and an anodic oxide film in the second embodiment.

FIG. 3 is a schematic cross-sectional process diagram of a TFT array substrate up to formation of a gate wiring and an anodic oxide film in the second embodiment.

FIG. 4 is an explanatory diagram of a rescue method by a wire bonding method for a gate disconnection on a TFT array substrate.

FIG. 5 is a simplified plan configuration diagram of a TFT array substrate after forming a gate wiring and an anodic oxide film in a conventional example.

FIG. 6 is a cross-sectional configuration diagram of a TFT array using an anodic oxide film.

FIG. 7 is a plan configuration diagram of a TFT array using an anodic oxide film.

[Explanation of symbols]

 1 Gate Metal 2 Anodic Oxide Film 3 Silicon Nitride Film 4 Semiconductor Film 5 ITO Film 6 Source / Drain Metal 7 Gate Disconnection 8 Substrate Dividing 9 Chrome Film 10 Resist Film 11 Rescue Pad 12 Signal Pad 13 Drive IC Mount 14 Rescue wiring 15 Gold wire 16 Gate / source cross section

Claims (1)

[Claims] 1. An active matrix substrate having a wiring group extending in parallel and an insulating film obtained by anodizing the wiring group on one main surface of the substrate, wherein the wiring group is anodized. An active matrix substrate, characterized in that the both ends of the wiring group are short-circuited with the metal formed previously.