JPH07104316A - Production of liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent the deterioration in the characteristics of anodically oxidized Al gate TFTs of the active matrix type liquid crystal display device using these TFTs by generation of static electricity at the time of removing voltage supplying lines which are unnecessary after anodic oxidation. CONSTITUTION:The purposes described above are achieved by executing the removal of the voltage supplying wirings (L, PD) and cut parts (E) by etching. The prescribed parts are subjected to prevention of anodic oxidation by coating these parts with a resist film and boring of the corresponding gate insulating film. Etching is executed simultaneously at the time of patterning of source and drain wiring materials (22), by which an increase of stages is eliminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly to a method for manufacturing a liquid crystal display device in which Al or a metal containing Al as a main component is used as a gate wiring material and the surface of which is covered with an anodic oxide film. Regarding the method.

[0002]

2. Description of the Related Art Liquid crystal display devices have advantages such as small size, thin shape, and low power consumption, and are being put to practical use in fields such as OA equipment and AV equipment. In particular, in the active matrix type using a thin film transistor (hereinafter abbreviated as TFT) as a switching element, the number of terminals is m with respect to the number of pixels m × n.
It is used as a display because it can display minute moving images with a small + n.

The active matrix type liquid crystal display device is
A substrate in which display electrodes having TFTs are arranged in a matrix and a substrate having common electrodes are bonded to each other, and liquid crystal is sealed in a gap. The TFT is a switching element that selects the data signal input to the display electrode, and the same row is connected to one gate line and the same column is connected to one drain line. The gate line group is line-sequentially scanned to turn on all TFTs for each row, and a data signal synchronized with this is input to each display electrode. The potential of the common electrode is set in synchronization with the scanning signal, and the liquid crystal in the gap is driven by the voltage between the opposing display electrodes, and the light transmittance is adjusted for each pixel to obtain the desired display screen. To be Further, the driving state of the liquid crystal during the OFF period is held by the liquid crystal capacitance between both electrodes, but the holding characteristic can be improved by adding an auxiliary capacitance in parallel with this.
The auxiliary capacitance can be obtained by arranging the auxiliary capacitance electrode on the display electrode so as to be set to the same potential as the common electrode, or by forming the auxiliary capacitance electrode so as to extend from a part of the gate line and overlapping it on the display electrode.

As a TFT, an inverted stagger type in which a gate electrode is provided under a channel is generally used. However, in this structure, since the gate wiring is the lowermost layer, a defect caused in a subsequent manufacturing process becomes a problem. That is, in order to reduce the signal delay due to the wiring resistance, it is desirable to use Al having a low specific resistance as the gate wiring material. However, Al tends to have a projection-like defect (hillock) on the surface, which causes a high thermal resistance afterward. It may grow in the process and penetrate the insulating film, resulting in a short circuit. Further, when Cr is used, it is suitable in terms of strength, but it causes signal delay due to its high specific resistance. In order to solve these problems, for example, Al described in JP-A-3-232274
There is anodic oxidation. By using Al as a gate wiring material and forming an Al ₂ O ₃ insulating film by a anodic oxidation method as a protective film on this surface, it is possible to prevent signal delay and hillock generation. Further, Cr is used for the terminal portion in order to connect with the external circuit IC that drives the TFT, with emphasis on strength.

A conventional example will be described below. Figure 10 shows a TFT
FIG. 11 is a plan view of the substrate, and FIG. 11 is an enlarged plan view showing two pixels of the display section. The gate line (14
L) and the drain line (22L) are arranged so as to intersect with each other, and a TFT, a display electrode (21), and an auxiliary capacitance electrode (15E) forming an auxiliary capacitance with the display electrode are formed at the intersection. The gate line (14L) and the drain line (22L) are lead lines (C1, C), respectively.
It is connected to the gate input terminal (11) and the drain input terminal (13) via 3). Each auxiliary capacitance electrode (15E) in the same row is connected to each other by an auxiliary capacitance line (15L), and each auxiliary capacitance line (15L) is
Auxiliary capacitance input terminal (12) via the lead wire (C2)
Commonly connected to. The respective gate input terminals (11) and the auxiliary capacitance lines (15L) are commonly connected by the voltage supply lines (L _G , L _S ) for anodic oxidation.

The gate wiring and the auxiliary capacitance wiring made of Al are formed in the anodizing solution in the voltage supply pads (PD _G , PD _S ) formed at one end of the voltage supply lines (L _G , L _S ), respectively.
The surface is anodized by applying a predetermined DC voltage. At this time, the gate input terminal (1
1) and the auxiliary capacitance input terminal (12) are dissolved by the battery reaction when they come into contact with the anodizing solution, and thus are covered with a resist film to protect it. The dotted line X in FIG. 10 is the edge of the masking resist, the left side of which is the region where the resist film is coated and is not anodized, and the right side is the region which is anodized. After anodic oxidation, the voltage supply line (L _G ,
L _S ) and voltage supply pads (PD _G , PD _S ) are shown in FIG.
The substrate is removed by cutting along the dotted line Y.

FIG. 12 shows a gate terminal portion (left side) and a TFT.
FIG. 11 is a cross-sectional view of a portion (right side), and FIG.
FIG. 12 is a sectional view taken along the line B-B in FIG. 11. A Cr gate input terminal (11), an Al gate electrode (14E), a lead wire (C1), and an auxiliary capacitance electrode (15E) are provided on a transparent substrate (10) such as glass. Al ₂ O ₃ formed on the Al surface by anodic oxidation
(16) is covered and becomes a part of the gate insulating film. Furthermore, the gate electrode (14E) and the auxiliary capacitance electrode (1
5E) is laminated with SiN _x to form a two-layer structure of the gate insulating film (17). Gate insulation film (1
7) at a position corresponding to the gate electrode (14E) on the channel layer, a-Si (18) which is a channel layer, N ⁺ a-Si (20) which is a contact layer, and an etching stopper (1
9), SiN _x is provided. N ⁺ a-Si (2
0), the Al drain electrode (22D) and the source electrode (22S) are formed respectively. In the display area on the gate insulating film (17), a part of the auxiliary capacitance electrode (1
The display electrode (21) superposed on 5E) is formed of ITO.

[0008]

The voltage supply wiring (L _G , L _S , PD _G , PD _S ) by mechanical means as in the conventional example.
In the removal method of T, due to the static electricity generated during cutting, T
There is a problem that the threshold of FT changes and the characteristics deteriorate. In addition, all unnecessary electrical connections must be cut off by one or several linear cuts, which limits the pattern of the voltage supply wiring (L _G , L _S , PD _G , PD _S ). Along with this, the pattern of the terminal portion was also limited. Therefore, in particular, when the auxiliary capacitance electrodes are formed independently, the pattern formation of the voltage supply lines (L _G , L _S ) connected to the auxiliary capacitance electrodes becomes difficult as the miniaturization progresses.

[0009]

The present invention has been made in view of the above-mentioned problems, and a step of forming a first conductive layer containing Al or Al as a main component on a substrate, and a step of forming the first conductive layer A step of forming a gate wiring and a voltage supply wiring for anodization by patterning; a step of forming an Al ₂ O ₃ film on the surface by anodizing a predetermined region of the gate wiring; A step of sequentially forming an insulating layer and a non-single-crystal semiconductor layer on the substrate, a step of patterning the non-single-crystal semiconductor layer, and a second surface containing Al or Al as a main component.
And a step of forming source / drain wirings by patterning the second conductive layer by photoetching, wherein the second conductive layer is formed. When patterning by photoetching, a predetermined portion of the voltage supply wiring is removed by etching, or after the anodization, the voltage supply wiring is cut at a predetermined portion by laser irradiation. is there.

[0010]

By the method of cutting the unnecessary electrical connection after the anodic oxidation by etching or laser irradiation, the characteristic deterioration of the TFT due to static electricity can be prevented. Further, the pattern of the voltage supply wiring is not restricted, and the pattern of the gate / auxiliary capacitance wiring according to miniaturization becomes possible. Further, since the etching of the voltage supply wiring is performed at the time of patterning the source / drain wiring, it is not necessary to increase the number of processes.

[0011]

Embodiments Next, embodiments of the present invention will be described with reference to FIGS. The same reference numerals are used for the same reference numerals as in the conventional example. FIG. 1 is a plan view showing the wiring of the TFT substrate, and FIG. 11 which is the same as the conventional example is used as an enlarged plan view of the display section. A plurality of gate lines (14L) and drain lines (22L) are arranged in the display section so as to intersect with each other, and both lines (14L, 22L) are arranged at their intersections.
L) TFT connected to the display electrode (2 connected to the TFT
1) is formed. Each gate line (14L) and drain line (22L) is connected to a lead line (C).
1, C3) are connected to the gate input terminal (11G) or the inspection pad (11P) and the drain input terminal (13). One gate line (14L) has one end connected to the gate input terminal (11G) for gate signal input and the other end connected to the inspection pad (11P). For microfabrication, gate input terminal (11G) and inspection pad (11P)
Each of the display units is alternately arranged on the right and left sides, and the display unit is driven from both sides. Furthermore, each gate input terminal (11
G) and the inspection pad (11P) are commonly connected to the voltage supply line (L) for anodization, and the voltage supply pad (P)
D). Further, the display electrode (21) and the auxiliary capacitance electrode (15E) forming an auxiliary capacitance are connected to each other in the same row by the auxiliary capacitance line (15L), and each auxiliary capacitance line (15L) is a lead line (C2).
Is commonly connected to the auxiliary capacitance input terminal (12). In addition, each auxiliary capacitance line (15L) is connected to the lead line (C1) for voltage supply during anodic oxidation.

2 to 9 are cross-sectional views showing a manufacturing method according to an embodiment of the present invention, in which the left side shows the gate terminal portion and the right side shows the TFT portion, which are taken along the line AA of FIG. 1 and FIG. It corresponds to the line B-B. The manufacturing process will be described below with reference to FIGS. 1 and 11 according to the manufacturing process shown in FIGS. First, Cr is laminated on a transparent substrate (10) such as glass by sputtering to a thickness of about 1000 Å, and this is patterned by photoetching, so that a gate input terminal (11G) and an inspection pad (11P) are provided at the substrate end. ,
Auxiliary capacitance input terminal (12) and drain input terminal (1
3) is formed (see FIG. 2 above). Subsequently, Al is deposited by sputtering to a thickness of about 1500 Å, and this is patterned by photoetching to obtain TF.
A gate electrode (14E) of T, a gate line (14L) connecting the gate electrodes (14E) row by row, and a gate input terminal (11G) extending from each gate line (14L).
Alternatively, a lead line (C) connected to the inspection pad (11P)
1) and the auxiliary capacitance electrode (15E) of the TFT and the auxiliary capacitance electrode (15E) are connected for each row, and the lead line (C
1), an auxiliary capacitance line (15L), further, a gate input terminal (11G) and a test pad (11P) are connected in a set of two rows, and a voltage supply line (L) that connects them in common, Then, the voltage supply pad (PD) is formed at one end of the voltage supply line (L) (see FIG. 3 above).

Then, the Al pattern is anodized.
Gate input terminal (11G) made of Cr, inspection pad (1
1P) and the auxiliary capacitance input terminal (12) are covered with a resist film so as not to come into contact with the anodizing liquid. The left side of the dotted line X in FIG. 1 is a region for forming a resist film, and the right side is a region for anodic oxidation. In addition, the leader line (C
2) to make a contact with the auxiliary capacitance line (15L) shown in FIG. 1 and a portion shown by a shaded portion E to cut a connection which is no longer needed, are covered with a resist film. So that it is not anodized. That is, since the anodized Al ₂ O ₃ film is a film that is difficult to etch, Al ₂ O ₃ should not be formed in advance in the portion that will be etched later.

By applying a DC voltage from the voltage supply pad (PD) to all the Al wirings in the anodizing solution prepared by diluting 3% tartaric acid with ethylene glycol or propylene glycol, the substrate in this state is Al ₂ O ₃ (1
6) is deposited. Since Cr causes a battery reaction by this anodizing solution and is easily dissolved, Cr terminal (11G,
11P, 12) is covered with a resist film to prevent contact with the anodizing solution. As shown in FIG. 1, the resist film has a masking end (dotted line X) at the Cr terminal (11G, 11P, 12) in order to prevent the anodizing liquid from entering from the interface covered with the resist film and eroding Cr. )
From 100 μm or more. Further, since the drain input terminal (13) is also made of Cr, the Cr terminals (11G, 11P, 1
As in 2), when coating with a resist film or immersing in an anodizing liquid, the substrate is placed so that the drain input terminal (13) is above the liquid surface, and anodizing is performed (above, FIG. 4). reference).

[0015] After the resist film is removed, the entire surface of the gate insulating film (17), for example, a SiN _X plasma CV
D to a thickness of about 2000 to 4000 Å, and then a-Si (18) is deposited to 1000 by plasma CVD.
Å and SiN _x are sequentially laminated to a thickness of about 2500Å. The uppermost layer of SiN _x is removed by etching except the portion corresponding to the gate electrode (14E), and the portion corresponding to the area where Al is not covered by Al ₂ O ₃ and is exposed during the above-mentioned anodic oxidation. , An etching stopper (19) and an island-shaped SiN _x film (19), respectively.
LN) is formed (see FIG. 5 above).

Then, phosphorus-doped a-Si (hereinafter abbreviated as N ⁺ a-Si) for improving contact (2
0) is laminated by plasma CVD to a thickness of about 500Å, and the N ⁺ a-Si (20) and a-Si (18) are left in the TFT portion by patterning with the same mask to form a channel contact layer. To be done. This time,
In the portion corresponding to the area where Al is exposed without being covered with Al ₂ O ₃ during the above-mentioned anodization, island-shaped Si is formed.
The N _x film (19LN) serves as an etching mask for aS
i (18LN) remains without being etched (see FIG. 6).
reference).

Next, ITO as a transparent electrode material is laminated by sputtering or the like to a thickness of about 500 to 1000 Å and patterned to form a display electrode (21) and a SiN _x film (19L).
An ITO film (21LN) is formed on N). continue,
By etching away a predetermined region of the gate insulating film (17), the terminal portions (11G, 11P, 12, 1) are removed.
3), voltage supply line (L), voltage supply pad (P
D) and the cut portion (E) of the auxiliary capacitance line (15L)
Is exposed and a contact hole (CT) of the auxiliary capacitance line (15L) is formed (see FIG. 7 above).

Next, as a source / drain wiring material
For example, the lower layer is 1000Å Mo and the upper layer is 7,000Å
2 layer film (22) of Al is formed (see FIG. 8) and
Pattern. As a result, the gate line (14
L) and the drain crossing the auxiliary capacitance line (15L)
Integrated with the line (22L) and drain line (22L)
N ⁺Drain electrode covering one end of a-Si (20)
(22D), N is connected to the display electrode (21)⁺a-Si
The source electrode (22S) covering the other end of (20)
Rain line (22L) to drain input terminal (13)
Leader line (C3) to be connected and each auxiliary capacitance line
(15L) and the contact part (CT) are commonly connected.
And a lead wire connected to the auxiliary capacitance input terminal (12)
(C2), and also Al / M on the ITO film (21LN)
An o film (22LN) is formed. And the above putter
Exposed by further etching from the
Voltage supply line (L), voltage supply pad (PD) and
And the cut portion (E) are removed by etching, and after anodic oxidation
Patterns that are no longer needed are removed. Finally, Dray
N electrode (22D) and source electrode (22S) as a mask
⁺The center part of a-Si (20) is removed by etching.
The resulting structure is shown in FIG.

In the region to the left of the dotted line X of the lead-out line (C1), hillocks are likely to occur because they are not anodized, as described above, and hillocks are generated after the step shown in FIG. Are grown, the gate insulating film (1
There is a possibility of penetrating 7). Further, the anodic oxidation of Al has a function of preventing a short circuit even if a foreign substance is present on the Al pattern, because the anodizing liquid penetrates into the lower part of the foreign substance to form an Al ₂ O ₃ insulating film. However, since the Al ₂ O ₃ insulating film is not formed in the region to the left of the dotted line X, the foreign matter remains as it is and leads to defects in the gate insulating film (17). That is, the foreign matter is removed when the resist is stripped in the photoetching process, and this becomes a hole defect. In particular, when etching is further continued after the formation of the source / drain wiring pattern as in the present embodiment, the etchant enters from the defective portion of the gate insulating film (17) due to hillocks or foreign matters, and the lower lead line ( Corrosion of C1) may cause wire breakage. As this countermeasure, in this embodiment, the area on the corresponding gate insulating film (17) on the Al ₂ O ₃ was exposed Al uncovered lead line (C1), a-Si (18
LN), SiN _x (19LN), ITO (21LN),
By sequentially laminating Al / Mo (22LN) in an island shape, the etchant is prevented from entering through the defective portion of the gate insulating film (17), and the voltage supply wiring (L, PD).
Also, the lead line (C1) is prevented from being broken when the cut portion (E) is removed by etching.

In another embodiment of the present invention, the voltage supply wiring (L, PD) for anodic oxidation is cut by laser irradiation. In this case, unlike the first embodiment, Al / Mo
The etching of (22) is performed only on the pattern formation of the source / drain wiring, and the voltage supply line (L), the voltage supply pad (PD) and the cut portion (E) are left. Then, the cut portion (E) of the auxiliary capacitance line (15L) and the portion indicated by the dotted line F of the voltage supply wiring (L) shown in FIG. 1 are formed immediately after the anodic oxidation of FIG. 17)
, Which is widely used for defect repair, either after the etching of FIG. 8 or after the Al / Mo (22) patterning of FIG.
By cutting with an AG laser or the like, unnecessary connections after anodic oxidation are cut off.

[0021]

As is apparent from the above description, the pattern required for voltage supply during anodic oxidation is removed by etching or laser irradiation after anodic oxidation, which occurs when the entire substrate is cut by mechanical means. It was possible to prevent the destruction of the TFT due to static electricity. Further, since the pattern for anodic oxidation is not restricted, the wiring pattern can be freely formed, which enables miniaturization. Further, the etching of the anodic oxidation pattern is performed at the time of patterning the source / drain wirings, so that it is not necessary to increase the number of processes.

[Brief description of drawings]

FIG. 1 is a plan view of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device according to the embodiment of the invention.

FIG. 3 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device according to the embodiment of the present invention.

FIG. 4 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device according to the embodiment of the invention.

FIG. 5 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device according to the embodiment of the invention.

FIG. 6 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device according to the embodiment of the present invention.

FIG. 7 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device according to the embodiment of the invention.

FIG. 8 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device according to the embodiment of the invention.

FIG. 9 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device according to the embodiment of the invention.

FIG. 10 is a plan view of a liquid crystal display device according to a conventional example.

FIG. 11 is an enlarged plan view of the liquid crystal display device.

12 is a line AA of FIG. 1 or FIG. 10 and FIG.
It is sectional drawing which follows the BB line of FIG.

[Explanation of symbols]

10 Transparent Substrate 11 Gate Terminal 12 Auxiliary Capacitance Input Terminal 13 Drain Input Terminal 14 Gate Wiring 15 Auxiliary Capacitance Wiring 16 Al ₂ O ₃ 17 Gate Insulating Film 18 a-Si 19 SiN _X 20 N ⁺ a-Si 21 ITO 22 Source / Drain Wiring material C1, C2, C3 Lead line L Voltage supply line PD Voltage supply pad CT Contact hole E, F Cutting part

Claims (2)

[Claims] 1. A step of forming Al or a first conductive layer containing Al as a main component on a substrate, and patterning the first conductive layer to form a gate wiring and a voltage supply wiring for anodic oxidation. A step of forming an Al ₂ O ₃ film on the surface by anodizing a predetermined region of the gate wiring, and a step of sequentially forming an insulating layer and a non-single-crystal semiconductor layer on the entire surface, By patterning the non-single-crystal semiconductor layer, forming a second conductive layer containing Al or Al as a main component on the entire surface, and patterning the second conductive layer by photoetching, the source / drain A method of manufacturing a liquid crystal display device, which comprises a step of forming wiring, wherein a predetermined portion of the voltage supply wiring is removed by etching when patterning the second conductive layer by photoetching. A method for manufacturing a liquid crystal display device, comprising: 2. A step of forming a first conductive layer containing Al or Al as a main component on a substrate, and patterning the first conductive layer to form a gate wiring and a voltage supply wiring for anodic oxidation. A step of forming an Al ₂ O ₃ film on the surface by anodizing a predetermined region of the gate wiring, and a step of sequentially forming an insulating layer and a non-single-crystal semiconductor layer on the entire surface, By patterning the non-single-crystal semiconductor layer, forming a second conductive layer containing Al or Al as a main component on the entire surface, and patterning the second conductive layer by photoetching, the source / drain A method of manufacturing a liquid crystal display device, which comprises a step of forming wiring, wherein the voltage supply wiring is cut at a predetermined portion by laser irradiation after the anodization. Build method.