JPH05309983A - Memory card - Google Patents
Memory cardInfo
- Publication number
- JPH05309983A JPH05309983A JP4119133A JP11913392A JPH05309983A JP H05309983 A JPH05309983 A JP H05309983A JP 4119133 A JP4119133 A JP 4119133A JP 11913392 A JP11913392 A JP 11913392A JP H05309983 A JPH05309983 A JP H05309983A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- semiconductor device
- resin
- memory card
- upward
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、高密度実装可能な樹脂
封止型半導体装置を用いて構成したメモリカードに関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card constructed by using a resin-sealed semiconductor device capable of high-density mounting.
【０００２】[0002]
【従来の技術】現在、広く用いられているキャッシュカ
ード、クレジットカード等は、プラスチックカードに磁
気ストライプを塗布し、これに記録された情報を読み取
ることで、本人であるか否かの確認が行なえるようにし
たものである。このような磁気記録方式のものでは、第
３者によって情報が解読され易く、記録可能な情報量が
少ない。2. Description of the Related Art Currently, widely used cash cards, credit cards, etc. can be confirmed by applying a magnetic stripe to a plastic card and reading the information recorded on the plastic card to confirm whether or not the user is the person himself / herself. It was done so. In such a magnetic recording system, information is easily deciphered by a third party, and the amount of recordable information is small.
【０００３】そこで、近年、メモリ、ＣＰＵ等の機能を
有するＩＣをカード状基体に実装した、いわゆるＩＣカ
ードが開発され、実用化されている。Therefore, in recent years, a so-called IC card in which an IC having functions such as a memory and a CPU is mounted on a card-shaped substrate has been developed and put into practical use.
【０００４】また、ＩＣのそのものの代わりに、きわめ
て薄い半導体装置を搭載したメモリカードが提案されて
いる。図１２は従来のメモリカードを示す一部破断した
斜視図である。図において、１はカバー、２はフレー
ム、３は金属シャッタ、４はその詳細を図１３および図
１４に示すように、複数個の樹脂封止型半導体装置５お
よび複数個のチップコンデンサ６を搭載したプリント基
板、７は接続パッドである。Further, a memory card has been proposed in which an extremely thin semiconductor device is mounted instead of the IC itself. FIG. 12 is a partially broken perspective view showing a conventional memory card. In the figure, 1 is a cover, 2 is a frame, 3 is a metal shutter, and 4 is the details thereof, as shown in FIGS. 13 and 14, and a plurality of resin-sealed semiconductor devices 5 and a plurality of chip capacitors 6 are mounted. The printed board, 7 is a connection pad.
【０００５】なお、前記樹脂封止型半導体装置５は図１
３に示すように、そのリード８が半田９によりプリント
基板４に固定される。The resin-encapsulated semiconductor device 5 is shown in FIG.
As shown in FIG. 3, the lead 8 is fixed to the printed circuit board 4 by the solder 9.
【０００６】また、この樹脂封止型半導体装置５は図１
４に示すように構成されており、１０はシリコン表面に
回路が形成された半導体素子、１１はこの半導体素子１
０を接着剤１２を用いて固着したダイパッドであり、図
示せぬダイパッドサポートによって支持されている。１
３は半導体素子１０上に形成されたワイヤボンディング
パッドとリード８とを電気的に接続するＡｕ線、１４は
リード８の一端が露出するように封止した封止樹脂であ
る。The resin-sealed semiconductor device 5 is shown in FIG.
4 is constituted, 10 is a semiconductor element having a circuit formed on a silicon surface, and 11 is this semiconductor element 1.
0 is a die pad fixed with an adhesive 12 and is supported by a die pad support (not shown). 1
3 is an Au wire for electrically connecting the wire bonding pad formed on the semiconductor element 10 and the lead 8 and 14 is a sealing resin sealed so that one end of the lead 8 is exposed.
【０００７】この構成による樹脂封止型半導体装置を製
造工程順に説明すると、半導体素子１０をダイパッド１
１に接着剤１２を用いて固着する。そして、この半導体
素子１０上に形成されているワイヤボンディングパッド
とリード８をＡｕ線１３により電気的に接続する。その
後、リード８の一端が露出するように、全体を封止樹脂
１４により封止する。そして、この封止樹脂１４より突
出したリード８および図示せぬダイパッドサポートを切
り曲げ加工し、樹脂封止型半導体装置を得ることができ
る。そして、このリード８を熱によってプリント基板４
に半田９で接合し、カバー１をかけることにより、一枚
のメモリカードができあがる。The resin-sealed semiconductor device having this structure will be described in the order of manufacturing steps.
It is fixed to the No. 1 using the adhesive 12. Then, the wire bonding pad formed on the semiconductor element 10 and the lead 8 are electrically connected by the Au wire 13. After that, the whole is sealed with a sealing resin 14 so that one end of the lead 8 is exposed. Then, the leads 8 protruding from the sealing resin 14 and the die pad support (not shown) are cut and bent to obtain a resin-sealed semiconductor device. Then, the leads 8 are heated to heat the printed circuit board 4
One memory card is completed by bonding the solder to the solder and the cover 1.
【０００８】この構成によるメモリカードは、ＩＣカー
ドよりはカード厚が厚くなるが、１つ１つの機能そのも
のが、樹脂封止型半導体装置５を使用していることか
ら、信頼性が高く、機械的強度も強く、また製造の容易
さから量産性もすぐれ、情報の容量が多いという利点が
ある。The memory card having this structure has a thicker card thickness than the IC card, but since each function itself uses the resin-sealed semiconductor device 5, it is highly reliable and mechanical. It has the advantages of high physical strength, excellent mass productivity due to ease of manufacturing, and a large amount of information.
【０００９】また、近年、メモリカードの発展をはじめ
として、電子機器の小型化、薄型化が進んでいるが、現
在、メモリカードに搭載されているＴＳＯＰ（Ｔｈｉｎ
−Ｓｍａｌｌ−Ｏｕｔｌｉｎｅ−Ｐａｃｋａｇｅ）、Ｔ
ＱＦＰ（Ｔｈｉｎ−Ｑｕａｄ−Ｆｌａｔ−Ｐａｃｋａｇ
ｅ）など、実装高さ１．２mmＭａｘという薄型樹脂封止
型半導体装置が主に使用されている。In recent years, electronic devices have been made smaller and thinner, including the development of memory cards. Currently, the TSOP (Thin) mounted on memory cards is being used.
-Small-Outline-Package), T
QFP (Thin-Quad-Flat-Packag
A thin resin-sealed semiconductor device having a mounting height of 1.2 mm Max such as e) is mainly used.
【００１０】また、近年メモリカードの情報量は驚異的
に伸びており、しかも、メモリカードは厚み３．３mm、
縦８５．６mm、幅５４．０mmという規格中におさまって
いる。そして、このメモリカードに搭載される半導体装
置はより薄く、ますます高密度化が進む。In recent years, the amount of information on a memory card has increased tremendously, and the memory card has a thickness of 3.3 mm.
The length is 85.6 mm and the width is 54.0 mm. The semiconductor device mounted on this memory card is thinner and the density is further increasing.
【００１１】[0011]
【発明が解決しようとする課題】しかしながら、上記構
成の樹脂封止型半導体装置およびそのメモリカードで
は、半導体装置の薄型化に伴い、それに使用されている
リードも薄くなり（０．１５mmから０．１２５mmあるい
は０．１mm）、外部リードの曲がりが生じ易く、基板実
装の妨げとなっていること、また、メモリカードの情報
量の拡大化から、半導体素子におけるメモリ容量の増加
に伴ない、素子が平面状に大きくなり、高密度化が十分
に図れないこと、という問題点があった。However, in the resin-encapsulated semiconductor device and the memory card thereof having the above structure, the leads used in the resin-sealed semiconductor device and the memory card thereof have become thinner (from 0.15 mm to 0. 125 mm or 0.1 mm), the bending of external leads is likely to occur, which hinders board mounting, and the expansion of the information amount of the memory card causes an increase in the memory capacity of the semiconductor element. There is a problem in that it becomes large in a plane and the density cannot be sufficiently increased.
【００１２】本発明は、半導体装置の平面状の拡大に伴
う実装個数の減少、および半導体装置のリード曲がりに
よる基板実装への弊害をなくすために、樹脂封止型半導
体装置のリードの形状および樹脂封止部を改良して、樹
脂封止型半導体装置の高密度な実装を可能にした優れた
メモリカードを提供することを目的とする。According to the present invention, in order to reduce the number of mounted semiconductor devices as the planar shape of the semiconductor device is enlarged and to eliminate the adverse effect on the substrate mounting due to the lead bending of the semiconductor device, the lead shape and resin of the resin-sealed semiconductor device are eliminated. It is an object of the present invention to provide an excellent memory card capable of high-density mounting of a resin-sealed semiconductor device by improving a sealing portion.
【００１３】[0013]
【課題を解決するための手段】本発明に係るメモリカー
ドの樹脂封止型半導体装置は、外部リードをカットし、
内部リードを樹脂封止部から露出することにより、内部
リードの半田付面を下側に形成した下向リード付き樹脂
封止型半導体装置と、内部リードの半田付面を上側に形
成した上向リード付き樹脂封止型半導体装置とを有する
ものである。A resin-sealed semiconductor device for a memory card according to the present invention has a structure in which an external lead is cut,
By exposing the inner leads from the resin encapsulation part, the resin-sealed semiconductor device with a downward lead in which the soldering surface of the inner lead is formed on the lower side, and the upside with the soldering surface of the inner lead formed on the upper side And a resin-sealed semiconductor device with leads.
【００１４】そして、本発明に係るメモリカードは、複
数個の下向リード付き樹脂封止型半導体装置と、複数個
の上向リード付き樹脂封止型半導体装置を対向配置し、
プリント基板の両面に設けた接合パッドに、前記下向リ
ードおよび上向リードを半田で固定し、ケースに収納す
るものである。In the memory card according to the present invention, a plurality of resin-encapsulated semiconductor devices with downward leads and a plurality of resin-encapsulated semiconductor devices with upward leads are arranged to face each other.
The downward lead and the upward lead are fixed to the bonding pads provided on both sides of the printed circuit board with solder, and then housed in a case.
【００１５】[0015]
【作用】本発明に係るメモリカード中の樹脂封止型半導
体装置はリード形状および樹脂封止部により、プリント
基板上に高密度に実装することができる。The resin-sealed semiconductor device in the memory card according to the present invention can be mounted at a high density on the printed board by the lead shape and the resin-sealed portion.
【００１６】[0016]
【実施例】図１は本発明に係るメモリカードの樹脂封止
型半導体装置の一実施例を示す断面図である。図におい
て、１５はその詳細な構成を図１（Ａ）に示すように、
内部リードの半田付面を下側にして形成した下向リード
１６を備えた下向リード付き樹脂封止型半導体装置（以
下単に下向半導体装置と言う）、１７はその詳細な構成
を図１（Ｂ）に示すように、内部リードの半田付面を上
側にして形成した上向リード１８を備えた上向リード付
き樹脂封止型半導体装置（以下単に上向半導体装置と言
う）である。1 is a sectional view showing an embodiment of a resin-sealed semiconductor device for a memory card according to the present invention. In the figure, reference numeral 15 indicates its detailed configuration as shown in FIG.
1 shows a detailed configuration of a resin-sealed semiconductor device with a downward lead (hereinafter simply referred to as a downward semiconductor device) 17 having a downward lead 16 formed with the soldering surface of the internal lead facing downward. As shown in (B), a resin-encapsulated semiconductor device with an upward lead (hereinafter simply referred to as an upward semiconductor device) having an upward lead 18 formed with the soldering surface of the internal lead facing upward.
【００１７】この構成による下向半導体装置１５および
上向半導体装置１７ではリードが外に出ない分、実装面
積を小さくすることができる。In the downward semiconductor device 15 and the upward semiconductor device 17 having this structure, the mounting area can be reduced because the leads are not exposed.
【００１８】なお、製造方法については、従来どうりの
工程により製造することができることはもちろんである
が、樹脂で形取る金型の型状を図１に示すようにし、す
べてリードカットをするだけである。Regarding the manufacturing method, it goes without saying that it can be manufactured by the same steps as in the conventional method, but the mold shape of the resin is as shown in FIG. Is.
【００１９】図２および図３は本発明に係るメモリカー
ドの一実施例を示す一部詳細な断面図およびＡ矢視方向
の断面図である。この構成によるメモリカードでは、プ
リント基板４の両面に図示せぬ接合パッドを設け、この
接合パッドに、下向半導体装置１５の下向リード１６お
よび上向半導体装置１７の上向リード１８を半田９によ
り固定するものである。この結果、実装高さが非常に低
くなるうえ、高密度でかつ薄型のメモリカードを作るこ
とができる。このとき、下向リード１６および上向リー
ド１８は、樹脂にはまっているので、リード曲りも生じ
ず、基板実装をスムーズに行なうことができる。2 and 3 are a partially detailed sectional view and a sectional view in the direction of arrow A showing an embodiment of the memory card according to the present invention. In the memory card according to this configuration, bonding pads (not shown) are provided on both surfaces of the printed circuit board 4, and the downward leads 16 of the downward semiconductor device 15 and the upward leads 18 of the upward semiconductor device 17 are soldered to the bonding pads. It is fixed by. As a result, the mounting height is extremely low, and a high-density and thin memory card can be manufactured. At this time, since the downward lead 16 and the upward lead 18 are addicted to the resin, the lead is not bent and the board can be mounted smoothly.
【００２０】また、図４〜図８はリードの基板実装時の
半田接合強度を増すための種々の方法を示す。図４
（Ａ）および図４（Ｂ）は、各リード１６の３面をむき
出しにして、若干リード強度を犠牲にし、半田接合強度
を増加させることができる。図５（Ａ）および図５
（Ｂ）は、各リード１６の側面を半分だけむき出しにし
て、半田接合強度を若干犠牲にし、リード強度を増加さ
せたものである。この図４および図５は、いずれも金型
設計で製造可能である。4 to 8 show various methods for increasing the solder joint strength when mounting the leads on the substrate. Figure 4
4A and 4B, the three surfaces of each lead 16 can be exposed to slightly sacrifice the lead strength to increase the solder joint strength. 5A and FIG.
In (B), the side surface of each lead 16 is exposed by half, and the solder joint strength is slightly sacrificed to increase the lead strength. Both FIG. 4 and FIG. 5 can be manufactured by a mold design.
【００２１】また、通常、リードは半田メッキ後に、リ
ード切り曲げが行なわれるため、切断面には半田メッキ
がされておらず、もちろん、基板実装時にも、半田はつ
かず、接合としては不十分であるため、図６に示す実施
例では、切断する部分のリード１６をハーフエッジ１６
Ａにしておき（図６（Ａ）参照）、半田メッキ後に切断
すると、リード１６の断面の半分には半田９がつき（図
６（Ｂ）参照）、接合強度を増すことができる。Also, since the leads are usually cut and bent after the solder plating, the cut surfaces are not solder-plated, and of course, solder is not attached even when mounted on the board, and the joining is insufficient. Therefore, in the embodiment shown in FIG.
When it is set to A (see FIG. 6A) and cut after solder plating, the solder 9 is attached to half of the cross section of the lead 16 (see FIG. 6B), and the bonding strength can be increased.
【００２２】同様に、半田接合形状を生む方法として、
図７を示す。この実施例では、リード切りを、リード厚
の２〜３倍長くし、後に、リードを上曲げし、半田接合
を行なう。このとき、リード厚分だけ、実装面積は大き
くなることはもちろんである。Similarly, as a method for producing a solder joint shape,
FIG. 7 is shown. In this embodiment, the lead cutting is made 2 to 3 times longer than the lead thickness, and then the leads are bent upward to perform solder joining. At this time, it goes without saying that the mounting area is increased by the lead thickness.
【００２３】図８はあらかじめ、リード１６をアップセ
ット１９（図８（Ａ）参照）することにより、そのアッ
プセット１９の部分にも半田接合（図８（Ｂ）参照）
し、強度を増すことができる。In FIG. 8, the leads 16 are upset 19 (see FIG. 8A) in advance so that the upset 19 is also soldered (see FIG. 8B).
However, the strength can be increased.
【００２４】なお、以上の説明は下向リード１６の半田
接合について説明したが、上向リード１８の半田接合に
ついても同様にできることはもちろんである。In the above description, the soldering of the downward lead 16 is described, but it goes without saying that the soldering of the upward lead 18 can be similarly performed.
【００２５】図９は本発明に係る樹脂封止型半導体装置
の他の実施例を示す断面図である。図において、２０は
その詳細な構成を図９（Ａ）に示すように、ノーマルリ
ード２１および上向リード１８を有するノーマル・上向
リード付き樹脂封止型半導体装置（以下単にノーマル・
上向半導体装置と言う）、２２はその詳細な構成を図９
（Ｂ）に示すように、上向リード１８およびノーマルリ
ード２３を有する上向・ノーマルリード付き樹脂封止型
半導体装置（以下単に上向・ノーマル半導体装置と言
う）である。FIG. 9 is a sectional view showing another embodiment of the resin-sealed semiconductor device according to the present invention. As shown in FIG. 9A, the detailed structure of the resin-encapsulated semiconductor device 20 having a normal lead 21 and an upward lead 18 is shown in FIG.
Upward semiconductor device), 22 is a detailed configuration thereof shown in FIG.
As shown in (B), an upward normal lead resin-sealed semiconductor device having an upward lead 18 and a normal lead 23 (hereinafter simply referred to as an upward normal semiconductor device).
【００２６】なお、図９（Ｃ）は下向半導体装置１５を
示し、図９（Ｄ）は上向半導体装置１７を示す。Note that FIG. 9C shows the downward semiconductor device 15, and FIG. 9D shows the upward semiconductor device 17.
【００２７】この構成によるノーマル・上向半導体装置
２０、上向・ノーマル半導体装置２２、下向半導体装置
１５および上向半導体装置１７では、リードが外へ出な
い分（当然ノーマルリード２１および２３分は除く）だ
け、実装面積を小さくすることができる。In the normal / upward semiconductor device 20, the upward / normal semiconductor device 22, the downward semiconductor device 15 and the upward semiconductor device 17 having this structure, the lead does not go out (natural leads 21 and 23, respectively). However, the mounting area can be reduced.
【００２８】なお、製造方法については、従来通りの工
程により製造することができることはもちろんである。Regarding the manufacturing method, it goes without saying that it can be manufactured by the conventional steps.
【００２９】図１０は本発明に係るメモリカードの一実
施例を示す断面図であり、図９（Ａ）〜図９（Ｄ）に示
す樹脂封止型半導体装置を搭載したメモリカードであ
る。この場合、下向半導体装置１５の下向リード１６と
上向半導体装置１７の上向リード１８とを図１１に示す
ように半田２４により互に直接接続する。この接続部分
は半導体装置外形内であるので、実装面積をおさえるこ
とができる。そして、下向半導体装置１５と上向半導体
装置１７を複数個一体に接続したものの一方に、ノーマ
ル・上向半導体装置２０を接続し、他方に、上向・ノー
マル半導体装置２２を接続し、プリント基板４に固定す
るものである。このとき、下向リード１６とその上部の
封止樹脂１４の厚さと、上向リード１８とその下部の封
止樹脂１４の厚さをたした厚さが樹脂封止型半導体装置
１５，１７の厚さと同一になる様にすれば、無駄な空間
が減少して、必要最小限の厚さで実装することができ
る。FIG. 10 is a sectional view showing an embodiment of the memory card according to the present invention, which is a memory card on which the resin-sealed semiconductor device shown in FIGS. 9A to 9D is mounted. In this case, the downward lead 16 of the downward semiconductor device 15 and the upward lead 18 of the upward semiconductor device 17 are directly connected to each other by solder 24 as shown in FIG. Since this connecting portion is within the outer shape of the semiconductor device, the mounting area can be suppressed. Then, the normal / upward semiconductor device 20 is connected to one of the plurality of downward semiconductor devices 15 and the upward semiconductor device 17 which are integrally connected, and the upward / normal semiconductor device 22 is connected to the other of the one, and the print is performed. It is fixed to the substrate 4. At this time, the sum of the thicknesses of the downward leads 16 and the encapsulating resin 14 above them and the thickness of the upward leads 18 and the encapsulating resin 14 below them is the same as that of the resin-encapsulated semiconductor devices 15 and 17. If the thickness is made the same, the wasted space is reduced, and the mounting can be performed with the minimum necessary thickness.
【００３０】このように、メモリカードに多数の樹脂封
止型半導体装置を実装することができるので、容量を大
幅に増加することができる。As described above, since a large number of resin-sealed semiconductor devices can be mounted on the memory card, the capacity can be greatly increased.
【００３１】[0031]
【発明の効果】以上詳細に説明したように、本発明に係
る樹脂封止型半導体装置を使用したメモリカードによれ
ば、内部リードの上側あるいは下側の封止樹脂部を取り
除き、むき出しになった内部リードの下側あるいは上側
を半田付面として形成した樹脂封止型半導体装置、ある
いは、一方がノーマルリードで、他方が内部リードであ
る樹脂封止型半導体装置により、プリント基板への実装
時のリード曲りをなくすことができ、スムーズにかつ確
実に実装することができる。しかも、これらの樹脂封止
型半導体装置をプリント基板に実装し、メモリカードと
したとき、その厚さを、より薄くすることができ、しか
も高密度化することができるなどの効果がある。As described above in detail, according to the memory card using the resin-encapsulated semiconductor device of the present invention, the encapsulating resin portion on the upper side or the lower side of the inner lead is removed to expose it. When mounted on a printed circuit board with a resin-sealed semiconductor device in which the lower side or upper side of the internal lead is formed as a soldering surface, or a resin-sealed semiconductor device in which one is a normal lead and the other is an internal lead The lead bending can be eliminated, and the mounting can be performed smoothly and surely. Moreover, when these resin-encapsulated semiconductor devices are mounted on a printed circuit board and used as a memory card, the thickness of the memory card can be further reduced and the density can be increased.
【図１】本発明に係るメモリカードの樹脂封止型半導体
装置の一実施例を示す断面図である。FIG. 1 is a sectional view showing an embodiment of a resin-sealed semiconductor device of a memory card according to the present invention.
【図２】本発明に係るメモリカードの一実施例を示す一
部詳細な断面図である。FIG. 2 is a partially detailed sectional view showing an embodiment of a memory card according to the present invention.
【図３】図２のＡ矢視方向の断面図である。FIG. 3 is a cross-sectional view taken along arrow A in FIG.
【図４】図２における半田接合部の他の例を示す要部断
面図である。FIG. 4 is a cross-sectional view of an essential part showing another example of the solder joint part in FIG.
【図５】図２における半田接合部の更に他の例を示す要
部断面図である。5 is a cross-sectional view of a main part showing still another example of the solder joint part in FIG.
【図６】図２における半田接合部の更に他の例を示す要
部断面図である。FIG. 6 is a cross-sectional view of a main portion showing still another example of the solder joint portion in FIG.
【図７】図２における半田接合部の更に他の例を示す要
部断面図である。7 is a cross-sectional view of a main part showing still another example of the solder joint part in FIG.
【図８】図２における半田接合部の更に他の例を示す要
部断面図である。FIG. 8 is a cross-sectional view of a main portion showing still another example of the solder joint portion in FIG.
【図９】本発明に係るメモリカードの樹脂封止型半導体
装置の他の実施例を示す断面図である。FIG. 9 is a cross-sectional view showing another embodiment of the resin-sealed semiconductor device of the memory card according to the present invention.
【図１０】本発明に係るメモリカードの他の実施例を示
す要部断面図である。FIG. 10 is a cross-sectional view of essential parts showing another embodiment of the memory card according to the present invention.
【図１１】図１０の一部詳細な断面図である。11 is a partially detailed cross-sectional view of FIG.
【図１２】従来のメモリカードの一部破断した斜視図で
ある。FIG. 12 is a partially cutaway perspective view of a conventional memory card.
【図１３】図１２の一部詳細な断面図である。13 is a partial detailed cross-sectional view of FIG.
【図１４】図１２の樹脂封止型半導体装置の断面図であ
る。14 is a sectional view of the resin-sealed semiconductor device of FIG.
１５ 下向リード付き樹脂封止型半導体装置 １６ 下向リード １７ 上向リード付き樹脂封止型半導体装置 １８ 上向リード ２０ ノーマル・上向リード付樹脂封止型半導体装置 ２１ ノーマルリード ２２ 下向・ノーマルリード付樹脂封止型半導体装置 ２３ ノーマルリード 15 resin-encapsulated semiconductor device with downward lead 16 downward lead 17 resin-encapsulated semiconductor device with upward lead 18 upward lead 20 normal / resin-encapsulated semiconductor device with upward lead 21 normal lead 22 downward- Resin-sealed semiconductor device with normal lead 23 Normal lead
Claims (1)
部リードと上向リード付樹脂封止型半導体装置の内部リ
ードを接合し、ケースに収納したメモリカードにおい
て、前記内部リードが接合された部分の厚さが、前記下
向リード付樹脂封止型半導体装置あるいは前記上向リー
ド付樹脂封止型半導体装置の厚さと同一であることを特
徴とするメモリカード。1. An inner lead of a resin-encapsulated semiconductor device with a downward lead and an inner lead of a resin-encapsulated semiconductor device with an upward lead are joined together, and the inner lead is joined in a memory card housed in a case. 2. A memory card, wherein the thickness of the open portion is the same as the thickness of the downward lead resin-sealed semiconductor device with leads or the upward lead resin-sealed semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11913392A JP3170519B2 (en) | 1992-05-12 | 1992-05-12 | Memory card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11913392A JP3170519B2 (en) | 1992-05-12 | 1992-05-12 | Memory card |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05309983A true JPH05309983A (en) | 1993-11-22 |
| JP3170519B2 JP3170519B2 (en) | 2001-05-28 |
Family
ID=14753757
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11913392A Expired - Fee Related JP3170519B2 (en) | 1992-05-12 | 1992-05-12 | Memory card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3170519B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6208021B1 (en) | 1996-03-27 | 2001-03-27 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method thereof and aggregate type semiconductor device |
| KR20030024553A (en) * | 2001-09-18 | 2003-03-26 | 미쓰비시덴키 가부시키가이샤 | Semiconductor device |
-
1992
- 1992-05-12 JP JP11913392A patent/JP3170519B2/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6208021B1 (en) | 1996-03-27 | 2001-03-27 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method thereof and aggregate type semiconductor device |
| US6403398B2 (en) | 1996-03-27 | 2002-06-11 | Oki Electric Industry Co, Ltd. | Semiconductor device, manufacturing method thereof and aggregate type semiconductor device |
| KR20030024553A (en) * | 2001-09-18 | 2003-03-26 | 미쓰비시덴키 가부시키가이샤 | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3170519B2 (en) | 2001-05-28 |
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