JPH0529768A - Multilayer wiring structural member - Google Patents

Abstract

PURPOSE:To facilitate working and enhance the connection reliability of viaholes by printing solder paste in a viahole formed in a multilayer wiring structural member having a wiring layer on both sides of an insulation layer and connecting both wiring layers. CONSTITUTION:After a first wiring layer 4 is installed on the top of a polyimide film insulation layer 5, a viahole 1 is bored based on a mold press opening method. Then, a second wiring layer 7 of 42 alloy is pasted on the bottom of the insulation layer 5 by way of an epoxy adhesive layer 6. The wiring layers 4 and 7 are connected by forming a solder paste printing layer 8 on the viahole 1. This construction makes it possible to manufacture multilayer wiring structural members efficiently and improve the reliability by thermal stress at the joints of the viahole and reduce electric resistance in the joints as well.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a connection structure for via holes formed in a multi-layer wiring FPC, a multi-layer wiring board, or the like.

[0002]

2. Description of the Related Art Recently, in response to the speeding up of ICs, multilayer wiring structures have come to be used in wiring boards such as TAB tapes and FPCs from the viewpoint of improving transmission speed and reducing noise. In such a multilayer wiring structure, a signal layer is provided on the upper surface of an insulating layer such as a polyimide film, and a power supply layer is provided on the lower surface, but via holes are formed for the purpose of taking wiring from the power supply layer on the lower surface. It is provided.

As a means for electrically connecting such layers electrically via a via hole, a plating method and a vapor deposition method have been conventionally known.

The plating method uses electroplating or electroless plating to form a plating 2 having a thickness of about 5 to 10 μm in the direction perpendicular to the inner wall of the via hole 1 as shown in FIG. There is a method of printing a plating resist on a portion other than the hole portion to plate only the via hole portion, or a method of removing an excessive portion of the plating film by photoetching after the entire surface is plated. In this case, electroplating of copper takes 5 to 10 minutes, electroless plating takes 1 to 2 hours, and since it is carried out by a wet method, ionic substances remain in via holes and layers, causing migration and wiring corrosion. There are problems that it is a cause, that the plating layer is thin, and that it is vulnerable to heat stress, and that the electrical resistance of the connecting portion is high and the transmission characteristics deteriorate.

Further, the vapor deposition method includes an ion plating method, a sputtering method and the like. As shown in FIG. 3, the vapor deposition mask 11 is used to perform vapor deposition 3 on the via hole portion, or
Alternatively, as in the plating method, after the entire surface is vapor-deposited, the excess portion is removed by the photoetching method. In this method, it takes 4 to 5 hours to deposit a film having a thickness of 5 to 10 μm, an evaporation mask is expensive, and expensive evaporation equipment is required. There are problems that the connecting part is weak against heat stress and has high electric resistance.

[0006]

In view of the above-mentioned problems of the prior art relating to the connection of via holes, there has been a demand for a method which is highly reliable and can be easily connected. The present invention meets these needs.

An object of the present invention is to realize connection of via holes by printing a solder paste, and to provide a multilayer wiring structure which is extremely easy to process and has high reliability of via hole connection. is there.

[0008]

To achieve the above object, according to the present invention, a solder paste is printed on a via hole formed in a multilayer wiring structure having wiring layers on both sides of an insulating layer. Provided is a multilayer wiring structure formed by connecting both wiring layers. Hereinafter, the present invention will be described in more detail.

FIG. 1 is a sectional view showing an example of a connection structure of a multilayer wiring structure of the present invention. An FPC will be described below as a typical example of the multilayer wiring structure, but the present invention is not limited to this.

In the present invention, the insulating layer 5 may be a polyimide film, but is not limited thereto. The thickness of this insulating layer is not limited, but is 25 μm, for example.
It is a degree.

A first wiring layer 4 and a second (back surface) wiring layer 7 are provided on both surfaces of the insulating layer 5. As the first wiring layer 4, for example, copper having a thickness of about 20 μm can be used.

Normally, with the first wiring layer 4 provided on the insulating layer 5, the via hole 1 is opened by, for example, a die press opening method. Then, for example, 42 alloy (42
% Ni—Fe alloy) is attached to form a structure. The second wiring layer 7 is attached, for example, via the epoxy adhesive layer 6. The via hole 1
The size may be set to an appropriate size in consideration of wiring work and the like, and is usually about 0.5 mmΦ.

In the present invention, the wiring layers 4 and 7 are connected to each other by forming the solder paste printed layer 8 in the via hole 1. As a printing method of the solder paste, for example, a method of using a metal mask and screen printing in accordance with the via hole can be mentioned. The thickness of the printed layer 8 is not limited, but if it is about 20 μm after curing, there is no problem in terms of electric resistance and mechanical strength. The solder paste is usually used by mixing it with a mixed resin of an epoxy resin and a curing agent, and is subjected to heat curing treatment after printing. The solder powder may be, for example, 60% Sn-Pb and about 2-3 μm Φ.

[0014]

EXAMPLES The present invention will be specifically described below based on examples.

(Embodiment 1) Multilayer wiring F having the structure shown in FIG.
Created a PC. The multilayer wiring FPC used has a thickness of 25 μm.
20 μm thick on the upper surface of the polyimide film insulating layer 5 of
Copper first wiring layer 4 is provided, a via hole of 0.5 mmΦ is opened by a die press opening method, and then a thickness of 20 μm is formed on the lower surface.
m having a thickness of 25 μm through the epoxy adhesive layer 6
Alloy 7 (second wiring layer) was attached. Next, use a metal mask to match the solder paste to the via holes,
Printed to a thickness of 25 μm. Solder paste is 6 μm of 2-3 μmΦ for mixed resin of epoxy resin and curing agent.
25% after printing with a mixture of 0% Sn-Pb solder powder
It was heat-cured at 0 ° C. for 5 hours. Printed layer 8 after curing
Had a thickness of 20 μm. Table 1 shows the results of the characteristic test of the via hole connecting portion.

(Embodiment 2) The same operation as in Embodiment 1 is carried out except that the opening diameter of the via hole is changed to 0.2 mmΦ. Table 1 shows the characteristics test results of the via hole connection part.
Shown in.

(Comparative Example 1) Multilayer wiring structures having the same via holes as in Example 1 were connected by electroless copper plating (see FIG. 2).

(Test method) Temperature cycle (heat stress)
According to the EIAJ standard, a multi-layer wiring FPC having test via holes connected was kept at -50 ° C for 5 hours using a temperature cycle tester, and then heated to 150 ° C at a heating rate of 10 minutes.
Keep time Then, the temperature is lowered to −50 ° C. for 10 minutes.
This is performed for 500 cycles, and the number of samples in which the connection is broken is examined for 20 tests.

Change in DC resistance value of via-hole connection part The resistance value after connection and the resistance value (Ω) after 100 hours of holding in an atmosphere of 65 ° C. and 95% relative humidity are shown. It is an average value.

[0020]

[0021]

Since the present invention is constructed as described above, the multilayer wiring structure provided by the present invention employs a solder paste printing method for connecting via holes, which is very efficient. It can be manufactured well. Further, unlike the plating method, there is no possibility of invasion of ionic impurities, the reliability due to the thermal stress at the connecting portion of the via hole is good, and the electrical resistance of the connecting portion is small.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing an example of a connection structure of a multilayer wiring structure of the present invention.

FIG. 2 is a cross-sectional view showing a connection structure by a conventional method (plating method).

FIG. 3 is a cross-sectional view showing a connection structure by a conventional method (vapor deposition method).

[Explanation of symbols]

 1 Via Hole 2 Via Hole Connection Layer (Plating) 3 Via Hole Connection Layer (Evaporation) 4 First Wiring Layer 5 Insulating Layer 6 Adhesive Layer 7 Second (Backside) Wiring Layer 8 Solder Paste Printed Layer

Claims (1)

Claim: What is claimed is: 1. A multilayer wiring comprising a wiring layer having wiring layers on both sides of an insulating layer, the wiring layer being connected to each other by printing solder paste in via holes formed in the multilayer wiring structure. Structure.