JPH05259758A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To widen the adjustment range of a set voltage by connecting a variable current source of the current mirror circuit to a connecting point between 1st and 2nd TRs so as to prevent an input current from being saturated even when the set voltage of the variable current source is changed widely. CONSTITUTION:A variable current source 2 is connected to a connecting point between transistors (TRs) Q3, Q1 in the current mirror circuit. A voltage of a variable voltage source 5 of the variable current source 2 is set to an optional voltage VC and the voltage VC is inputted to a base of the TRQ5. When the set voltage VC of the voltage source 5 is changed, a current IC flowing to the TRQ5 is changed. The current IC flowing to the TRQ5 is a current flowing to the variable current source 2 and an input current Iin of the current mirror circuit is changed through the chance in the current IC. An output current Iout of the current mirror circuit changes in response to the change. That is, the output current Iout is chanted by changing the set voltage VC of the voltage source 5. Since the collector of the TRQ5 is connected to a connecting point between the TRs Q3, Q1, the saturation of the TRQ5 is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current mirror circuit capable of passing the same output current as an input current.

[0002]

2. Description of the Related Art An example of a conventional general current mirror circuit is shown in FIG. In FIG. 6, a transistor Q1 is connected between a power supply Vcc and the ground via a fixed current source 1 in series, and a transistor Q2 is connected via a current meter 3 as a load and as an output means in series. It is connected. The transistors Q1 and Q2 are PNP type,
The bases are connected together, and the base of the transistor Q2 and the collector of the transistor Q1 are connected. As a result, the transistor Q1 is diode-connected, and the transistor Q1 and the transistor Q2 form a current mirror circuit.

Here, the current amplification factor hfe of all the transistors Q1 and Q2 is set to 10, and each of the transistors Q1 and Q2.
The operation of the current mirror circuit will be described on the assumption that the characteristics of 2 are the same. Assuming that the emitter current flowing from the power supply Vcc to each of the transistors Q1 and Q2 is I, the base current of each of the transistors Q1 and Q2 is I / 10, and the collector current is I- (I / 10). Each transistor Q1,
Since the base current of Q2 flows through the fixed current source 1 together with the collector current of the transistor Q1, the input current Iin, which is the current flowing through the fixed current source 1, becomes I + (I / 10).
On the other hand, the collector current of the transistor Q2 flows through the ammeter 3 as the output current Iout. Therefore, looking at the input / output error Iout-Iin of this current mirror circuit, Iout-Iin = -2I / 10. The input / output error of this current mirror circuit is -2I.
/ 10, which is relatively large.

Therefore, as an example of a high precision current mirror circuit in which the input / output error is reduced, there is one as shown in FIG. In FIG. 7, between the power supply Vcc and the ground,
The first transistor Q3 and the second transistor Q1 are connected in series, and the third transistor Q4 and the fourth transistor Q2 are connected in series. A fixed current source 1 is connected to the lines on the first and second transistors Q3 and Q1 side, and a current as a load and an output means is connected to the lines on the third and fourth transistors Q4 and Q2 sides. A total of 3 are connected. Each transistor Q
3, Q1, Q4 and Q2 are of PNP type, the base and collector of the third transistor Q4 are connected to the base of the first transistor Q3, and the base and collector of the second transistor Q1 are connected to the base of the fourth transistor Q2. The base is connected. As a result, the third transistor Q4 and the second transistor Q1 are diode-connected. The first and third transistors Q3 and Q4 form a current mirror circuit for improving accuracy, and the second and fourth transistors Q1 and Q2 form an original current mirror circuit.

Here again, all transistors Q1, Q
The operation of the current mirror circuit will be described assuming that the current amplification factors hfe of 2, Q3 and Q4 are 10 and the characteristics of the transistors Q1, Q2, Q3 and Q4 are the same.
Assuming that the emitter current flowing from the power source Vcc to each of the transistors Q3 and Q4 is I, the base current of each of the transistors Q3 and Q4 is I / 10 and the collector current is I- (I / 10).
Becomes The base current of each of the transistors Q3 and Q4 flows into the transistor Q2 together with the collector current of the transistor Q4, and the emitter current of the transistor Q2 is I + (I / 1
0). On the other hand, the base current of the transistor Q1 is {I- (I / 10)} / 10 and the collector current is I- (I
/ 10)-{I- (I / 10)} / 10, and the base current of the transistor Q2 is {I + (I / 10)} / 10.
Becomes The sum of the base currents of the transistors Q1 and Q2 is 2I / 10.
Since the collector current of No. 1 flows into the fixed current source 1, the input current Iin that is the current flowing through the fixed current source 1 is I + (I /
10)-{I- (I / 10)} / 10 = I + (I / 10
0). On the other hand, the collector current of the transistor Q2 is I + (I / 10)-{I + (I / 10)} / 10 = I-
(I / 100), and this collector current is the output current I
It flows to the ammeter 3 as out. Therefore, looking at the input / output error Iout-Iin of this current mirror circuit, Iout-Iin = {I- (I / 100)}-{I + (I / 100)} =-2I / 100, which is shown in FIG. It can be seen that the input / output error of the current mirror circuit is 1/10 and the accuracy is improved.

There is also an example in which the output current is made variable by changing the input current in addition to improving the accuracy as in the example shown in FIG. The example shown in FIG. 8 is that in which the variable current source 2 is added to the example shown in FIG. The variable current source 2 has an NPN transistor Q5, a resistor R1, and a variable resistor VR1 as a variable voltage source. The variable resistor VR1 divides the power supply voltage Vcc into an arbitrary voltage Vc and inputs it to the base of the transistor Q5. The collector of the transistor Q5 is connected to the connection point between the collector of the fourth transistor Q1 and the fixed current source 1, and the emitter is connected to the ground via the resistor R1. The input current Iin of the current mirror circuit is the current I ₀ flowing through the fixed current source 1 and the transistor Q in the variable current source 2.
5 is the sum of the current Ic flowing in the collector of 5, that is, Ii
n = I ₀ + Ic. Therefore, when the variable resistance VR1 is changed to change the voltage Vc, the collector current Ic of the transistor Q5 changes, the input current Iin of the current mirror circuit changes in proportion to the voltage Vc, and the output current Iout thereof also changes. It will change according to the current Iin.

[0007]

According to the conventional current mirror circuit as shown in FIG. 8, the error between the input current and the output current can be suppressed to be small, and a highly accurate current mirror circuit can be provided. it can. However, before the set voltage Vc of the variable current source 2 reaches the power supply voltage Vcc, the transistor Q5 becomes saturated and the input current Iin
Is no longer proportional to the set voltage Vc, and as shown in FIG.
Before the power supply voltage Vcc, the voltage starts to decrease and the circuit operation is hindered. The reason why the transistor Q5 that constitutes the variable current source 2 is saturated in this way is that its collector is connected to the point a, which is a connection point with the collector of the second transistor Q1. That is, when the base-emitter voltage of each transistor is Vbe, there is a potential difference of 2Vbe with respect to the power supply voltage Vcc at point a, and the set voltage Vc which is the base voltage of the transistor Q5 is Vbe.
When it reaches cc-Vbe, the collector-emitter voltage (Vce) of the transistor Q5 becomes almost zero, and the transistor Q5 is saturated.

The present invention has been made to solve the above-mentioned problems of the prior art. The output current can be made variable by connecting a variable current source to the input side, and the error of the input / output current can be reduced. In the miniaturized high-precision current mirror circuit, even if the set voltage of the variable current source is almost equal to the power supply voltage, the input current will not be saturated and the adjustment range of the set voltage can be widened. An object of the present invention is to provide a current mirror circuit that can be used.

[0009]

In order to achieve the above object, the present invention provides a base for a first transistor, a second transistor connected in series with the first transistor, and a base for the first transistor. A third transistor having a collector connected to the third transistor, a fourth transistor connected in series to the third transistor and having a base connected to the base and collector of the second transistor, and first and second
In a current mirror circuit comprising a fixed current source and a variable current source connected to the line on the transistor side, and output means connected to the third and fourth transistor side lines. It was connected to the connection point between the first transistor and the second transistor. As the variable current source, a variable current source in which the input current is changed by changing the voltage can be used.

[0010]

By connecting the variable current source to the connection point between the first transistor and the second transistor, the input current is not saturated even if the set voltage of the variable current source is almost equal to the power supply voltage. Absent.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a current mirror circuit according to the present invention will be described below with reference to FIGS. 1 to 5, but for the sake of easy understanding, it has the same structure as that of the conventional example shown in FIG. The parts will be denoted by the same reference numerals.

In FIG. 1, a first transistor Q3 and a second transistor Q1 are connected in series, and a third transistor Q4 and a fourth transistor Q2 are connected in series between a power supply Vcc and the ground. It is connected. A fixed current source 1 is connected to the lines on the first and second transistors Q3 and Q1 side, and a current as a load and an output means is connected to the lines on the third and fourth transistors Q4 and Q2 sides. A total of 3 are connected. Each of the transistors Q3, Q1, Q4, Q2 is of PNP type, and the third transistor Q is provided on the base of the first transistor Q3.
The base and collector of the fourth transistor Q2 are connected to each other, and the base and collector of the second transistor Q1 are connected to the base of the fourth transistor Q2. As a result, the third transistor Q4 and the second transistor Q1 are diode-connected. The first and third transistors Q3 and Q4 form a current mirror circuit for improving accuracy, and the second and fourth transistors Q1 and Q2 form an original current mirror circuit.

In such a current mirror circuit,
The variable current source 2 is connected to a connection point between the first transistor Q3 and the second transistor Q1. The variable current source 2 has an NPN transistor Q5, a resistor R1, and a variable voltage source 5. The variable voltage source 5 is an arbitrary voltage V
c, and this set voltage Vc is input to the base of the transistor Q5. The collector of the transistor Q5 is connected to the connection point between the collector of the first transistor Q3 and the emitter of the second transistor Q1, and the emitter of the transistor Q5 is connected to the ground via the resistor R1.

The variable voltage source 5 is, as shown in FIG.
It may be configured by a variable resistor VR1 that divides the power supply voltage Vcc, and the voltage Vc divided by the variable resistor VR1 may be input as a set voltage to the base of the transistor Q5.

Next, all the transistors Q1, Q2, Q
The operation of the above embodiment will be described assuming that the current amplification factors hfe of Q3 and Q4 are 10 and the characteristics of the transistors Q1, Q2, Q3 and Q4 are the same. Assuming that the emitter current flowing from the power supply Vcc to each of the transistors Q3 and Q4 is I, the base current of each of the transistors Q3 and Q4 is I / 1.
0, the collector current is I- (I / 10). The base current of each of the transistors Q3 and Q4 flows into the transistor Q2 together with the collector current of the transistor Q4, and the emitter current of the transistor Q2 becomes I + (I / 10). Since the collector current of the transistor Q3 is shunted to the transistor Q5 of the variable current source 2, assuming that this shunt current is Ic, the emitter current of the transistor Q1 is I- (I / 1
0) -Ic, base current is {I- (I / 10) -Ic}
/ 10, collector current is I- (I / 10) -Ic- {I
-(I / 10) -Ic} / 10. On the other hand, the base current of the transistor Q2 becomes {I + (I / 10)} / 10. The total of the base currents of the transistors Q1 and Q2 is (2I-Ic) / 10, and the collector current of the transistor Q1 flows into the fixed current source 1 together with this current.

Input current Iin of this current mirror circuit
Is the sum of the current I ₀ flowing through the fixed current source 1 and the current Ic flowing through the variable current source 2. _{Thus, Iin = I 0 + Ic =} I- (I / 10) -Ic- {I- (I / 10) -Ic} / 10 + {(2I-Ic) / 10} + Ic = I + {2I-Ic-I −I + (I / 10) + Ic} / 10 = I + (I / 100). On the other hand, the collector current of the transistor Q2 serves as the output current Iout of the current mirror circuit and is measured by the ammeter 3
Iout = I + (I / 10)-{I + (I / 10)} / 10 = I + (I / 10)-(I / 10)-(I / 100) = I- (I / 100) Becomes Therefore, looking at the input / output error Iout-Iin of the current mirror circuit, Iout-Iin = {I- (I / 100)}-{I + (I / 100)} =-2I / 100, which is shown in FIG. It can be seen that the accuracy is maintained as high as that of the conventional high-precision current mirror circuit.

In the above embodiment, when the set voltage Vc of the variable voltage source 5 is changed, the current Ic flowing through the transistor Q5 changes. Current Ic flowing in transistor Q5
Is a current flowing through the variable current source 2, and the input current Iin of the current mirror circuit is changed by changing the current Ic.
Changes, and the output current Iout of the current mirror circuit also changes in accordance with this change. That is, the output current Iout can be changed by changing the set voltage Vc of the variable voltage source 5.

According to the above-described embodiment, the collector of the transistor Q5 constituting the variable current source 2 is connected to the connection point between the first transistor Q3 and the second transistor Q1. This voltage has a potential difference of Vbe with respect to the power supply voltage Vcc, and the saturation of the transistor Q5 can be prevented even if the set voltage Vc is increased to about the power supply voltage Vcc.
Therefore, as shown in FIG. 3, the input current Iin changes linearly until the set voltage Vc becomes almost the power supply voltage Vcc, and the adjustable range of the set voltage Vc of the variable current source 2 can be expanded. it can.

In the embodiment described above, the first to fourth transistors Q3, Q1, Q4 and Q2 are of PNP type and the transistor Q5 constituting the variable current source is of NPN type. However, the current mirror circuit according to the present invention can be configured even if the two are opposite. Therefore, the components shown in FIG. 4 correspond to the components of the embodiment shown in FIG. In FIG. 4, between the power supply Vcc and the ground,
The fixed current source 1, the second transistor Q1, and the first transistor Q3 are connected in series to configure the input side, and the ammeter 3 as the output means and the fourth transistor Q3.
The second and third transistors Q4 are connected in series to form the output side. The variable current source 2 is connected to a connection point between the second transistor Q1 and the first transistor Q3. The variable current source 2 includes a variable resistor VR1 for dividing the power supply voltage Vcc and a transistor Q5 whose divided voltage by the variable resistor VR1 is input to the base as a set voltage Vc.
And a resistor R1 connected between the emitter of the transistor Q5 and the power supply Vcc, and the collector of the transistor Q5 is connected to the connection point of the transistors Q1 and Q3.

Also in the case of the embodiment shown in FIG. 4, the same operation as that of the embodiment shown in FIG. 1 can be performed, and a highly accurate current mirror circuit having a small error between the input current and the output current can be obtained and the set voltage can be reduced. The output current can be made variable by adjusting Vc. Further, even if the set voltage Vc is varied over a wide range, the transistor Q that constitutes the variable current source 2
5, the input current Iin can be linearly changed with respect to the set voltage Vc as shown in FIG.

[0021]

According to the present invention, the first transistor, the second transistor connected in series to the first transistor, and the third transistor having the base and collector connected to the base of the first transistor. A fourth transistor connected in series to the third transistor and having a base connected to the base and collector of the second transistor; and a fixed current source connected to the lines on the first and second transistor sides. In a current mirror circuit comprising a variable current source and an output means connected to the lines on the side of the third and fourth transistors, the variable current source is connected to the first
Since it is connected to the connection point between the transistor and the second transistor, the setting voltage adjustment range of the variable current source can be widened, the input can be widely varied, and the input / output current accuracy can be maintained high.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a current mirror circuit according to the present invention.

FIG. 2 is a circuit diagram showing a specific example of a variable current source applicable to the current mirror circuit of the above.

FIG. 3 is a diagram showing a relationship between a set voltage and an input current in the above embodiment.

FIG. 4 is a circuit diagram showing another embodiment of the current mirror circuit according to the present invention.

FIG. 5 is a diagram showing a relationship between a set voltage and an input current according to the above embodiment.

FIG. 6 is a circuit diagram showing an example of a conventional current mirror circuit.

FIG. 7 is a circuit diagram showing another example of a conventional current mirror circuit.

FIG. 8 is a circuit diagram showing still another example of a conventional current mirror circuit.

FIG. 9 is a diagram showing a relationship between a set voltage and an input current of the conventional current mirror circuit of the above.

[Explanation of symbols]

 Q3 first transistor Q1 second transistor Q4 third transistor Q2 fourth transistor 1 fixed current source 2 variable current source 3 output means

Claims (2)

[Claims] 1. A first transistor, a second transistor connected in series with the first transistor, a third transistor having a base and a collector connected to the base of the first transistor, and the third transistor. A fourth transistor connected in series to the third transistor and having a base connected to the base and collector of the second transistor, a fixed current source connected to the first and second transistor side lines, and a variable A current source, and the third and fourth
A current mirror circuit comprising an output means connected to a line on the transistor side of the current mirror circuit, wherein the variable current source is connected to a connection point between the first transistor and the second transistor. .. 2. The current mirror circuit according to claim 1, wherein a variable current source capable of changing an input current by changing a voltage is used.