JPH0238484Y2 - - Google Patents

Description

[Detailed Description of the Invention] (A) Field of Industrial Application The present invention relates to a current mirror circuit, and particularly to a current mirror circuit that can obtain an output current that corresponds to an input current with high precision.

(b) Prior Art A basic current mirror circuit is shown in FIG. The current mirror circuit in Figure 1 is
A current flows through an input current source 3 connected to the collector of the first transistor 1, consisting of a diode-connected first transistor 1 and a second transistor 2 whose base and emitter are commonly connected to the first transistor 1. , is supplied from the collector of the second transistor 2 to the load resistor 4. Therefore, in the case of FIG. 1, if the current flowing to the input current source 3 is Iin, the output current flowing to the load is _I0 , and the current amplification factor β of the first and second transistors 1 and 2 is β≫2, then The output current I ₀ is I ₀ ≈(1-2/β)Iin (1). As is clear from equation (1), in the current inverting circuit shown in _FIG . A mismatch occurs, and this mismatch becomes larger as β becomes smaller, which is not preferable.

FIG. 2 shows a current mirror circuit designed to improve the mismatch of the current mirror circuit shown in FIG. In the case of FIG. 2, in order to prevent the adverse effects of the base currents of the first and second transistors 1 and 2,
A third transistor 5 is arranged whose emitter is connected to the base of the first transistor 1 and whose base is connected to the collector of the first transistor 1. As a result, the current flowing to the input current source 3 is transferred to Iin and to the load resistor 4. If the flowing current is I ₀ and the current amplification factor of the first to third transistors 1 to 5 is β, the output current I ₀ becomes I ₀ ≒ (1-2/β ² )Iin (2) . Therefore, in the case of FIG. 2, the mismatch between the input current Iin and the output current I ₀ is 2/β ² Iin, which is improved to 1/β compared to FIG. 1.

The current mirror circuit shown in FIG. 2 is widely used because of its improved matching as described above. However, when the current mirror circuit is used in a signal transmission path, improving the degree of matching by about 1/β has the disadvantage that the signal is distorted and the frequency characteristics are deteriorated. Further, if the degree of matching is improved too much, there is a risk of oscillation depending on the circuit design. Taking these points into consideration, a current mirror circuit having an appropriate degree of improvement has been desired.

(c) Purpose of the invention The present invention was developed in view of the above points, and it is possible to obtain an output current that accurately corresponds to the input current, and also to maintain a matching relationship between the input current and the output current. It is an object of the present invention to provide a current reversal circuit that can be easily adjusted.

(d) Configuration of the invention The current inversion circuit according to the invention includes first and second transistors whose bases and emitters are commonly connected, and a third transistor forming a base current path of the first and second transistors. a diode-connected fourth transistor having an emitter-collector path connected in series with the emitter-collector path of the third transistor; a base and an emitter of the fourth transistor are commonly connected; and a fifth transistor connected between the common base of the second transistor and ground.

(e) Embodiment Figure 3 is a circuit diagram showing an embodiment of the present invention.
6 and 7 have the base and emitter commonly connected
PNP-type first and second transistors; 8 is a third PNP-type transistor whose emitter is connected to the common base of the first and second transistors 6 and 7; and whose base is connected to the collector of the first transistor 6; 9 is a fourth NPN type transistor whose collector is connected to the collector of the third transistor 8 and whose emitter is connected to the ground, and whose base is connected to its own collector to form a diode connection; 10 is a base and emitter connection; a fifth transistor whose collector is commonly connected to the base and emitter of the fourth transistor 9 and whose collector is connected to the common base of the first and second transistors 6 and 7; 11 is connected to the collector of the first transistor 6; and a load resistor 12 connected to the collector of the second transistor 7.

Now, the current flowing through the input current source 11 is Iin,
PNP type first, second and third transistors 6;
If the current amplification factors of the transistors 7 and 8 are β ₁ and the current amplification factors of the fourth and fifth NPN transistors 9 and 10 are β ₂ , then the emitter current I ₁ of the third transistor 8 and the collector current of the fifth transistor 10 are The relationship with the current I ₄ is I ₁ + I ₄ = 2I _B (3) (where I _B is the base current of the first and second transistors 6 and 7), and the collector current of the third transistor 8
I ₃ and the collector current I ₄ of the fifth transistor 10
The relationship with is I ₄ =β ₂ /β ₂ +2I ₃ (4). Further, if the base current of the third transistor 8 is I ₂ , then I ₁ =I ₂ +I ₃ (5), and the base current of the third transistor 8 I ₂
The relationship between I 3 and collector current I ₃ is as follows: I ₃ =β ₁ I ₂ (6). Then, when the base current I ₂ of the third transistor 8 is determined from the above equations (3) to (6), I ₂ =2(β ₂ +2)/2β ₂ β ₁ +β ₂ +2β ₁ +2I _B …(7) , the current Iin flowing through the input current source 11 is: Iin=B ₁ I _B +I ₂ =2β ₂ β ₁ ² +β ₂ β ₁ +2β ₁ ² +2β ₁ +2
β ₂ +4/2β ₂ β ₁ +β ₂ +2β ₁ +2I _B …(8). Therefore, the relationship between the current Iin flowing through the input current source 11 and the current I ₀ flowing through the load resistor 12 is as follows: I ₀ =B ₁ I _B ≒ (1-1/β ₁ ² )Iin (9) Become. As is clear from comparing Equation (2) and Equation (9), the circuit configuration shown in Fig. 3 improves the matching by 6 dB compared to the circuit shown in Fig. 2. Accurate output current can be obtained.

Further, with the circuit configuration shown in FIG. 3, the accuracy can be easily further improved by simply changing the mirror ratios of the fourth and fifth transistors 9 and 10. For example, the fourth and fifth transistors 9 and 10
By setting the emitter area ratio of the third transistor 8 to a predetermined value n, or by connecting resistors to the emitters of the fourth and fifth transistors 9 and 10 and setting the ratio to a predetermined value n, the collector of the third transistor 8 Current I ₃ and collector current of the fifth transistor 10
If the relationship with I ₄ is set to I ₄ = nI ₃ and calculations similar to equations (3) to (7) are performed, the current Iin flowing to the input current source 11 and the current I ₀ flowing to the load resistor 12 The relationship is _I0 ={1-2/(n+1) _β12 ^} Iin...(10)
It is possible to obtain a matching degree corresponding to a mirror ratio n of 0. By the way, when n = 1, compared to Fig. 2, there is an improvement of 6 dB as shown in equation (9), and n =
10, it is possible to achieve an improvement of 11 times (approximately 20 dB) compared to Fig. 2.

FIG. 4 is a circuit diagram showing another embodiment of the present invention, which differs from FIG. 3 in that the fourth and fifth transistors are PNP type transistors. When the fourth and fifth transistors are constructed of PNP transistors, as shown in FIG. The collector of the fourth transistor 13 may be connected to the emitter of the third transistor 8, and the collector of the fifth transistor 14 may be grounded. The relationship between the current Iin flowing through the input current source 11 and the output current _I0 flowing through the load resistor 12 in FIG. 4 is similar to that in FIG.
As shown in equation (9), the degree of matching can be improved by 6 dB compared to Fig. 2. Furthermore, by changing the mirror ratios of the fourth and fifth transistors 13 and 15, the characteristic expressed by equation (10) can be obtained.

(f) Effects of the invention As described above, according to the invention, a current mirror circuit with excellent matching between input current and output current can be provided. Further, according to the present invention, the degree of matching between the input current and the output current can be easily adjusted by adjusting the mirror ratio of the fourth and fifth transistors, so that the degree of matching can be adjusted appropriately depending on the place of use. can be obtained, especially when the input current changes,
For example, it is suitable for use as a signal path.

[Brief explanation of the drawing]

1 and 2 are circuit diagrams showing a conventional current mirror circuit, FIG. 3 is a circuit diagram showing one embodiment of the present invention, and FIG. 4 is a circuit diagram showing another embodiment of the present invention. It is. Explanation of main figure numbers, 6...11th transistor, 7
...Second transistor, 8...Third transistor, 9,13...Fourth transistor, 10,14
...Fifth transistor, 11...Input current source.

Claims (1)

[Scope of utility model registration request] first and second transistors whose bases and emitters are commonly connected; a third transistor whose emitters are connected to the base of the first transistor; and whose bases are connected to the collector of the first transistor; and a collector of the first transistor. a diode-connected fourth transistor having an emitter-collector path connected in series with the emitter-collector path of the third transistor, and between the base of the second transistor and ground; Emitsuta collector path is connected,
A current comprising a fifth transistor whose base and emitter are commonly connected to the fourth transistor, and an output current corresponding to the current flowing through the input current source is obtained at the collector of the second transistor. mirror circuit.