JPH0525341B2 - - Google Patents

Info

Publication number
JPH0525341B2
JPH0525341B2 JP62058924A JP5892487A JPH0525341B2 JP H0525341 B2 JPH0525341 B2 JP H0525341B2 JP 62058924 A JP62058924 A JP 62058924A JP 5892487 A JP5892487 A JP 5892487A JP H0525341 B2 JPH0525341 B2 JP H0525341B2
Authority
JP
Japan
Prior art keywords
port
processor
disk device
page memory
page
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62058924A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63225848A (ja
Inventor
Shigeki Shibayama
Hiroshi Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP62058924A priority Critical patent/JPS63225848A/ja
Publication of JPS63225848A publication Critical patent/JPS63225848A/ja
Publication of JPH0525341B2 publication Critical patent/JPH0525341B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP62058924A 1987-03-16 1987-03-16 計算機システム Granted JPS63225848A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62058924A JPS63225848A (ja) 1987-03-16 1987-03-16 計算機システム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62058924A JPS63225848A (ja) 1987-03-16 1987-03-16 計算機システム

Publications (2)

Publication Number Publication Date
JPS63225848A JPS63225848A (ja) 1988-09-20
JPH0525341B2 true JPH0525341B2 (cg-RX-API-DMAC7.html) 1993-04-12

Family

ID=13098373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62058924A Granted JPS63225848A (ja) 1987-03-16 1987-03-16 計算機システム

Country Status (1)

Country Link
JP (1) JPS63225848A (cg-RX-API-DMAC7.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3451099B2 (ja) 1991-12-06 2003-09-29 株式会社日立製作所 外部記憶サブシステム

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57153364A (en) * 1981-03-18 1982-09-21 Hitachi Ltd Calculation controller
JPH0642238B2 (ja) * 1983-12-30 1994-06-01 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション デ−タ処理システム

Also Published As

Publication number Publication date
JPS63225848A (ja) 1988-09-20

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term