JPH0525335B2 - - Google Patents

Info

Publication number
JPH0525335B2
JPH0525335B2 JP62142322A JP14232287A JPH0525335B2 JP H0525335 B2 JPH0525335 B2 JP H0525335B2 JP 62142322 A JP62142322 A JP 62142322A JP 14232287 A JP14232287 A JP 14232287A JP H0525335 B2 JPH0525335 B2 JP H0525335B2
Authority
JP
Japan
Prior art keywords
microprogram
control circuit
data transfer
microprocessor
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62142322A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63307566A (ja
Inventor
Masao Koyabu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14232287A priority Critical patent/JPS63307566A/ja
Publication of JPS63307566A publication Critical patent/JPS63307566A/ja
Publication of JPH0525335B2 publication Critical patent/JPH0525335B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP14232287A 1987-06-09 1987-06-09 チャネル装置 Granted JPS63307566A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14232287A JPS63307566A (ja) 1987-06-09 1987-06-09 チャネル装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14232287A JPS63307566A (ja) 1987-06-09 1987-06-09 チャネル装置

Publications (2)

Publication Number Publication Date
JPS63307566A JPS63307566A (ja) 1988-12-15
JPH0525335B2 true JPH0525335B2 (enrdf_load_html_response) 1993-04-12

Family

ID=15312656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14232287A Granted JPS63307566A (ja) 1987-06-09 1987-06-09 チャネル装置

Country Status (1)

Country Link
JP (1) JPS63307566A (enrdf_load_html_response)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5624630A (en) * 1979-08-06 1981-03-09 Fujitsu Ltd Plural input and output device control system
JPS60122450A (ja) * 1983-12-05 1985-06-29 Hitachi Ltd マイクロ・プロセッサ

Also Published As

Publication number Publication date
JPS63307566A (ja) 1988-12-15

Similar Documents

Publication Publication Date Title
US4250546A (en) Fast interrupt method
US3909790A (en) Minicomputer with selector channel input-output system and interrupt system
US4300193A (en) Data processing system having data multiplex control apparatus
JPS5841538B2 (ja) マルチプロセツサシステム ノ ユウセンセイギヨホウシキ
JPS6258341A (ja) 入出力割込処理方式
US4293908A (en) Data processing system having direct memory access bus cycle
KR970003321B1 (ko) 코프로세서 지정 시스템
US4292668A (en) Data processing system having data multiplex control bus cycle
US4383295A (en) Data processing system having data entry backspace character apparatus
JPH0525335B2 (enrdf_load_html_response)
JPS6352241A (ja) マイクロプロセツサ
JPS6223895B2 (enrdf_load_html_response)
JPS5942331B2 (ja) プロセツサソウチノセイギヨホウシキ
JP2558902B2 (ja) 半導体集積回路装置
JPH0462093B2 (enrdf_load_html_response)
JPH0424733B2 (enrdf_load_html_response)
JPS63153635A (ja) デ−タ転送速度指定方式
JPS6273335A (ja) スタツク管理方式
JPS5837577B2 (ja) コモンバスホウシキオサイヨウシタデンシケイサンキ
JPH01302448A (ja) 情報処理装置
JPS6231386B2 (enrdf_load_html_response)
JPH027099B2 (enrdf_load_html_response)
JPH01319854A (ja) 疎結合マルチプロセッサ試験方式
JPH0419583B2 (enrdf_load_html_response)
JPS61121154A (ja) マルチプロセサシステムにおける制御方法

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees