JPS6231386B2 - - Google Patents
Info
- Publication number
- JPS6231386B2 JPS6231386B2 JP55128847A JP12884780A JPS6231386B2 JP S6231386 B2 JPS6231386 B2 JP S6231386B2 JP 55128847 A JP55128847 A JP 55128847A JP 12884780 A JP12884780 A JP 12884780A JP S6231386 B2 JPS6231386 B2 JP S6231386B2
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- central processing
- operating system
- memory
- bulk
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55128847A JPS5752934A (en) | 1980-09-17 | 1980-09-17 | Electronic computer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55128847A JPS5752934A (en) | 1980-09-17 | 1980-09-17 | Electronic computer system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5752934A JPS5752934A (en) | 1982-03-29 |
JPS6231386B2 true JPS6231386B2 (enrdf_load_html_response) | 1987-07-08 |
Family
ID=14994846
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55128847A Granted JPS5752934A (en) | 1980-09-17 | 1980-09-17 | Electronic computer system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5752934A (enrdf_load_html_response) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58205259A (ja) * | 1982-05-25 | 1983-11-30 | Taiko Denki Seisakusho:Kk | 一つの補助記憶装置に複数のosを常駐させたコンピユ−タシステム |
-
1980
- 1980-09-17 JP JP55128847A patent/JPS5752934A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5752934A (en) | 1982-03-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20030079093A1 (en) | Server system operation control method | |
EP0285634B1 (en) | Method to execute two instruction sequences in an order determined in advance | |
JPS6231386B2 (enrdf_load_html_response) | ||
EP0851352B1 (en) | Input/output control device and method applied to fault-resilient computer system | |
JPH0375836A (ja) | 資源情報引き継ぎ処理方法 | |
JP2671160B2 (ja) | 例外処理方式 | |
JPS61184643A (ja) | 仮想計算機の起動制御方式 | |
JP2825589B2 (ja) | バス制御方式 | |
JP2527964B2 (ja) | 予備系プログラム初期起動制御方式 | |
JP3029445B2 (ja) | 起動受付装置及び方法 | |
JPS605369A (ja) | メモリ制御方式 | |
JPS63168762A (ja) | マルチプロセツサ起動装置 | |
JP2830293B2 (ja) | プログラム実行方法 | |
JPH03194641A (ja) | アプリケーションプログラム共用方式 | |
JPH0827761B2 (ja) | 二重化メモリの両系同時書込方法 | |
JPS62173535A (ja) | 共有資源のアクセス制御方式 | |
JPS63241650A (ja) | プログラムロ−デイング方式 | |
JPH07111711B2 (ja) | 処理終了割込制御システム | |
JPS5849903B2 (ja) | 計算機並列接続システム | |
JPS6130296B2 (enrdf_load_html_response) | ||
JPS6227855A (ja) | 初期プログラム・ロ−デイング固定記憶装置削除方式 | |
JPS60178572A (ja) | マルチプロセツサ装置 | |
JPH0581211A (ja) | プロセツサ間通信方式 | |
JPS62102353A (ja) | プログラムのダウンライン・ロ−ド方式 | |
JPS6143739B2 (enrdf_load_html_response) |