JPH05251412A - Fabrication of soi substrate - Google Patents

Abstract

PURPOSE:To suppress concave polishing of silicon thin film by making a groove, reaching to an underlying insulation film, between a stopper and a silicon layer prior to polishing step and to make it possible to polish the silicon thin film precisely by controlling the depth of the groove. CONSTITUTION:A silicon layer 3a formed on an insulation layer 2 is polished using a stopper 5 provided closely to the silicon layer 3a on the insulation layer 2 thus obtaining a silicon thin film 3 having thickness determined by the stopper 5. In such fabrication of SOI substrate, a groove 4 reaching the insulation film 2 is made between the stopper 5 and the silicon layer 3a prior to the polishing step. Alternatively, the stopper 5 is formed such that the top surface thereof is lower than the surface of the silicon thin film 3 and the thickness thereof is controlled according to the depth of the groove 4. For example, an urethane pad and colloidal silica are employed in the polishing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an SOI (Silicon on Insulator) substrate having a thin silicon thin film.

An SOI substrate in which a thin silicon thin film serving as an active layer is formed on an insulating layer is suitable for manufacturing high-speed devices and low-power consumption devices, and therefore has been developed as a substrate for high-speed, large-scale integrated circuits. It is being advanced.

However, the silicon layer of the SOI substrate must be thin in order to apply the properties of the SOI substrate as a high speed and low power consumption element. Therefore, a method of manufacturing an SOI substrate having a thin silicon thin film is needed.

[0004]

2. Description of the Related Art SO having a silicon thin film with a thickness of 1 μm or less
Conventionally, the I-substrate is manufactured by using an SOI substrate having a thick silicon layer as a starting material, and polishing the silicon layer using a stopper for polishing to the thickness of the stopper.

A conventional method for manufacturing an SOI substrate will be described below. FIG. 1 (b) shows the polishing according to the prior art,
(B-1) shows the SOI substrate and the stopper before polishing,
-2) shows the SOI substrate and the stopper after polishing in cross sections.

The SOI substrate used as a starting material is shown in FIG.
1) See, silicon layer 3a of thickness or more 1μm across the insulating layer 2 made of SiO ₂ is provided on the substrate 1 surface made of a silicon wafer. Such an SOI substrate is manufactured by, for example, heating and bonding two silicon wafers having an insulating film formed on the front surface, and then grinding one of the wafers from the back surface.

Next, the isolation region 6 of the silicon layer 3a is etched to expose the insulating film 2, and the silicon layer 3a is divided into islands. Then, in the isolation region surrounding the island-shaped silicon layer 3a, a stripe made of, for example, SiO ₂ , silicon nitride, or silicon carbide and having the same thickness as the silicon thin film 3 to be formed by polishing is polished. It is formed as the stopper 5.

Then, the silicon layer 3a is polished to obtain the structure shown in FIG.
Referring to (b-2), the polishing is continued until the progress of polishing is stopped by the stopper to form the desired silicon thin film 3.
In the conventional method described above, referring to FIG. 1B-2, the island-shaped silicon thin film 3 is polished into a concave shape having a depressed center. The depression reaches 0.1 μm for a square silicon thin film having a side length of 1000 μm.

Since the depth of the depression is constant regardless of the thickness of the silicon thin film 3, the ratio of the thickness distribution to the thickness becomes large, that is, large thickness unevenness occurs, especially for a thin silicon thin film. The presence of such unevenness in thickness makes the electrical characteristics of the semiconductor device unstable, which is not desirable.

Further, according to the conventional method, the silicon thin film 3
Is necessarily thinner than the thickness of the stopper, it is necessary to make the stopper thicker in consideration of its effect.
However, it is not easy to precisely form the stopper thickness. From this, it was difficult to polish a thin silicon thin film to a precise thickness.

[0011]

As described above, in the conventional method of manufacturing an SOI substrate, which is polished by using the stopper,
Since the silicon thin film is polished in a concave shape and thinner than the thickness of the stopper, there is a problem that the thickness of the silicon thin film cannot be controlled precisely. For this reason, SOI having a particularly thin silicon thin film
The disadvantage is that the substrate is difficult to manufacture.

According to the present invention, a groove reaching the underlying insulating layer is provided between the stopper and the silicon thin film to reduce the amount of polishing of the silicon thin film in a concave shape. It is an object of the present invention to provide a method for manufacturing an SOI substrate, which enables polishing of a thin silicon thin film to a precise thickness by enabling precise control of the silicon film thickness by controlling.

[0013]

FIG. 1 is a diagram for explaining the principle of the present invention. FIG. 1 (a) shows a polishing step according to the present invention, and FIG. 1 (b) shows a conventional polishing step. , SO respectively
It is represented by a cross-sectional view of the I substrate.

A first structure of the present invention for solving the above-mentioned problems is to refer to FIG. 1 so that the silicon layer 3a provided on the insulating layer 2 is located close to the silicon layer 3a. Polishing is performed using the stopper 5 provided above,
SOI (Silicon) made with the silicon thin film 3 of thickness determined by
on Insulator) In the method for manufacturing a substrate, a groove 4 having a depth reaching the insulating film 2 is provided between the stopper 5 and the silicon layer 3a prior to the polishing step, and , The second configuration is the SOI of the first configuration
In the method of polishing a substrate, the stopper 5 is formed so that the upper surface of the stopper 5 is lower than the surface of the silicon thin film 3, and the thickness of the silicon thin film 3 is controlled by the depth of the groove 4. It is characterized by polishing.

[0015]

In the structure of the present invention, referring to FIG.
A stopper 5 and a silicon layer 3a to be polished are provided close to each other on the top, and a groove 4 having a depth such that the bottom reaches the insulating layer 2 is provided between the stopper 5 and the silicon layer 3a.

The inventor of the present invention has found that when the groove 4 having a depth reaching the above-mentioned insulating layer 2 is present, the concave recess of the silicon thin film 3 after polishing becomes small, and the depth of the groove 4 causes the silicon It was clarified experimentally that the thickness of the thin film 3 can be controlled and that the surface of the silicon thin film 3, that is, the polishing surface is higher than the upper surface of the stopper 5 depending on the depth of the groove 4.

A part of such an experiment will be described below. First, in the first experiment, referring to FIG. 1 (a-1), a starting material wafer is a substrate 1 made of a silicon wafer, on which an insulating film 2 made of SiO ₂ having a thickness of 1.0 μm is formed. A silicon layer 3a having a sandwiching thickness of 1 μm is provided.

Then, the silicon layer 3a on the plurality of linearly separated regions 6 having a width of 100 μm and orthogonal to the surface of the insulating layer 2 is etched and removed to expose the underlying insulating layer 2. As a result, the silicon layer 3a is 100 μm vertically and horizontally.
It is separated into m-shaped island-shaped silicon layers 3a having a side length of 1000 μm and arranged in a grid pattern at intervals of m.

Then, on the center line of the separation region 6, a width of 60 μm
A stopper 5 made of m ₂ of SiO ₂ was formed, and a groove 4 having a depth of 0.2 μm from the upper surface of the stopper 5 was formed in the insulating layer 2 exposed on the isolation regions 6 on both sides of the stopper 5.

Next, using a urethane pad and colloidal silica, the silicon layer 3a is polished by the stopper 5 until the polishing progress is substantially stopped, and the silicon thin film 3 is formed.
Formed.

The silicon thin film 3 polished and formed by such a method has a depth of a concave recess of 0.004 μm. This is because the recess depth of the conventional one manufactured under the same conditions except that the groove 4 is dug into the insulating layer 2 is 0.1.
Only 4% of μm.

This fact makes it clear that the presence of the groove 4 contributes to the reduction of the depression of the silicon thin film 3 and the precise polishing. Other experiments conducted by the inventor are as follows.

That is, in the above experiment, the influence on the thickness of the silicon thin film 3 was measured by changing the groove depth. Figure 2
FIG. 4 is a diagram for explaining the effect of the present invention, showing a change during polishing of the difference in height from the upper surface of the stopper to the polished surface after polishing, that is, the surface of the silicon thin film 3.

2A shows a conventional polishing method, and FIG.
Referring to (b), the bottom surface of groove 4 is in the plane including the interface between insulating film 2 and silicon layer 3a. in this case,
As is conventionally known, the silicon layer 3a is polished with the polishing time, and is polished more thinly beyond the upper surface of the stopper 5.

In FIG. 2, B and C are cases where the groove 4 according to the structure of the present invention is provided, where B is 0.9 μm in depth and C is 0.1 μm in depth.
It represents the case of m. In any case, it can be seen that after the polishing progresses and the polishing surface reaches a certain height from the upper surface of the stopper 5, the progress of the polishing both stops.

The height of the groove 4 is, as is obvious from FIG.
Depends on the depth of. Further, it is clear that the polishing surface where the progress of polishing stops is higher than the upper surface of the stopper 5. The present invention was devised based on the above-mentioned facts.

The first configuration of the present invention will be described with reference to FIG.
A groove 4 having a depth reaching the insulating film 2 is provided between the stove 5 and the silicon layer 3a. Therefore, as described above, the silicon layer 3a is polished into a flat silicon thin film 3 having few depressions. Therefore, a thin silicon thin film can be formed by polishing to a precise thickness with less uneven thickness.

In the second structure of the present invention, the silicon layer 3a is polished by using the stopper 5 having an upper surface lower than the surface of the silicon thin film 3. As described above, the polishing surface can be stopped at a position higher than the stopper 5 by appropriately setting the depth of the groove 4 constituting the present invention. In other words, the stopper can be made lower than the conventional method.
The lower the stopper is, the more accurately the height is formed. Therefore, the accuracy of the thickness of the silicon thin film can be improved by using the lower stopper.

Further, as described above, the difference in thickness between the silicon thin film 3 and the stopper 5 can be controlled by the depth of the groove 4. Since the control of the film thickness of the silicon thin film by the depth of the groove 4 can be controlled more precisely than that by the thickness of the stopper, the control of the silicon film thickness is good.

In particular, in the second configuration, the upper surface of the stopper can be the surface of the insulating layer, that is, the insulating layer can be left as it is to function as a stopper without particularly depositing the stopper material.

In this structure, since the height of the stopper is naturally determined as the interface between the insulating layer and the silicon layer, there is no manufacturing error. Moreover, the thickness of the silicon thin film is determined only by the depth of the groove. Therefore, in manufacturing an SOI substrate having a particularly thin silicon thin film, it is possible to form a silicon thin film with less manufacturing error.

[0032]

EXAMPLES Details of the present invention will be described with reference to examples.
FIG. 3 is a substrate structure diagram according to the first embodiment of the present invention. FIG. 3A is a plan view of the manufactured SOI substrate, and FIG.
Represents the aa ′ cross section.

The first embodiment of the present invention will be described with reference to FIG.
The present invention relates to the manufacture of an SOI substrate in which a silicon thin layer 3 is provided with a SiO ₂ insulating layer 2 sandwiched on the surface of a substrate 1 made of a silicon wafer.

This substrate has a width of 10 in the vertical and horizontal directions formed by etching an insulating layer to a depth of 0.2 μm on its surface.
A separation region 6 of 0 μm is formed, and the silicon thin film 3 is separated by the separation region 6 into a square island shape having a side of 1000 μm, and is provided in a grid pattern.

The isolation region 6 has a width 6 along its center line.
A stripe of SiO ₂ having a thickness of 0 μm and a height of 0.7 μm is provided as the stopper 5. Therefore, the groove 4 is formed in the region of the separation region 6 excluding the stopper 5, that is, on both sides of the stopper 5.

The above SOI substrate was manufactured through the following steps. FIG. 4 is a process chart of the first embodiment of the present invention,
The cross section of the substrate is shown. First, referring to FIGS. 4A and 3, a resist 7 is applied on the silicon layer 3 a, and then a slit-shaped window 8 is opened on the separation region 6.

Next, referring to FIG. 4B, the insulating layer 2 is etched to a depth of 0.2 μm through the silicon layer 3a by anisotropic RIE (reactive ion etching) using the resist 7 as a mask. To do.

Next, the resist 7 is removed, the resist 9 is applied again, and the width 60 μm along the center line of the separation region 6 is obtained.
The slit-shaped window 10 is opened. Then, FIG. 4 (c)
Referring to, a stopper 5 is formed by depositing SiO ₂ with a thickness of 0.7 μm on the insulating layer 2 through the window 10 by the selective CVD method.

Then, the resist 9 is removed, and FIG.
With reference to, the silicon layer 3a is continuously polished by the action of the stopper 5 until the progress of polishing is delayed to form the silicon thin film 3. The polishing can be carried out by an oscillating lens polishing device using, for example, a urethane pad and colloidal silica.

By this method, the thickness unevenness is 0.004 μm.
An SOI substrate having m silicon thin films 3 can be manufactured. This thickness unevenness is only 4% of the conventional method. The second embodiment of the present invention relates to a method of directly using an insulating layer as a stopper.

FIG. 5 is a process chart of the second embodiment of the present invention.
The cross section of the SOI substrate is shown. The planar shape of this embodiment is the same as that of the first embodiment of FIG. First, Fig. 5
Referring to (a), the starting material is the same bonded wafer as in the first embodiment. A SiO ₂ film 11 is deposited on the silicon layer 3a having a thickness of 1 μm on the wafer to form a resist 1
2 is applied, photo-etched, and a window 12 is formed on the isolation region.
A SiO ₂ film 11 having a is formed.

Next, referring to FIG. 5B, after removing the resist 12, the SiO ₂ film 11 is used as a mask and S
The insulating layer 2 made of iO _{2 is used} as an etching stopper to selectively remove the silicon layer 3a by etching by the RIE method to expose the insulating film 2 on the bottom surface of the isolation region.

Next, referring to FIG. 5C, silicon nitride is deposited by the CVD method. Then, the silicon nitride on the bottom surface of the isolation region 6 is removed by photoetching, leaving a stripe region having a width of 60 μm on the bottom centerline of the isolation region 6, to form a mask of the silicon nitride film 13.

Next, referring to FIG. 5D, the insulating layer 2 is etched to a depth of, for example, 0.9 μm by the RIE method using the silicon nitride film 13 as a mask to form a groove 4. At the same time, the insulating layer 2 immediately below the stripe-shaped silicon nitride film 13 on the center line of the bottom surface of the isolation region 6 is formed as a stopper. The top surface of this stopper is the insulating layer 2
Is equal to the height of the interface between the silicon layer 3a and the silicon layer 3a.

Then, the silicon nitride film 13 is removed by etching, and the silicon layer 3a is polished as in the first embodiment. Through these steps, referring to FIG. 5E, an SOI substrate having a silicon thin film 3 having a thickness of 0.4 μm, for example, is formed.

According to this embodiment, since the upper surface of the stopper is automatically determined as the position of the stopper when etching silicon, there is no room for manufacturing error. Also,
Since the thickness of the silicon thin film can be controlled by the depth of the groove formed by etching the insulating layer, the thickness of the silicon thin film can be precisely manufactured. Therefore, it is possible to manufacture an SOI substrate having a thin silicon thin film precisely formed by polishing.

Furthermore, in manufacturing the stopper, the deposition process of the material of the stopper and the etching process are not required, so that the manufacturing process can be shortened.

[0048]

According to the present invention, the polishing surface can be made flat by providing a groove reaching the underlying insulating layer between the stopper and the silicon thin film. In addition, the stopper can be lowered, and the film thickness of the silicon layer can be controlled by the depth of the groove, which is easy to control.

Therefore, it is possible to provide a method for manufacturing an SOI substrate capable of polishing a thin silicon thin film with a small thickness unevenness and a precise thickness, which greatly contributes to the performance improvement of a semiconductor device.

[Brief description of drawings]

FIG. 1 is an explanatory view of the principle of the present invention.

FIG. 2 is a diagram for explaining the effect of the present invention.

FIG. 3 is a substrate structure diagram according to a first embodiment of the present invention.

FIG. 4 is a process chart of the first embodiment of the present invention.

FIG. 5 is a process chart of the second embodiment of the present invention.

[Explanation of symbols]

1 Base 2 Insulating Layer 3 Silicon Thin Film 3a Silicon Layer 4 Groove 5 Stopper 6 Separation Area 7, 9 Resist 8, 10 Window 11 SiO ₂ Film 12 Resist 12a Window 13 Silicon Nitride Film

Claims (2)

[Claims] 1. A silicon layer (3a) provided on an insulating layer (2) is polished by using a stopper (5) provided on the insulating layer (2) close to the silicon layer (3a). Then
In a method of manufacturing an SOI (Silicon on Insulator) substrate formed of a silicon thin film (3) having a thickness determined by the stopper (5), the stopper (5) and the silicon layer (3a) are separated from each other before the polishing step. A method of manufacturing an SOI substrate, characterized in that a groove (4) having a depth reaching the insulating film (2) is provided therebetween. 2. The method for manufacturing an SOI substrate according to claim 1, wherein the stopper (5) is formed so that an upper surface of the stopper (5) is lower than a surface of the silicon thin film (3), A method of manufacturing an SOI substrate, characterized in that the thickness of the silicon thin film (3) is controlled by the depth of (4) to perform polishing.