JPH05241183A - Liquid crystal display body - Google Patents

Liquid crystal display body

Info

Publication number
JPH05241183A
JPH05241183A JP7298192A JP7298192A JPH05241183A JP H05241183 A JPH05241183 A JP H05241183A JP 7298192 A JP7298192 A JP 7298192A JP 7298192 A JP7298192 A JP 7298192A JP H05241183 A JPH05241183 A JP H05241183A
Authority
JP
Japan
Prior art keywords
substrate
liquid crystal
conductive
porous
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP7298192A
Other languages
Japanese (ja)
Inventor
Teruhiko Furushima
輝彦 古島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Application filed by Canon Inc filed Critical Canon Inc
Priority to JP7298192A priority Critical patent/JPH05241183A/en
Publication of JPH05241183A publication Critical patent/JPH05241183A/en
Withdrawn legal-status Critical Current

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  • Liquid Crystal (AREA)

Abstract

PURPOSE:To provide a liq. crystal display body not causing whitening, uneven display, etc., and ensuring high display grade. CONSTITUTION:A liq. crystal layer is held between upper and lower substrates 2, 1 with separate electrodes on the insides and the sealing parts of the substrates 2, 1 are made electric conductive. A metal pad 3 for electric conduction having >=2/3 of the sealing length is fitted to the sealing part of at least the substrate 1 and electric conductive spacers 5 and electric nonconductive spacers 4 are all owed to exist only between the sealing parts.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は液晶表示体、特に液晶層
を挟み内面に電極を有して対向する基板、一方の基板上
の電極を他方の基板上の電極に接続するための導電部を
有する液晶表示体に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly to a substrate facing an electrode having electrodes on the inner side of a liquid crystal layer, and a conductive portion for connecting an electrode on one substrate to an electrode on the other substrate. The present invention relates to a liquid crystal display body.

【0002】[0002]

【従来の技術】一般に液晶表示体は、内面に電極を有し
て対向する2枚の基板間に液晶層を設けてなるが、電極
を外部回路に接続する際、2枚の基板それぞれから電極
を引き出すよりも、液晶体の内部に導電部を設けて一方
の基板を他方の電極へ接続し、一方の基板のみから外部
回路へ接続する方が容易である。
2. Description of the Related Art Generally, a liquid crystal display has an electrode on its inner surface and a liquid crystal layer provided between two opposing substrates. However, when the electrodes are connected to an external circuit, the electrodes are removed from each of the two substrates. It is easier to provide a conductive part inside the liquid crystal body and connect one substrate to the other electrode, and to connect only one substrate to an external circuit than to draw out.

【0003】かかる手段として特開昭59−28186
号公報には、セルギャップ保持用のスぺーサーと同等の
径を有する導電性スぺーサーをシール剤に混合して上下
基板の導通を図り、セルギャップの決定は導電部以外、
即ち表示部に分散させた非導電性スぺーサーにより行う
ことが開示されている。
As such means, JP-A-59-28186
In the publication, a conductive spacer having a diameter equal to that of a spacer for maintaining a cell gap is mixed with a sealing agent to achieve conduction between the upper and lower substrates, and the cell gap is determined except for the conductive portion.
That is, it is disclosed that the non-conductive spacer dispersed in the display portion is used.

【0004】しかし、近年の高品位画像の要請より画素
密度が高くなる、つまり画素面積が狭くなるに従い、上
記従来の方法では表示部に分散したスぺーサーが液晶の
配向を乱し、白ヌケが発生し、表示品位を低下させると
いう問題があった。更に、シール剤に導電性スぺーサー
を混合しても、外部回路接続用の電極パットが二か所程
度しかないため、透明電極の抵抗が高い場合には電極パ
ットと各画素間の距離の違いにより抵抗が異なり、表示
ムラが発生するという問題もあった。
However, as the pixel density becomes higher, that is, the pixel area becomes narrower due to the demand for high-quality images in recent years, in the above-mentioned conventional method, the spacers dispersed in the display portion disturb the alignment of the liquid crystal, resulting in white blank. Occurs, and the display quality is degraded. Furthermore, even if a conductive spacer is mixed with the sealant, there are only two electrode pads for external circuit connection, so if the resistance of the transparent electrode is high, the distance between the electrode pad and each pixel can be reduced. There was also a problem in that the resistance was different due to the difference and uneven display occurred.

【0005】[0005]

【発明が解決しようとする課題】本発明は上記従来の問
題点を解決し、白ヌケ、表示ムラ等の発生しない表示品
位の高い液晶表示体を提供することを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to solve the above problems of the prior art and to provide a liquid crystal display having a high display quality in which white spots and display unevenness do not occur.

【0006】[0006]

【課題を解決するための手段】即ち、本発明は液晶層を
挟み内面に電極を有して対向する基板、一方の基板上の
電極を他方の基板上の電極に接続するための導電部を有
する液晶表示体において、シール部を導電部とし、少な
くとも一方の基板のシール該当部にシール長の2/3以
上の金属製導通用パットを設け、かつ該シール部のみに
導電性スペーサーと非導電性スペーサーが存在すること
を特徴とする液晶表示体である。
That is, according to the present invention, there are provided substrates which face each other with electrodes on the inner surface sandwiching a liquid crystal layer, and conductive portions for connecting electrodes on one substrate to electrodes on the other substrate. In the liquid crystal display having the above, the seal portion is a conductive portion, a metal conduction pad having a seal length of ⅔ or more is provided at a seal corresponding portion of at least one substrate, and the conductive spacer and the non-conductive portion are provided only in the seal portion. A liquid crystal display characterized by the presence of a polar spacer.

【0007】本発明の液晶表示体は、通常使用する基板
に加えて以下に示す方法により製造される単結晶Si層
を有する半導体基板を用いることができる。そして、液
晶素子、液晶駆動回路及びその他の周辺駆動回路を同時
に同一基板上に作成することができる。以下、その方法
につき説明する。(以下、「多孔質Si使用半導体基板
の作製方法」という。) 半導体基板の単結晶Si層は単結晶Si基体を多孔質化
した多孔質Si基体を用いて形成したものである。
For the liquid crystal display of the present invention, a semiconductor substrate having a single crystal Si layer manufactured by the following method can be used in addition to the substrate which is usually used. Then, the liquid crystal element, the liquid crystal drive circuit, and other peripheral drive circuits can be simultaneously formed on the same substrate. The method will be described below. (Hereinafter, referred to as “method for producing semiconductor substrate using porous Si”.) The single crystal Si layer of the semiconductor substrate is formed by using a porous Si substrate obtained by making the single crystal Si substrate porous.

【0008】この多孔質Si基体には、透過型電子顕微
鏡による観察によれば、平均約600Å程度の径の孔が
形成されており、その密度は単結晶Siに比べると、半
分以下になるにもかかわらず、その単結晶性は維持され
ており、多孔質層の上部へ単結晶Si層をエピタキシャ
ル成長させることも可能である。ただし、1000℃以
上では、内部の孔の再配列が起こり、増速エッチングの
特性が損なわれる。このため、Si層のエピタキシャル
成長には、分子線エピタキシャル成長法、プラズマCV
D法、熱CVD法、光CVD法、バイアス・スパッタ
法、液晶成長法等の低温成長が好適とされる。
According to observation with a transmission electron microscope, pores having an average diameter of about 600 Å are formed in this porous Si substrate, and the density thereof is less than half that of single crystal Si. Nevertheless, its single crystallinity is maintained, and it is possible to epitaxially grow a single crystal Si layer on top of the porous layer. However, at 1000 ° C. or higher, rearrangement of internal holes occurs and the characteristics of enhanced etching are impaired. Therefore, for the epitaxial growth of the Si layer, the molecular beam epitaxial growth method, plasma CV
Low temperature growth such as D method, thermal CVD method, photo CVD method, bias sputtering method, liquid crystal growth method, etc. is suitable.

【0009】ここでP型Siを多孔質化した後に単結晶
層をエピタキシャル成長させる方法について説明する。
Here, a method of epitaxially growing a single crystal layer after making P-type Si porous will be described.

【0010】先ず、Si単結晶基体を用意し、それをH
F溶液を用いた陽極化成法によって、多孔質化する。単
結晶Siの密度は2.33g/cm3 であるが、多孔質
Si基体の密度はHF溶液濃度を20〜50重量%に変
化させることで、0.6〜1.1g/cm3 に変化させ
ることができる。この多孔質層は下記の理由により、P
型Si基体に形成され易い。
First, a Si single crystal substrate is prepared, and H
It is made porous by the anodization method using the F solution. The density of single crystal Si is 2.33 g / cm 3 , but the density of the porous Si substrate changes to 0.6 to 1.1 g / cm 3 by changing the HF solution concentration to 20 to 50% by weight. Can be made. This porous layer is P because of the following reasons.
It is easily formed on the mold Si substrate.

【0011】多孔質Siは半導体の電解研磨の研究過程
において発見されたものであり、陽極化成におけるSi
の溶解反応において、HF溶液中のSiの陽極反応には
正孔が必要であり、その反応は、次のように示される。
Porous Si was discovered in the research process of electrolytic polishing of semiconductors, and Si in anodization is used.
In the dissolution reaction of 1), holes are required for the anodic reaction of Si in the HF solution, and the reaction is shown as follows.

【0012】 Si+2HF+(2−n)e+ →SiF2 +2H+ +n
- SiF2 +2HF→SiF4 +H2 SiF4 +2HF→H2 SiF6 又は、 Si+4HF+(4−λ)e+ →SiF4 +4H+ +λ
- SiF4 +2HF→H2 SiF6 ここで、e+ 及び、e- はそれぞれ、正孔と電子を表し
ている。また、n及びλはそれぞれSi1原子が溶解す
るために必要な正孔の数であり、n>2又は、λ>4な
る条件が満たされた場合に多孔質Siが形成されるとし
ている。
Si + 2HF + (2-n) e + → SiF 2 + 2H + + n
e SiF 2 + 2HF → SiF 4 + H 2 SiF 4 + 2HF → H 2 SiF 6 or Si + 4HF + (4-λ) e + → SiF 4 + 4H + + λ
e SiF 4 + 2HF → H 2 SiF 6 Here, e + and e represent a hole and an electron, respectively. Further, n and λ are the numbers of holes necessary for dissolving Si1 atoms, respectively, and porous Si is formed when the condition of n> 2 or λ> 4 is satisfied.

【0013】以上のことから、正孔の存在するP型Si
は、多孔質化され易いと言える。
From the above, P-type Si in which holes are present
Can easily be said to be porous.

【0014】一方、高濃度N型Siも多孔質化されうる
ことが報告されているおり、従って、P型、N型の別に
こだわらずに多孔質化を行うことができる。
On the other hand, it has been reported that high-concentration N-type Si can also be made porous, so that it can be made porous regardless of whether it is P-type or N-type.

【0015】また、多孔質層はその内部に大量の空隙が
形成されているために、密度が半分以下に減少する。そ
の結果、体積に比べて表面積が飛躍的に増大するため、
その化学エッチング速度は、通常の単結晶層のエッチン
グ速度に比べて著しく増速される。
Further, since the porous layer has a large amount of voids formed therein, the density is reduced to less than half. As a result, the surface area increases dramatically compared to the volume,
Its chemical etching rate is significantly increased as compared with the etching rate of a normal single crystal layer.

【0016】単結晶Siを陽極化成によって多孔質化す
る条件を以下に示す。尚、陽極化成によって形成する多
孔質Siの出発材料は、単結晶Siに限定されるもので
はなく、他の結晶構造のSiでも可能である。
The conditions for making single crystal Si porous by anodization are shown below. The starting material of porous Si formed by anodization is not limited to single crystal Si, and Si having another crystal structure may be used.

【0017】印加電圧: 2.6(V) 電流密度: 30(mA・cm-2) 陽極化成溶液: HF:H2 O:C25 OH=1:
1:1 時間: 2.4(時間) 多孔質Siの厚み: 300(μm) Porosity: 56(%) このようにして形成した多孔質化Si基体の上にSiを
エピタキシャル成長させて単結晶Si薄膜を形成する。
単結晶Si薄膜の厚さは好ましくは50μm以下、さら
に好ましくは20μm以下である。
Applied voltage: 2.6 (V) Current density: 30 (mA · cm -2 ) Anodizing solution: HF: H 2 O: C 2 H 5 OH = 1:
1: 1 time: 2.4 (hour) Thickness of porous Si: 300 (μm) Porosity: 56 (%) Single crystal Si thin film prepared by epitaxially growing Si on the porous Si substrate thus formed. To form.
The thickness of the single crystal Si thin film is preferably 50 μm or less, more preferably 20 μm or less.

【0018】次に上記単結晶Si薄膜表面を酸化した
後、最終的に基板を構成することになる基体を用意し、
単結晶Si表面の酸化膜と上記基体を貼り合わせる。或
いは新たに用意した単結晶Si基体の表面を酸化した
後、上記多孔質Si基体上の単結晶Si層と貼り合わせ
る。この酸化膜を基体と単結晶Si層の間に設ける理由
は、例えば基体としてガラスを用いた場合、Si活性層
の下地界面により発生する界面準位は上記ガラス界面に
比べて、酸化膜界面の方が準位を低くできるため、電子
デバイスの特性を、著しく向上させることができるため
である。さらに、後述する選択エッチングにより多孔質
Si気体をエッチング除去した単結晶Si薄膜のみを新
しい基体に貼り合わせても良い。貼り合わせはそれぞれ
の表面を洗浄後に室温で接触させるだけでファン デル
ワールス力で簡単には剥すことができない程充分に密
着しているが、これをさらに200〜900℃、好まし
くは600〜900℃の温度で窒素雰囲気下熱処理し完
全に貼り合わせる。
Next, after the surface of the single crystal Si thin film is oxidized, a substrate that will eventually form a substrate is prepared,
The oxide film on the surface of the single crystal Si and the above substrate are bonded together. Alternatively, after the surface of a newly prepared single crystal Si substrate is oxidized, it is attached to the single crystal Si layer on the porous Si substrate. The reason for providing this oxide film between the substrate and the single crystal Si layer is that, for example, when glass is used as the substrate, the interface level generated by the underlying interface of the Si active layer is higher than that of the glass interface. This is because the level can be lowered and the characteristics of the electronic device can be significantly improved. Furthermore, only the single crystal Si thin film from which the porous Si gas has been removed by etching by selective etching described below may be attached to a new substrate. The bonding is such that the surfaces are sufficiently adhered so that they cannot be easily peeled off by Van der Waals force only by bringing them into contact with each other at room temperature, but this is further 200 to 900 ° C, preferably 600 to 900 ° C. Heat treatment under a nitrogen atmosphere at the temperature of and bond them completely.

【0019】さらに、上記の貼り合わせた2枚の基体全
体にSi34 層をエッチング防止膜として堆積し、多
孔質Si基体の表面上のSi34 層のみを除去する。
このSi34 層の代わりにアピエゾンワックスを用い
ても良い。この後、多孔質Si基体を全部エッチング等
の手段で除去することにより薄膜単結晶Si層を有する
半導体基板が得られる。
Further, a Si 3 N 4 layer is deposited as an etching prevention film on the whole of the above-mentioned two bonded substrates, and only the Si 3 N 4 layer on the surface of the porous Si substrate is removed.
Apiezon wax may be used instead of the Si 3 N 4 layer. Then, the porous Si substrate is entirely removed by a method such as etching to obtain a semiconductor substrate having a thin film single crystal Si layer.

【0020】この多孔質Si基体のみを無電解湿式エッ
チングする選択エッチング法についていて説明する。
A selective etching method for electroless wet etching only this porous Si substrate will be described.

【0021】結晶Siに対してはエッチング作用を持た
ず、多孔質Siのみを選択エッチング可能なエッチング
液としては、弗酸、フッ化アンモニウム(NH4 F)や
フッ化水素(HF)等バッファード弗酸、過酸化水素水
を加えた弗酸又はバッファード弗酸の混合液、アルコー
ルを加えた弗酸又はバッファード弗酸の混合液、過酸化
水素水とアルコールとを加えた弗酸又はバッファード弗
酸の混合液が好適に用いられる。これらの溶液に貼り合
わせた基板を湿潤させてエッチングを行う。エッチング
速度は弗酸、バッファード弗酸、過酸化水素水の溶液濃
度及び温度に依存する。過酸化水素水を添加することに
よって、Siの酸化を増速し、反応速度を無添加に比べ
て増速することが可能となり、さらに過酸化水素水の比
率を変えることにより、その反応速度を制御することが
できる。またアルコールを添加することにより、エッチ
ングによる反応生成気体の気泡を、瞬時にエッチング表
面から攪拌することなく除去でき、均一に且つ効率よく
多孔質Siをエッチングすることができる。
As an etching solution which does not have an etching action on crystalline Si and can selectively etch only porous Si, a buffered material such as hydrofluoric acid, ammonium fluoride (NH 4 F) or hydrogen fluoride (HF) is used. Hydrofluoric acid, mixed solution of hydrofluoric acid or buffered hydrofluoric acid with hydrogen peroxide solution, hydrofluoric acid with alcohol or buffered hydrofluoric acid, hydrofluoric acid with hydrogen peroxide solution and alcohol or buffer A mixed solution of dehydrofluoric acid is preferably used. Etching is performed by moistening the substrate bonded to these solutions. The etching rate depends on the solution concentration and temperature of hydrofluoric acid, buffered hydrofluoric acid, and hydrogen peroxide solution. By adding hydrogen peroxide solution, the oxidation of Si can be accelerated and the reaction rate can be increased as compared with that without addition. By further changing the ratio of hydrogen peroxide solution, the reaction rate can be increased. Can be controlled. Further, by adding alcohol, it is possible to instantaneously remove the bubbles of the reaction product gas due to etching from the etching surface without stirring, and it is possible to uniformly and efficiently etch the porous Si.

【0022】バッファード弗酸中のHF濃度は、エッチ
ング液に対して、好ましくは1〜95重量%、より好ま
しくは1〜85重量%、さらに好ましくは1〜70重量
%の範囲で設定され、バッファード弗酸中のNH4 F濃
度は、エッチング液に対して、好ましくは1〜95重量
%、より好ましくは5〜90重量%、さらに好ましくは
5〜80重量%の範囲で設定される。
The HF concentration in the buffered hydrofluoric acid is set in the range of preferably 1 to 95% by weight, more preferably 1 to 85% by weight, further preferably 1 to 70% by weight, based on the etching solution. The NH 4 F concentration in the buffered hydrofluoric acid is set in the range of preferably 1 to 95% by weight, more preferably 5 to 90% by weight, further preferably 5 to 80% by weight, based on the etching solution.

【0023】HF濃度は、エッチング液に対して、好ま
しくは1〜95重量%、より好ましくは5〜90重量
%、さらに好ましくは5〜80重量%の範囲で設定され
る。
The HF concentration is preferably set in the range of 1 to 95% by weight, more preferably 5 to 90% by weight, further preferably 5 to 80% by weight, based on the etching solution.

【0024】H22 濃度は、エッチング液に対して、
好ましくは1〜95重量%、より好ましくは5〜90重
量%、さらに好ましくは10〜80重量%で、且つ上記
過酸化水素水の効果を奏する範囲で設定される。
The H 2 O 2 concentration depends on the etching solution.
It is preferably 1 to 95% by weight, more preferably 5 to 90% by weight, still more preferably 10 to 80% by weight, and is set within a range in which the effect of the hydrogen peroxide solution is exhibited.

【0025】アルコール濃度は、エッチング液に対し
て、好ましくは80重量%、より好ましくは60重量%
以下、さらに好ましくは40重量%以下で、且つ上記ア
ルコールの効果を奏する範囲で設定される。
The alcohol concentration is preferably 80% by weight, more preferably 60% by weight, based on the etching solution.
Hereafter, it is more preferably set to 40% by weight or less and within the range in which the effect of the alcohol is exhibited.

【0026】温度は、好ましくは0〜100℃、より好
ましくは5〜80℃、さらに好ましくは5〜60℃の範
囲で設定される。
The temperature is preferably set in the range of 0 to 100 ° C, more preferably 5 to 80 ° C, further preferably 5 to 60 ° C.

【0027】本工程に用いられるアルコールはエチルア
ルコールの他、イソプロピルアルコールなど製造工程等
に実用上差し支えなく、さらに上記アルコール添加効果
を望むことのできるアルコールを用いることができる。
As the alcohol used in this step, in addition to ethyl alcohol, isopropyl alcohol or the like which can be practically used in the manufacturing process and which is desired to have the above-mentioned alcohol addition effect can be used.

【0028】このようにして得られた半導体基板は、通
常のSiウエハーと同等な単結晶Si層が平坦にしかも
均一に薄層化されて基板全域に大面積に形成されてい
る。
In the semiconductor substrate thus obtained, a single crystal Si layer equivalent to that of an ordinary Si wafer is flatly and uniformly thinned to have a large area over the entire substrate.

【0029】この半導体基板の単結晶Si層を部分酸化
法或いは島状にエッチングすることにより分離し、不純
物をドープしてp或いはnチャネルトランジスタを形成
する。
The single crystal Si layer of this semiconductor substrate is separated by a partial oxidation method or etched into an island shape, and is doped with impurities to form a p- or n-channel transistor.

【0030】[0030]

【実施例】以下、実施例により本発明を詳細に説明す
る。
The present invention will be described in detail below with reference to examples.

【0031】(実施例1)図1は本実施例の液晶表示体
の断面図、図2は下基板の上面図である。
(Embodiment 1) FIG. 1 is a sectional view of a liquid crystal display of this embodiment, and FIG. 2 is a top view of a lower substrate.

【0032】液晶を駆動するための電極が形成されたS
iウエハより成るTFT基板(以下、「下基板」とい
う。)と低熱膨張低アルカリガラスより成るカラーフィ
ルター基板(以下、「上基板」という。)に配向処理を
施した後、液晶層の厚さとほぼ同じ径を有する非導電性
スペーサー4と導電性スペーサー5を混合したシール剤
6を下基板にスクリーン印刷で所定のパターンに形成
し、上下基板を貼り合わせ加圧加熱硬化を行いセル組を
行った。こののち、上基板のTFTが形成されている表
面と反対側に液晶画素部の直下を除いて耐弗酸性ゴムを
被覆し、弗酸、酢酸、硝酸の混合液を用いて、絶縁層ま
でSiウエハを部分的に除去し、光透過による透過型液
晶画像表示装置を完成させた。
S on which electrodes for driving the liquid crystal are formed
After the orientation process is performed on the TFT substrate (hereinafter referred to as “lower substrate”) made of i-wafer and the color filter substrate (hereinafter referred to as “upper substrate”) made of low thermal expansion low alkali glass, the thickness of the liquid crystal layer is adjusted. A sealing agent 6 in which non-conductive spacers 4 and conductive spacers 5 having almost the same diameter are mixed is formed on the lower substrate by screen printing in a predetermined pattern, and the upper and lower substrates are bonded to each other and pressure-heat-cured to perform cell assembly. It was After that, the surface of the upper substrate opposite to the surface on which the TFT is formed is covered with a hydrofluoric acid-resistant rubber except under the liquid crystal pixel portion, and a mixed solution of hydrofluoric acid, acetic acid, and nitric acid is used to remove Si up to the insulating layer. The wafer was partially removed, and a transmissive liquid crystal image display device by light transmission was completed.

【0033】画素部8には非導電性スペーサーも導電性
スペーサーも全く散布されていない。セルギャップは非
導電性スペーサー4により決定される。下基板1のシー
ル部には電極パット9部を除きAL製の金属導電接続パ
ット3が設けられている。従って、上下基板の導通は共
通透明電極7/導電性スペーサー5/金属導通接続パッ
ト3よりなされる。
Neither non-conductive spacers nor conductive spacers are dispersed in the pixel portion 8. The cell gap is determined by the non-conductive spacer 4. A metal conductive connection pad 3 made of AL is provided on the seal portion of the lower substrate 1 except for the electrode pad 9. Therefore, conduction between the upper and lower substrates is achieved by the common transparent electrode 7 / conductive spacer 5 / metal conductive connection pad 3.

【0034】画素部8にスペーサーが存在しないため、
液晶の配向の乱れ等による白抜けが発生せず、良好な表
示品位が得られた。また、シール長の2/3以上に上下
接続パット3を設けることで、上基板の表示エリアの周
囲から均一に下電極に接続できるため、接続の信頼性が
向上する。さらに、上基板の各画素に対応する部分(共
通透明電極7)の抵抗が、表示エリアの周囲から均等に
接続することによりバラツキが少なくなり表示ムラが発
生しなかった。
Since there is no spacer in the pixel portion 8,
No white spots due to disordered alignment of the liquid crystal were generated, and good display quality was obtained. Further, since the upper and lower connection pads 3 are provided at ⅔ or more of the seal length, it is possible to uniformly connect to the lower electrode from the periphery of the display area of the upper substrate, so that the connection reliability is improved. Furthermore, the resistance of the portion (common transparent electrode 7) corresponding to each pixel on the upper substrate is evenly connected from the periphery of the display area, so that variations are reduced and display unevenness does not occur.

【0035】尚、上記したSiウエハからなるTFT基
板は、上述した多孔質Si使用半導体基板の作製方法を
用いて作製した。
The TFT substrate made of the above Si wafer was manufactured by the above-described method for manufacturing a semiconductor substrate using porous Si.

【0036】また、上基板2は以下の方法で作製した。The upper substrate 2 was manufactured by the following method.

【0037】低熱膨張低アルカリガラス基板にブラック
マトリックスとして、まず二酸化クロム膜をスパッタリ
ング法によって形成し、所定のパターンにフォトエッチ
ングを施した。次に赤、青、緑の各色のフィルターを顔
料分散法にて形成し、トップコート層を設けた後、更に
ITO層をスパッタリング法によって形成し完成させ
た。
As a black matrix on a low thermal expansion low alkali glass substrate, a chromium dioxide film was first formed by a sputtering method, and a predetermined pattern was photoetched. Next, red, blue, and green filters were formed by a pigment dispersion method, a topcoat layer was provided, and then an ITO layer was further formed by a sputtering method to complete.

【0038】(実施例2)図3に示すように上基板2に
シール部にもCrからなる金属層10を積層した以外は
実施例1と同様にして液晶表示体を作製した。
Example 2 A liquid crystal display was produced in the same manner as in Example 1 except that the metal layer 10 made of Cr was laminated also on the upper substrate 2 at the seal portion as shown in FIG.

【0039】上下基板の接続部が金属層10/導電性ス
ぺーサー5/金属性導通接続パット3となるため、透明
電極を介する場合に比べ更に接続の信頼性が向上し、表
示品位の高い画像が得られた。
Since the connecting portions of the upper and lower substrates are the metal layer 10 / conductive spacer 5 / metal conductive connecting pad 3, the connection reliability is further improved and the display quality is high as compared with the case where the transparent electrode is used. An image was obtained.

【0040】(実施例3)上基板(TFT基板)として
石英ガラス上に多結晶シリコンを形成し、多結晶シリコ
ン薄膜に電界効果トランジスタを作製し、接続すること
により、相補性素子、及びその集積回路を作製し、液晶
画像表示装置に必要な画素切り替え素子、駆動回路を形
成した。
(Example 3) Polycrystalline silicon was formed on quartz glass as an upper substrate (TFT substrate), and a field effect transistor was formed on the polycrystalline silicon thin film and connected to form a complementary element and its integration. A circuit was prepared, and a pixel switching element and a drive circuit necessary for a liquid crystal image display device were formed.

【0041】また、下基板として石英ガラス基板にブラ
ックマトリックスとして、まず、二酸化クロム膜をスパ
ッタリング法によって形成し、所定のパターンにフォト
エッチングを施した。次に赤、青、緑の各色のフィルタ
ーを染色法にて形成し、トップコート層を設けた後、更
にITO層をスパッタリング法によって形成し完成させ
た。
Further, as a black substrate on a quartz glass substrate as a lower substrate, a chromium dioxide film was first formed by a sputtering method, and a predetermined pattern was photoetched. Next, red, blue, and green filters were formed by a dyeing method, a topcoat layer was provided, and then an ITO layer was further formed by a sputtering method to complete.

【0042】この上下基板を用いて導電性スペーサー5
の径を非導電性スペーサー4の径より3%大きくした以
外は実施例1と同様にして液晶表示体を作製した。
A conductive spacer 5 is formed by using the upper and lower substrates.
A liquid crystal display was produced in the same manner as in Example 1 except that the diameter of the non-conductive spacer 4 was increased by 3%.

【0043】導電性スペーサー5の径が大きいため、セ
ル組時に加圧してセルギャップを出すときに、導電性ス
ペーサー5の変形の方が非導電性スペーサー4のそれよ
りも大きく、上下基板間の接続がより良好となった。
Since the diameter of the conductive spacers 5 is large, the deformation of the conductive spacers 5 is larger than that of the non-conductive spacers 4 when the cell gap is created by applying pressure when the cells are assembled, and the space between the upper and lower substrates is increased. The connection is better.

【0044】尚、本実施例に於いては導電性スペーサー
5と非導電性スペーサー4の径の差を3%としたが、こ
れは5%以下であれば良い。
In this embodiment, the difference in diameter between the conductive spacer 5 and the non-conductive spacer 4 is set to 3%, but it may be 5% or less.

【0045】(実施例4)非導電性スペーサーとして硬
いシリカスペーサを用い、導電性スペーサーとして柔ら
かいプラスチックスペーサを用いて、スペーサー径を変
えた以外は実施例1と同様にして液晶表示体を作製し
た。
Example 4 A liquid crystal display was produced in the same manner as in Example 1 except that a hard silica spacer was used as the non-conductive spacer and a soft plastic spacer was used as the conductive spacer, and the spacer diameter was changed. ..

【0046】所定のセルギャップが得られるように非導
電性スペーサーの径が選ばれ、導電性スペーサーの径は
非導電性スペーサーの径より3%大きくした。セル組時
に加圧してセルギャップを出すときに、非導電性スペー
サーの径が大きく更に柔らかいため変形が大きく上下間
の電気的接続が良好となる。更に、セルギャップは非導
電性スペーサーにより正確に形成された。
The diameter of the non-conductive spacer was selected so that a predetermined cell gap was obtained, and the diameter of the conductive spacer was 3% larger than the diameter of the non-conductive spacer. When a cell gap is created by applying pressure during cell assembly, the non-conductive spacer has a large diameter and is more soft, so that the deformation is large and the electrical connection between the upper and lower portions is good. Moreover, the cell gap was accurately formed by the non-conductive spacer.

【0047】尚、本実施例に於いては導電性スペーサー
5と非導電性スペーサー4の径の差を3%としたが、こ
れは5%以下であれば良い。
In this embodiment, the difference in diameter between the conductive spacer 5 and the non-conductive spacer 4 is set to 3%, but it may be 5% or less.

【0048】[0048]

【発明の効果】以上説明の様に、本発明によれば画素部
にスぺーサーが存在しないため、白ヌケが発生しない。
また、シール長の2/3以上に上下接続パットを設ける
ことで、表示エリアの周囲から均一に下電極に接続でき
るため、接続の信頼性向上と上電極(共通透明電極)の
低抵抗化が実現でき、表示ムラも発生しない。更に、非
導電性スぺーサーは導電性スぺーサーに比べ安価である
ため、表示品位の高い液晶表示体を低コストで得ること
ができる。
As described above, according to the present invention, since there is no spacer in the pixel portion, white spots do not occur.
In addition, by providing the upper and lower connection pads for ⅔ or more of the seal length, it is possible to connect to the lower electrode uniformly from the periphery of the display area, which improves the connection reliability and lowers the resistance of the upper electrode (common transparent electrode). It can be realized and display unevenness does not occur. Further, since the non-conductive spacer is cheaper than the conductive spacer, a liquid crystal display having high display quality can be obtained at low cost.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の液晶表示体の断面図。FIG. 1 is a sectional view of a liquid crystal display body of the present invention.

【図2】本発明の液晶表示体の下基板の概略上面図FIG. 2 is a schematic top view of a lower substrate of a liquid crystal display body of the present invention.

【図3】本発明の液晶表示体の断面図。FIG. 3 is a sectional view of a liquid crystal display body of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】液晶層を挟み内面に電極を有して対向する
基板、一方の基板上の電極を他方の基板上の電極に接続
するための導電部を有する液晶表示体において、シール
部を導電部とし、少なくとも一方の基板のシール該当部
にシール長の2/3以上の金属製導通用パットを設け、
かつ該シール部のみに導電性スペーサーと非導電性スペ
ーサーが存在することを特徴とする液晶表示体。
1. A liquid crystal display body having substrates facing each other with electrodes on the inner surface sandwiching a liquid crystal layer, and conductive parts for connecting electrodes on one substrate to electrodes on the other substrate. As a conductive portion, at least one of the seal portions of the substrate is provided with a metal conduction pad having a seal length of 2/3 or more,
A liquid crystal display characterized in that a conductive spacer and a non-conductive spacer are present only in the seal portion.
JP7298192A 1992-02-26 1992-02-26 Liquid crystal display body Withdrawn JPH05241183A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7298192A JPH05241183A (en) 1992-02-26 1992-02-26 Liquid crystal display body

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7298192A JPH05241183A (en) 1992-02-26 1992-02-26 Liquid crystal display body

Publications (1)

Publication Number Publication Date
JPH05241183A true JPH05241183A (en) 1993-09-21

Family

ID=13505080

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7298192A Withdrawn JPH05241183A (en) 1992-02-26 1992-02-26 Liquid crystal display body

Country Status (1)

Country Link
JP (1) JPH05241183A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002214627A (en) * 2000-11-17 2002-07-31 Seiko Epson Corp Electrooptical device and its manufacturing method, and projection type display
US6525799B1 (en) 1998-11-27 2003-02-25 Nanox Corporation Liquid crystal display device having spacers with two sizes and metal films and protrusions
US6750937B2 (en) 2000-11-17 2004-06-15 Seiko Epson Corporation Electro-optical device, method for manufacturing the same, and projection display apparatus having an electrically conductive sealing member
KR100525226B1 (en) * 1999-01-06 2005-10-28 마츠시타 덴끼 산교 가부시키가이샤 Liquid crystal display panel
US7443478B2 (en) 1997-03-27 2008-10-28 Semiconductor Energy Laboratory Co., Ltd. Contact structure

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7443478B2 (en) 1997-03-27 2008-10-28 Semiconductor Energy Laboratory Co., Ltd. Contact structure
US7561242B2 (en) 1997-03-27 2009-07-14 Semiconductor Energy Laboratory Co., Ltd. Contact structure
US7616273B2 (en) 1997-03-27 2009-11-10 Semiconductor Energy Laboratory Co., Ltd. Contact structure
US7697102B2 (en) 1997-03-27 2010-04-13 Semiconductor Energy Laboratory Co., Ltd Contact structure
US7760316B2 (en) 1997-03-27 2010-07-20 Semiconductor Energy Laboratory Co., Ltd. Contact structure
US8908138B2 (en) 1997-03-27 2014-12-09 Semiconductor Energy Laboratory Co., Ltd. Contact structure
US9217901B2 (en) 1997-03-27 2015-12-22 Semiconductor Energy Laboratory Co., Ltd. Contact structure
US6525799B1 (en) 1998-11-27 2003-02-25 Nanox Corporation Liquid crystal display device having spacers with two sizes and metal films and protrusions
KR100525226B1 (en) * 1999-01-06 2005-10-28 마츠시타 덴끼 산교 가부시키가이샤 Liquid crystal display panel
JP2002214627A (en) * 2000-11-17 2002-07-31 Seiko Epson Corp Electrooptical device and its manufacturing method, and projection type display
US6750937B2 (en) 2000-11-17 2004-06-15 Seiko Epson Corporation Electro-optical device, method for manufacturing the same, and projection display apparatus having an electrically conductive sealing member

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