JP2824818B2 - Active matrix liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates, about the liquid Akirahyo shows apparatus using a semiconductor optical member having a light-transmitting portion.

[0002]

2. Description of the Related Art The formation of a single-crystal Si semiconductor layer on an insulator is widely known as a silicon-on-insulator (SOI) technique, and is used to fabricate a normal Si integrated circuit.
Much research has been done because devices utilizing SOI technology have numerous advantages that cannot be achieved with i-substrates. That is, by using the SOI technology,. Easy dielectric separation and high integration. Excellent radiation resistance. The stray capacitance is reduced and the speed can be increased. Well steps can be omitted. Latch-up can be prevented. Advantages such as the possibility of a fully depleted field-effect transistor by thinning can be obtained.

[0003] In order to realize many of the above advantages in device characteristics, researches have been made on a method of forming an SOI structure for several decades. This content is, for example, Special Issue: “Single-
crystal silicon on non-si
ngle-crystal insulators ";
edited by G. W. Cullen, Jour
nal of Crystal Growth, vol.
ume 63, no 3, pp. 429-590 (198
3). It is summarized in.

In the past, SOS (silicon-on-sapphire) formed by heteroepitaxially forming Si on a single-crystal sapphire substrate by CVD (chemical vapor deposition).
Is known as the most mature SOI technology, but it has achieved some success. And, above all, the cost of substrates and the delay in increasing their area have hindered their application. In recent years, attempts have been made to realize an SOI structure without using a sapphire substrate. This attempt is roughly divided into the following two. (1) After oxidizing the surface of the Si single crystal substrate, open a window to open the Si
Base was partially exposed and is epitaxially laterally the part as a seed, a single crystal Si onto SiO ₂
Technology for forming layers. (2) A technique in which the surface of a Si single crystal substrate itself is used as an active layer, and SiO ₂ is formed below the surface.

As means for realizing the above (1), CVD is used.
A method in which a single-crystal layer Si is directly laterally epitaxially grown by a method, a method in which amorphous Si is deposited and a solid-phase laterally epitaxial growth is performed by heat treatment, and an electron beam or a laser beam is applied to an amorphous or polycrystalline Si layer. A method in which a single crystal layer is grown on SiO ₂ by converging and irradiating an energy beam such as a laser beam, and a method in which a molten region is scanned in a band shape by a rod-shaped heater (Zone mel)
Ting recrys tallization is known. Although each of these methods has advantages and disadvantages, it still has significant problems in controllability, productivity, uniformity, and quality, and there is no industrially practical method yet. For example, in the CVD method, sacrificial oxidation is required to make the thin film flat, and in the solid phase growth method, the crystallinity is poor. Further, the beam annealing method has a problem in controllability such as processing time by convergent beam scanning, beam overlap, focus adjustment, and the like. Among them, Zone Melting R
Although the crystallization method is the most mature and relatively large-scale integrated circuits have been prototyped, a large number of crystal defects such as sub-grain boundaries still remain, leading to the production of minority carrier devices. Absent. In addition, any of these methods requires a Si substrate, so that a high-quality single-crystal Si layer cannot be obtained on a transparent amorphous insulator substrate such as glass.

The method (2) in which the Si substrate is not used as a seed for epitaxial growth includes the following three methods.

[0007] An oxide film is formed on a Si single crystal substrate having a V-shaped groove anisotropically etched on its surface, and a polycrystalline Si layer is deposited on the oxide film as thick as the Si substrate, and then polished from the back surface of the Si substrate. Is to form a dielectrically separated Si single crystal region surrounded by V-grooves on a thick polycrystalline Si layer. In this method, although the crystallinity is good, a step of depositing polycrystalline Si several hundred μm thick and a step of polishing a single-crystal Si substrate from the back surface to leave only a separated Si active layer are required. Therefore, there is a problem in terms of controllability and productivity.

[0008] Simox (SIMOX: Sepe
ratio by ion implanted o
xygen) is a method of forming an SiO ₂ layer by ion implantation of oxygen into a Si single crystal substrate, and is the most mature method at present because of its good compatibility with the Si process. However, in order to form a SiO ₂ layer,
It is necessary to implant oxygen ions at 10 ¹⁸ ions / cm ² or more, the implantation time is long, productivity cannot be said to be high, and wafer cost is high. Furthermore, many crystal defects remain, and from an industrial point of view, the quality has not reached a level sufficient to produce a minority carrier device.

[0009] This is a method of forming an SOI structure by dielectric isolation by oxidation of porous Si. This method uses P
Ion implantation of an N-type Si layer on the surface of a single-crystal Si single crystal substrate (Imai et al., J. Crystal Growth, v.
ol 63, 547 (1983)) or an island formed by epitaxial growth and patterning, and only the P-type Si substrate is made porous by anodizing in an HF solution so as to surround the Si island from the surface. This is a method of separating an N-type Si island from a dielectric by accelerated oxidation. In this method, the separated Si region is determined before the device process, and there is a problem that the degree of freedom in device design may be limited.

[0010] By the way, forming a semiconductor element on a light-transmitting substrate requires a contact sensor, which is a light receiving element,
This is important in configuring a projection type liquid crystal image display device. Further, in order to further increase the density, resolution and definition of pixels (picture elements) of sensors and display devices, high-performance driving elements are required. In addition, the number of switching elements for switching pixels, the number of terminals of driving circuits and peripheral circuits thereof are enormous, and the two are separately formed, and the mutual connection thereafter has a density that is no longer possible by mechanical connection. As a result, it is desirable that the semiconductor element and the peripheral drive circuit are formed in the same base by performing the same process, and the connection between them is performed in a normal integrated circuit. In this case, high-density mounting can be realized only by patterning a conductive thin film. Further, due to the inevitable industrial demand for higher performance of the product to be produced, it is necessary that the device provided on the light-transmitting substrate be produced using a single crystal layer having excellent crystallinity.

However, on a light-transmitting substrate represented by glass, generally, only amorphous or, at best, a polycrystalline layer is formed, reflecting the disorder of its crystal structure. It has been difficult to produce a drive element having the required or required performance in many crystal structures. This is due to the fact that the crystal structure of the base is amorphous, and a high quality single crystal layer cannot be obtained simply by depositing a Si layer. Any of the above-described methods using a Si single crystal substrate is not suitable for the purpose of obtaining a good quality single crystal layer on a light transmitting substrate.

A light-transmitting substrate represented by glass and Si
Attempts to create a single-crystal thin film Si on a translucent substrate by bonding with a substrate and thinning Si by polishing (Abe, Kuwabara, Nakazato, Uchiyama, Yoshizawa, IEICE technical report, SDM 90-156, 77 (199
0)), but there is no successful example because the difference between the two coefficients of thermal expansion is as large as one digit.

Therefore, a liquid crystal display device provided with an active matrix element, which has been commercialized as a flat panel display or a projection television, has a thin film transistor in which an amorphous or polycrystalline Si semiconductor layer is formed on a glass substrate. (TFT).

FIG. 1 is a schematic diagram for explaining a conventional active matrix type liquid crystal display device. 1 is a pixel switch, 5 is a liquid crystal pixel, 6 is a transparent substrate,
Reference numeral 2 denotes a buffer unit, 3 denotes a horizontal shift register unit, and 4 denotes a vertical shift register unit. The luminance signal and the audio signal of the television are compressed into a certain band and sent to the buffer unit 2 driven by the horizontal shift register 3 having a driving ability capable of following the frequency. Next, a signal is transferred to the liquid crystal by the vertical shift register 4 while the pixel switch 1 is ON.

Considering the high-definition television, the performance required for each circuit is as follows: a frame frequency of 60 Hz, a number of scanning lines of about 1,000, a horizontal scanning period of about 30 μsec (effective scanning period of 27 μsec), a number of horizontal pixels of about 1500, Then, the television signal is transferred to the buffer unit at a frequency of about 45 MHz. The period allowed for signal transfer per scanning line is 1-2 μsec. Therefore, as for the performance required for each element circuit, the driving capability of the horizontal shift register is 45 MHz or more. The driving capability of the vertical shift register is 500 kHz or more. The drive capability of the transfer switch, which is driven by the horizontal shift register and transfers the TV signal to the buffer unit, is 4
5MHz or more. The driving capability of the pixel switch is 500 kHz or more. Becomes The driving capability referred to here means that when an attempt is made to obtain a certain number of gradations N in a liquid crystal pixel, a voltage that gives the maximum or minimum transmittance of the liquid crystal can be obtained from the Vm and VT (voltage-transmittance) curves. Assuming that the threshold voltage of the liquid crystal is Vt, it means that a voltage of Vm− (Vm−Vt) / N [V] or more is transferred within the above period.

As can be seen, the pixel switch
And, the vertical shift register may have relatively small driving capability, but the horizontal shift register and the buffer unit
High-speed driving is required. For this reason, in the current liquid crystal display device, pixel switches and vertical shift registers are made of polycrystalline Si or amorphous SiT deposited on a glass substrate.
It is formed monolithically with the liquid crystal by FT, and other peripheral circuits are supported by mounting an IC chip from outside.

In this case, in order to obtain a bright display image, the amount of light transmitted through the liquid crystal pixel portion must be increased.
On the other hand, in order to mount an IC chip, a glass substrate must have a strength equal to or higher than a certain value, and a glass substrate having a large thickness has been used. Therefore, sufficiently increasing the amount of transmitted light and using a thick glass substrate has caused a rise in manufacturing cost. According to the knowledge of the present inventors, it has been found that the transparent portion of the base under the liquid crystal pixel portion needs to be thin and have high light transmittance and have sufficient mechanical strength.

Moreover, such a configuration is not limited to a liquid crystal image display device, and can be applied to semiconductor optical members such as a contact type image sensor, an X-ray mask or a viewfinder, a pressure sensor, and micromechanics. It turned out.

On the other hand, by using a polycrystalline silicon TFT,
Attempts have been made to form the peripheral circuits monolithically, but since the driving capability of each TFT is small,
It is necessary to increase the size of the transistor and to make the circuit complicated.

[0020]

In order to further increase the density, resolution and definition of pixels (picture elements) of a display device, a high-performance driving element is required. In addition, the number of terminals of the switching element for switching pixels and the number of terminals of its driving circuit and peripheral circuits become enormous, and as described above, the mutual connection after separately creating both is no longer a mechanical connection (wire bonding, wire bonding, Bump connection etc.), the density becomes impossible. As a result, the semiconductor device and the peripheral driving circuit are processed in the same process in the same substrate,
It is desirable to make them, and the connection between them should be made by patterning of a conductive thin film as is done in a normal integrated circuit process. It becomes. In addition, due to the inevitable industrial demand for higher performance of the product to be produced, it is necessary to use a single crystal layer having the highest crystallinity as an element provided on a light-transmitting substrate. .

Therefore, it is very difficult to produce a driving element having the required or sufficient performance in amorphous Si or polycrystalline Si due to the crystal structure having many defects.

In addition to the above-mentioned technical problems of the base, the present inventors have found that in order to obtain a high-performance liquid crystal image display device, the structure of the switching element of the liquid crystal pixel portion and the semiconductor element of the peripheral circuit I realized that I had to design the structure from a new point of view.

[0023]

SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal having a high quality single crystal semiconductor layer on the same substrate which can satisfy the above-mentioned problems and the above-mentioned requirements.
It is to provide a Akirahyo示装location.

[0024] That is, the liquid crystal material present onset Ming, in which the one substrate comprising a switching element and a peripheral circuit of the image display unit, and the other substrate with a transparent electrode, is sandwiched by the one of substrates and the other substrate In the active matrix liquid crystal display device having, the one substrate has an epitaxial semiconductor layer including the switching element and the peripheral circuit, there is an insulating layer below the epitaxial semiconductor layer, the under the insulating layer, The present invention relates to an active matrix liquid crystal display device including a single crystal semiconductor layer other than below an image display portion.

[0025] The liquid crystal display device of the present onset Ming further as its features, "said epitaxial semiconductor region and the single crystal semiconductor layer comprises Si" that, "the insulating layer comprises an oxide Si" that, "the "There is a transparent member under the image display part below the insulating layer."
i "," the transparent member contains a resin ",
"The single crystal semiconductor layer is tapered toward the insulating layer around the image display unit",
"The switching element and the peripheral circuit include a transistor", "the thickness of the active layer of the transistor of the peripheral circuit is larger than the thickness of the active layer of the switching element", and "the transistor of the switching element is M
It has an OS structure, and the transistor of the peripheral circuit is CMO
S single-crystal semiconductor layer "and" the single crystal semiconductor layer is provided with a potential regulating means ".

According to the present invention, an Si single crystal substrate which is excellent in economical efficiency and is extremely flat over a large area and has extremely excellent crystallinity is used. Integrates elements and circuits with high radiation resistance, low stray capacitance of the above semiconductor elements, high-speed operation, no latch-up phenomenon, etc. on the same substrate as the liquid crystal image display pixels. A high-performance device can be provided.

Further, in the liquid crystal image display device of the present invention, the substrate that is impermeable to light in the visible light region has a thickness of about 60
Since it is as thick as 0 μm, there is a contrivance to accurately remove the lower part of the liquid crystal pixel portion. As will be described later, the angle between the slope after removing the substrate and the membrane is preferably 55 ° to 90 °, and more preferably 90 °. Further, it is preferable that the removal of the substrate is surely completed when the substrate reaches the membrane. However, in the present invention, since a substrate having anisotropic etching characteristics is used as the substrate, the substrate can be accurately removed at an angle of 55 ° or more. Good removal is possible.

The etching method is not particularly limited, and a known method can be used, but chemical etching having a large selectivity is preferred. Among them, wet etching is preferable due to its low cost, and dry etching, particularly RIE (reactive ion etching) is preferable due to its high anisotropy.

FIG. 2 is a schematic view schematically showing one example of a manufacturing process of a liquid crystal image display device using the conventional SOI technology . In FIG. 1A, a substrate 7 is a non-translucent substrate,
8 is a translucent insulating layer, 9 is a semiconductor single crystal layer. This substrate structure is widely known as an SOI structure, and two semiconductor substrates are bonded together via an insulating layer to make one of the substrates thinner, and is suitable in that the insulating layer can be freely selected. ing. A pixel switching element which is a semiconductor active element required for a liquid crystal image display device as shown in FIG. 2B by using a known integrated circuit process technique on the SOI substrate shown in FIG. 10, a drive circuit 11, and a peripheral circuit 12 are created. After that, Figure 2
As shown in (c), the liquid crystal 14 is sealed using the cover glass 15 and the sealing material 13. Needless to say, the liquid crystal portion requires an alignment film, a counter electrode, a filter, a polarizing plate, and the like, but these are well-known technical items and will not be described here. In this state, since the substrate is not transparent to visible light, it is not used as a projection display device in which a light source is arranged behind the substrate. So, finally, Figure 2
As shown in (d), the non-light-transmitting substrate 7 below the liquid crystal pixel portion 16 is removed from the back surface to the light-transmitting insulating layer 8 so as to be substantially light-transmitting, thereby producing a projection type liquid crystal image display device. I do. It is also possible to fill the region 16 that has been partially removed due to a request for improvement in mechanical strength or reliability with a transparent resin, spin-on glass, or the like.

Further, according to the liquid crystal image display device of the present invention, the light-transmitting region obtained by removing the non-light-transmitting substrate
At least provided N _x insulating layer, and the mechanical strength of the portion, it is preferable to improve the reliability.

The method of forming the SiN _x insulating layer includes sputtering, low pressure CVD, and plasma CVD, but low pressure CVD is preferable from the viewpoint of controllability. The film configuration may be provided on the upper layer film (protective film) of the device, may be provided on the interlayer insulating film (inter-wiring film), or may be provided on the base insulating film.
Moreover, you may provide in these several parts. Furthermore, SiN
_The strength can be controlled by the thickness and patterning of the _x insulating layer.

FIG. 3 is a schematic diagram schematically showing another example of the manufacturing process of the liquid crystal image display device using the conventional SOI technology . 3A, a substrate 7 is a non-light-transmitting substrate, 8 is a light-transmitting insulating layer, and 9 is a semiconductor single crystal layer.
This substrate structure is widely known as an SOI structure,
A semiconductor substrate is bonded with an insulating layer interposed therebetween, and one of the substrates is thinned, which is suitable in that an insulating layer can be freely selected. SOI shown in FIG.
Using a known integrated circuit process technology for the substrate, FIG.
As shown in (b), a pixel switching element 10, a driving circuit 11, and a peripheral circuit 12, which are semiconductor active elements required for a liquid crystal image display device, are created. Thereafter, as shown in FIG. 3C, the liquid crystal 14 is sealed using the cover glass 15 and the sealing material 13. Needless to say, the liquid crystal portion requires an alignment film, a counter electrode, a filter, a polarizing plate, and the like, but these are well-known technical items and will not be described here. In this state, since the substrate is not transparent to visible light, it is not used as a projection display device in which a light source is arranged behind the substrate. Therefore, as shown in FIG. 3D, the non-light-transmitting substrate 7 below the liquid crystal pixel portion 16 is removed from the back surface to the light-transmitting insulating layer 8 so that the light is substantially transmitted. Then, a SiN _x insulating layer 17 is formed on the light-transmitting region from the back surface to form a projection-type liquid crystal image display device.

In the above-described display device, the thickness of the semiconductor active layer of the switching element 10 is set to
By making the thickness of the semiconductor active layer of the peripheral circuit 12 including the semiconductor device 1 smaller than that of the semiconductor device, a high-performance device can be obtained.

The liquid crystal display device of the present invention is an epitaxial liquid crystal display device.
Although it is configured using a semiconductor layer, the epitaxy
The semiconductor layer can be formed well using a porous semiconductor.
Can be.

Here, the method for manufacturing the liquid crystal display device of the present invention.
The manufacturing process described using a porous semiconductor as.

Porous Si as a porous semiconductor used in this step was discovered by Uhril et al. In 1956 in the course of research on semiconductor electropolishing (A. Uh).
lir, Bell Syst. Tech. J. , Vol
35, 333 (1956)). In addition, eel, etc.
The dissolution reaction of Si in anodization was studied, and holes were necessary for the anodic reaction of Si in HF solution.
It is reported as follows (T. Unagami: JE
electrochem. Soc. , Vol. 127,4
76 (1980)).

[0037] Si + 2HF + (2-n ) e + → SiF 2 + 2H + + ne - SiF 2 + 2HF → SiF 4 + H 2 SiF 4 + 2HF → H 2 SiF 6 or, Si + 4HF + (4- λ) e + → SiF 4 + 4H + + λe ^- where _{SiF 4 + 2HF → H 2 SiF} 6, e + , e ^-, respectively, represent the holes and electrons. Further, n and λ are the number of holes required for dissolving the Si1 atom, respectively, and it is assumed that porous Si is formed when the condition of n> 2 or λ> 4 is satisfied.

As described above, holes are required to form porous Si, and P-type Si is more easily transformed into porous Si than N-type Si. However, it is known that N-type Si is also transformed into porous Si when holes are injected (RP Holmstrom and JYC).
hi. Appl. Phys. Lett. Vol. 42,
386 (1983)).

This porous Si layer has a HF solution concentration of 50 to 2 compared to the density of single crystal Si of 2.33 g / cm ^3.
By changing the density to 0%, the density is 1.1 to 0.6 g.
/ Cm ³ . According to observation with a transmission electron microscope, the porous Si layer has holes having an average diameter of about 600 °. Although the density is less than half that of single crystal Si, single crystallinity is maintained, and a single crystal Si layer can be epitaxially grown on the porous layer.

In general, when a Si single crystal is oxidized, its volume increases about 2.2 times. However, by controlling the density of porous Si, its volume expansion can be suppressed, and the warpage of the base and the warpage of the substrate can be reduced. In addition, cracks introduced into the surface remaining single crystal layer can be avoided. The volume ratio R of single-crystal Si to porous Si after oxidation can be expressed as follows.

R = 2.2 × (A / 2.33) where A is the density of porous Si. If R = 1,
That is, when there is no volume expansion after oxidation, A = 1.06
(G / cm ³ ), and the density of the porous Si layer is 1.06
By doing so, volume expansion can be suppressed.

Further, since the porous layer has a large amount of voids formed therein, the density is reduced to less than half. As a result, the surface area increases dramatically compared to the volume,
The chemical etching rate is significantly increased compared to the etching rate of the non-porous Si layer.

This step utilizes the properties of the porous Si layer described above, and is characterized in that a non-porous non-porous material having excellent crystallinity is formed on a porous first Si substrate. A single-crystal Si layer is formed, or an insulating layer is further formed on the non-porous single-crystal Si layer, and the surface of the non-porous single-crystal Si layer or the surface of the insulating layer has a surface having the insulating layer. 2
And then removing the porous first Si substrate by at least a process including wet chemical etching to form a single crystal Si having excellent crystallinity on the bonded insulating layer. Forming a layer, and further forming a part of the second Si base or a part of the insulating layer bonded to the second Si base on a surface of the second Si base on which the single crystal Si layer is not formed. A continuous thin layer (single-crystal Si layer) is obtained by removing at least a process including wet chemical etching from the (back surface) until the insulating surface of the bonded insulating layer or the Si single-crystal surface of the single-crystal Si layer is exposed. ) Without the support directly underneath.

In this step , after forming a single-crystal Si layer having excellent crystallinity on the insulating layer bonded by the above-described step, an electronic device is formed on this single-crystal Si layer, and at least a part of the single-crystal Si layer is formed. A part of the second Si base or a part of the insulating layer bonded to the second Si base, including a part immediately below the region where the electronic device is formed, is formed by a single crystal Si layer of the second Si base. A continuous thin layer is formed by removing at least a process including wet chemical etching from the surface (rear surface) where the insulating layer is not formed, until the insulating surface of the bonded insulating layer or the Si single crystal surface of the single crystal Si layer is exposed. (Single-crystal Si
Together is left without support immediately below the layer), it is varied non-light-transmitting substrate only directly under at least an electronic device a desired region of the formed single crystal Si layer as possible light transmission partially transmissive it can.

According to this step , after a single-crystal Si layer is formed on the non-light-transmitting insulating substrate, the non-light-transmitting substrate portion is removed only in a necessary region, so that the non-light-transmitting substrate is formed on the non-light-transmitting substrate. It becomes possible to partially irradiate light only in a necessary region of the formed single crystal Si layer, and easily and without productivity, uniformity, controllability, A light-transmitting SOI structure having a Si layer excellent in crystallinity as excellent as a single-crystal wafer can be formed in terms of economic efficiency.

First, an etching solution that can be suitably used in this step will be described.

FIGS. 4 to 11 show that, for porous Si and non-porous Si, respectively, hydrofluoric acid, a mixed solution of hydrofluoric acid and alcohol, a mixed solution of hydrofluoric acid and hydrogen peroxide, and hydrofluoric acid. A mixture of alcohol and hydrogen peroxide, buffered hydrofluoric acid, a mixture of buffered hydrofluoric acid and alcohol, a mixture of buffered hydrofluoric acid and hydrogen peroxide, and a mixture of buffered hydrofluoric acid and alcohol The etching characteristics of a mixed solution with hydrogen oxide water are shown.

The porous Si is prepared by anodizing single-crystal Si, and the conditions are as follows. The starting material of porous Si formed by anodization is not limited to single-crystal Si, but may be Si having another crystal structure.

Applied voltage: 2.6 (V) Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1:
1: 1 time: 2.4 (hour) Thickness of porous Si: 300 (μm) Porosity: 56 (%) FIG. 4 shows that porous Si and non-porous single crystal Si are infiltrated with hydrofluoric acid. Etched porous Si when stirred
And the etching time dependence of the thickness of single crystal Si.

The porous Si prepared under the above conditions was infiltrated with 49% hydrofluoric acid (open circles) at room temperature and stirred. Later, the decrease in the thickness of the porous Si was measured. Porous Si
Is rapidly etched, having a high degree of surface properties, and being uniformly etched to 90 μm in about 40 minutes and to 205 μm after 80 minutes. The etching rate depends on the solution concentration and the temperature.

Further, single-crystal Si having a thickness of 500 μm was soaked in 49% hydrofluoric acid (black circles) at room temperature and stirred. later,
The decrease in the thickness of the single crystal Si was measured. Single crystal Si
Even after a lapse of 80 minutes, the etching was less than 60 °.

FIG. 5 shows the thicknesses of the etched porous Si and the single-crystal Si when the porous Si and the non-porous single-crystal Si were infiltrated into the mixed solution of hydrofluoric acid and alcohol without stirring. Of FIG.

The porous Si prepared under the above conditions was mixed at room temperature with a mixture of 49% hydrofluoric acid and alcohol (10:
1) (white circles) infiltrated without stirring. Later, the decrease in the thickness of the porous Si was measured. The porous Si is rapidly etched to 85 μm in about 40 minutes,
After lapse of minutes, 195 μm has a high degree of surface properties,
Etched uniformly. The etching rate depends on the solution concentration and the temperature.

In particular, by adding alcohol, bubbles of the reaction product gas can be instantaneously removed from the etched surface without stirring, and the porous Si can be etched uniformly and efficiently.

Further, a single-crystal Si having a thickness of 500 μm is mixed with 49% hydrofluoric acid and alcohol at room temperature (10: 1).
(Black circles) infiltrated without stirring. Later, the decrease in the thickness of the single crystal Si was measured. The single crystal Si was etched only 60 ° or less even after 80 minutes.

FIG. 6 shows that the porous Si and the non-porous single-crystal Si are infiltrated into a mixed solution of hydrofluoric acid and hydrogen peroxide solution, and are stirred and stirred. 4 shows the etching time dependency of the thickness.

The porous Si prepared under the above conditions was immersed in a mixed solution of 49% hydrofluoric acid and 30% hydrogen peroxide (1: 5) (open circles) at room temperature and stirred. Later, the decrease in the thickness of the porous Si was measured. The porous Si is rapidly etched, having a high surface property of 112 μm in about 40 minutes and 256 μm after 80 minutes, and is uniformly etched. The etching rate depends on the solution concentration and the temperature.

In particular, by adding the hydrogen peroxide solution, the oxidation of Si can be accelerated, and the reaction rate can be increased as compared with the case of not adding the hydrogen peroxide solution. , Its reaction rate can be controlled.

Further, single-crystal Si having a thickness of 500 μm was infiltrated at room temperature into a mixed solution (1: 5) of 49% hydrofluoric acid and 30% hydrogen peroxide (black circle) and stirred. Later, the decrease in the thickness of the single crystal Si was measured. The single crystal Si was etched only 60 ° or less even after 80 minutes.

FIG. 7 shows that the porous Si and the non-porous single crystal Si were infiltrated into a mixed solution of hydrofluoric acid, alcohol and aqueous hydrogen peroxide without stirring, and the etched porous Si and 4 shows the etching time dependency of the thickness of single crystal Si.

The porous Si prepared under the above conditions was infiltrated at room temperature into a mixture of 49% hydrofluoric acid, alcohol and 30% aqueous hydrogen peroxide (10: 6: 50) (open circles) without stirring. Later, the decrease in the thickness of the porous Si was measured. The porous Si is rapidly etched to 106 μm in about 40 minutes, and 244 μm after 80 minutes.
Also have a high degree of surface properties and are uniformly etched.
The etching rate depends on the solution concentration and the temperature.

In particular, by adding alcohol, bubbles of the reaction gas generated by the etching can be instantaneously removed from the etching surface without stirring, and the porous Si can be etched uniformly and efficiently.

In particular, by adding a hydrogen peroxide solution, the oxidation of Si can be accelerated, and the reaction rate can be increased as compared with the case where no hydrogen peroxide is added. With this, the reaction speed can be controlled.

The single-crystal Si having a thickness of 500 μm was infiltrated at room temperature into a mixed solution (10: 6: 50) of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (black circle) without stirring. Later, the decrease in the thickness of the single crystal Si was measured. The single crystal Si was etched only 60 ° or less even after 80 minutes. FIG. 8 shows the etching time dependency of the thickness of the etched porous Si and single-crystal Si when porous Si and non-porous single-crystal Si are infiltrated with buffered hydrofluoric acid and stirred.

The porous Si produced under the above conditions was treated with buffered hydrofluoric acid (4.5% HF + 36% NH) at room temperature.
₄ F _{+ H} 2 O) infiltrate the (open circles), and stirred. Later, the decrease in the thickness of the porous Si was measured. The porous Si is rapidly etched to 70 μm in about 40 minutes, and
After elapse of 0 minutes, even 140 μm is uniformly etched with a high degree of surface property. The etching rate depends on the solution concentration and the temperature.

Further, 500 μm-thick single-crystal Si was treated with buffered hydrofluoric acid (4.5% HF + 36% NH ₄₎ at room temperature.
F + H ₂ O) (filled circles) and stirred. Later, the decrease in the thickness of the single crystal Si was measured. Single crystal Si is 12
Even after a lapse of 0 minutes, the etching was less than 100 °.

FIG. 9 shows the etched porous Si and single-crystal Si when the porous Si and the non-porous single-crystal Si were infiltrated into a mixed solution of buffered hydrofluoric acid and alcohol without stirring. 4 shows the etching time dependence of the thickness of the film.

The porous Si produced under the above conditions was treated with buffered hydrofluoric acid (4.5% HF + 36% NH) at room temperature.
₄ F + H ₂ O) and alcohol mixture (10: 1)
(Open circles) infiltrated without stirring. Later, the decrease in the thickness of the porous Si was measured. Porous Si is rapidly etched, having a high surface property of 67 μm in about 40 minutes and 112 μm after 120 minutes, and is uniformly etched. The etching rate depends on the solution concentration and the temperature.

In particular, by adding alcohol, bubbles of the reaction gas generated by the etching can be instantaneously removed from the etching surface without stirring, and the porous Si can be etched uniformly and efficiently.

Further, 500 μm-thick single-crystal Si was treated with buffered hydrofluoric acid (4.5% HF + 36% NH ₄₎ at room temperature.
F + H ₂ O) and an alcohol mixture (10: 1) (filled circles) were infiltrated without stirring. Later, the single crystal S
The decrease in the thickness of i was measured. The single crystal Si was etched only 100 ° or less even after elapse of 120 minutes.

FIG. 10 shows that porous Si and non-porous single crystal Si were infiltrated into a mixed solution of buffered hydrofluoric acid and aqueous hydrogen peroxide, and were etched when stirred. 4 shows the etching time dependency of the thickness of Si.

The porous Si produced under the above conditions was treated with buffered hydrofluoric acid (4.5% HF + 36% NH) at room temperature.
₄ F _{+ H} 2 O) and mixed solution of 30% hydrogen peroxide (1:
5) Infiltrated (white circle) and stirred. Later, the porous Si
Was measured for a decrease in thickness. Porous Si is rapidly etched, having a high surface property of 88 μm in about 40 minutes and 147 μm after 120 minutes, and is uniformly etched. The etching rate depends on the solution concentration and the temperature.

In particular, by adding the hydrogen peroxide solution, the oxidation of Si can be accelerated, and the reaction rate can be increased as compared with the case of not adding the hydrogen peroxide solution. , Its reaction rate can be controlled.

Further, 500 μm-thick single-crystal Si was treated with buffered hydrofluoric acid (4.5% HF + 36% NH ₄₎ at room temperature.
F + H ₂ O) and a 30% hydrogen peroxide aqueous solution (1:
5) Infiltrated (black circles) and stirred. Later, the single crystal Si
Was measured for a decrease in thickness. The single crystal Si was etched only 100 ° or less even after elapse of 120 minutes.

FIG. 11 shows that the porous Si and the non-porous single-crystal Si were wetted without being stirred in a mixed solution of buffered hydrofluoric acid, alcohol and aqueous hydrogen peroxide. 4 shows the etching time dependency of the thickness of Si and single crystal Si.

The porous Si prepared under the above conditions was treated with buffered hydrofluoric acid (4.5% HF + 36% NH) at room temperature.
₄ F _{+ H} 2 O) and mixed solution of alcohol and 30% hydrogen peroxide (10: 6: 50) was infiltrated without stirring (white circles). Later, the decrease in the thickness of the porous Si was measured. Porous Si is rapidly etched, 83 μm in about 40 minutes, and 140 μm after 120 minutes.
It has a high degree of surface properties and is uniformly etched. The etching rate depends on the solution concentration and the temperature.

In particular, by adding alcohol, bubbles of a reaction gas generated by etching can be instantaneously removed from the etching surface without stirring, and the porous Si can be etched uniformly and efficiently.

In particular, by adding a hydrogen peroxide solution, the oxidation of Si can be accelerated, and the reaction rate can be increased as compared with the case of not adding the hydrogen peroxide solution. With this, the reaction speed can be controlled.

Further, a 500 μm-thick single-crystal Si film was treated with buffered hydrofluoric acid (4.5% HF + 36% NH ₄₎ at room temperature.
F + H ₂ O), a mixture of alcohol and 30% aqueous hydrogen peroxide (10: 6: 50) (filled circle) was infiltrated without stirring. Later, the decrease in the thickness of the single crystal Si was measured. The single crystal Si is kept at 100 ° even after 120 minutes.
Only the following were etched.

The porous Si and the single crystal Si after the etching with the above-described etching solution were washed with water, and the surface thereof was trace-analyzed with secondary ions. As a result, no impurities were detected.

Although the solution concentration of the hydrogen peroxide solution is 30% here, it is set to a concentration that does not impair the effect of adding the hydrogen peroxide solution and that is practically acceptable in the manufacturing process and the like.

The conditions of the solution concentration and the temperature are set within a range in which the effects of hydrofluoric acid, buffered hydrofluoric acid and the above-mentioned hydrogen peroxide solution or the above-mentioned alcohol are exhibited, and the etching rate is practically acceptable in the manufacturing process and the like.

In this step , the case of the above-mentioned solution concentration and room temperature is taken as an example, but this step is not limited to such conditions.

The HF concentration is set in the range of preferably 1 to 95%, more preferably 5 to 90%, and still more preferably 5 to 80% with respect to the etching solution.

The HF concentration in the buffered hydrofluoric acid is preferably set in the range of 1 to 95%, more preferably 1 to 85%, and still more preferably 1 to 70% with respect to the etching solution. The NH ₄ F concentration in the acid is set in the range of preferably 1 to 95%, more preferably 5 to 90%, and still more preferably 5 to 80% with respect to the etching solution.

The H ₂ O ₂ concentration is different from that of the etching solution.
It is preferably set in the range of 1 to 95%, more preferably 5 to 90%, and still more preferably 10 to 80%, and within a range in which the effect of the hydrogen peroxide solution is exhibited.

The alcohol concentration is set to preferably 80% or less, more preferably 60% or less, further preferably 40% or less with respect to the etching solution, and is set within a range in which the effect of the alcohol is exerted.

The temperature is set in the range of preferably 0 to 100 ° C., more preferably 5 to 80 ° C., and still more preferably 5 to 60 ° C.

The alcohol used in the present invention may be ethyl alcohol, isopropyl alcohol, or any other alcohol that can be used in the production process or the like and has the above-mentioned effect of adding alcohol.

Next, a method for epitaxially growing a single crystal after making the substrate porous will be described.

As shown in FIG. 12 (a), first, a Si single crystal substrate was prepared and anodized (An
The entirety of the substrate is made porous by an oxidation method to form a porous single-crystal Si substrate 18. Epitaxial growth is performed on the porous substrate surface by various growth methods to form a thin film single crystal layer 19.

As shown in FIG. 12B, another S
After preparing the i-base 20 and forming the insulating layer 21 on the surface thereof, the Si base having the insulating layer 21 on the surface is attached to the insulating layer 22 formed on the single-crystal Si layer on the porous Si base. Put on. In this attaching step, the cleaned surfaces are brought into close contact with each other, and then heated in an oxidizing atmosphere or a nitrogen atmosphere. The insulating layer 22 is a single crystal layer 19 which is a final active layer.
Formed to reduce the interface state of
The insulating layer 22 is not necessarily required for applications in which the interface state does not matter, such as micromechanics.

As shown in FIG. 12C, the entire porous Si substrate 18 is subjected to electroless wet chemical etching of only the porous Si with the above-mentioned porous Si selective etching solution to form an insulating layer 21 or 22 thereon. The thin-film single-crystal Si layer 19 is left and formed. According to this step, the single-crystal Si layer 19 having the same crystallinity as the Si wafer is flattened and uniformly thinned on the Si base 20 via the insulating layers 21 and 22.
A large area is formed over the entire area of the wafer.

Next, as shown in FIG. 12D, the entire surface of the etching prevention film 23 is removed except for the rear surface region to be made light-transmitting.
Then, the Si substrate 20 or the Si substrate 20 and the insulating layers 21 and 22 are removed by etching until the insulating surface of the insulating layer 21 or the single crystal surface of the single crystal Si layer 19 is exposed from the opening. FIG. 12 shows an example in which only the Si base 20 is removed by etching.

As shown in FIG. 12E, after the etching prevention film 23 is peeled off, the partially transparent S
A single-crystal Si layer 19 having a crystallinity equivalent to that of a silicon wafer is flattened and uniformly thinned on the i-substrate 20 and the insulating layers 21 and 22 to form a large area over the entire wafer.

A thin layer (Mem) on the surface of the light-transmitting region
There is no support directly underneath (a single crystal Si layer or a single crystal Si layer and an insulating layer).

A method for forming an electronic device on a single crystal semiconductor layer before making the above-described substrate light-transmitting will be described.

First, the steps shown in FIGS.
This is the same as FIGS. 12 (a) to 12 (c).

Next , as shown in FIG. 13D, a transistor, a diode, a capacitor,
An electronic device such as a resistor or an integrated circuit 24 thereof is formed.

Next, as shown in FIG. 13E, except for the back surface region which is made to be light-transmitting, the entire surface is etched away.
Then, the Si substrate 20 or the Si substrate 20 and the insulating layers 21 and 22 are removed by etching until the insulating surface of the insulating layer 21 or the single crystal surface of the single crystal Si layer 19 is exposed from the opening. The region to be translucent contained at least one or more electronic devices. FIG.
An example is shown in which only the i-base 20 is removed by etching.

As shown in FIG. 13 (f), after the etching prevention film 23 is peeled off, the partially transparent S
An electronic device 24 is formed in the single-crystal Si layer 19 on the i-base 20 and the insulating layers 21 and 22, and is translucent.

The support does not exist directly under the thin layer (single-crystal Si layer or the single-crystal Si layer and the insulating layer) in which the electronic device is incorporated on the surface of the light-transmitting region. .

Next, a method for forming a single crystal layer before making it porous and thereafter selectively making only the substrate porous by anodizing will be described.

First, as shown in FIG. 14A, a low impurity concentration layer 32 is formed by epitaxial growth using various thin film growth methods. Alternatively, the P-type Si single crystal substrate 31
Ions are implanted into the surface of the substrate to form an N-type single crystal layer 32.

Next, as shown in FIG.
The i-single-crystal substrate 31 is transformed from the back surface into a porous single-crystal Si substrate 33 by an anodization method using an HF solution.

As shown in FIG. 14C, another S
After preparing an i-base 34 and forming an insulating layer 35 on the surface thereof, an Si base having the insulating layer 35 on the surface is attached to the surface of the insulating layer 36 formed on the single-crystal Si layer on the porous Si base. wear. In this attaching step, the cleaned surfaces are brought into close contact with each other, and then heated in an oxidizing atmosphere or a nitrogen atmosphere. The insulating layer 36 is a single crystal layer 32 as a final active layer.
Formed to reduce the interface state of
The insulating layer 36 is not necessarily required for applications in which the interface state does not matter, such as micromechanics.

As shown in FIG. 14D, the entire porous Si substrate 33 is subjected to electroless wet chemical etching of only the porous Si by the above-mentioned porous Si selective etching solution to form insulating films 35 and 36 on the insulating layers 35 and 36. The thin-film single-crystal Si layer 32 is left and formed. By this step, the single-crystal Si layer 32 having the same crystallinity as that of the silicon wafer is flattened and uniformly thinned on the Si base 34 via the insulating layers 35 and 36, and the entire area of the wafer has a large area. It is formed.

Next, as shown in FIG. 14E, except for the back surface region which is made to be light-transmitting, the entire surface is etched-etched.
Then, the Si substrate 34 or the Si substrate 34 and the insulating layers 35 and 36 are removed by etching until the insulating surface of the insulating layer 35 or the single crystal surface of the single crystal Si layer 32 is exposed from the opening. FIG. 14 shows an example in which only the Si base 34 is removed by etching.

As shown in FIG. 14F, after the etching prevention film 37 is peeled off, the partially transparent S
A single-crystal Si layer 32 having a crystallinity equivalent to that of a silicon wafer is flattened and uniformly thinned on the i-substrate 34 and the insulating layers 35 and 36 to form a large area over the entire wafer.

The thin layer (Mem) on the surface of the light-transmitting region
There is no support directly underneath (a single crystal Si layer or a single crystal Si layer and an insulating layer).

Next, a method for forming an electronic device on a single crystal semiconductor layer before making the substrate light-transmitting will be described.

First, the steps shown in FIGS.
This is similar to FIGS. 14 (a) to 14 (c).

Here, as shown in FIG. 15E, an electronic device such as a transistor, a diode, a capacitor, and a resistor or an integrated circuit 47 thereof is formed on the single crystal Si layer 42.
To form

Next, as shown in FIG. 15F, the entire surface of the etching prevention film 48 is removed except for the rear surface region to be made light-transmitting.
Then, the Si substrate 44 or the Si substrate 44 and the insulating layers 45 and 46 are removed by etching until the insulating surface of the insulating layer 45 or the single crystal surface of the single crystal Si layer 42 is exposed from the opening. The region to be translucent contained at least one or more electronic devices. FIG.
An example in which only the i-base 44 is removed by etching is shown.

As shown in FIG. 15 (g), after the etching prevention film 48 is peeled off, the partially transparent S
An electronic device 47 is formed in the single-crystal Si layer 42 on the i-base 44 and the insulating layers 45 and 46, and is translucent.

The support does not exist directly under the thin layer (single-crystal Si layer or the single-crystal Si layer and the insulating layer) in which the electronic device is incorporated on the surface of the light-transmitting region. .

Next, a method for forming another semiconductor substrate will be described.

First, a Si single crystal substrate was prepared, and
It is made porous by an anodizing method using an F solution. The density of single-crystal Si is 2.33 g / cm ³ , but the density of the porous Si substrate is changed to 0.6 to 1.1 g / cm ³ by changing the HF solution concentration to 20 to 50% by weight. Can be done. This porous layer, for the reasons described above,
It is easily formed on a P-type Si substrate.

Further, since the porous layer has a large amount of voids formed therein, the density is reduced to less than half. As a result, the surface area increases dramatically compared to the volume,
The chemical etching rate is significantly increased compared to the etching rate of a normal single crystal layer.

The conditions for making single-crystal Si porous by anodizing are shown below. The starting material of the porous Si formed by anodization is not limited to single crystal Si, but may be Si having another crystal structure.

Applied voltage: 2.6 (V) Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1:
1: 1 time: 2.4 (hour) Thickness of porous Si: 300 (μm) Porosity: 56 (%) Si is epitaxially grown on the porous Si substrate thus formed, and a single crystal Si thin film is formed. To form
The thickness of the single crystal Si thin film is preferably 50 μm or less, more preferably 20 μm or less.

Next, after oxidizing the surface of the single-crystal Si thin film, a base that will eventually constitute a substrate is prepared.
The oxide film on the surface of the single-crystal Si is bonded to the substrate. Alternatively, the surface of a newly prepared single crystal Si substrate is oxidized and then bonded to the single crystal Si layer on the porous Si substrate. The reason why this oxide film is provided between the substrate and the single-crystal Si layer is that, for example, when glass is used as the substrate, the interface level generated by the underlying interface of the Si active layer is higher at the oxide film interface than at the glass interface. This is because the lower the level, the more significantly the characteristics of the electronic device can be improved. However, in the present invention, since a semiconductor or a conductor is used for the substrate to control the back potential, the oxide film An insulating layer is required. Further, the single crystal S obtained by etching and removing the porous Si substrate by selective etching described later.
Only the i-thin film may be bonded to a new substrate. The lamination is sufficiently adhered so that the surfaces cannot be easily peeled off by van der Waals force only by contacting each surface at room temperature after washing.
C., preferably at a temperature of 600 to 900.degree. C. in a nitrogen atmosphere and completely bonded.

Further, an Si ₃ N ₄ layer is deposited as an etching prevention film on the whole of the two bonded substrates, and only the Si ₃ N ₄ layer on the surface of the porous Si substrate is removed. Apiezon wax may be used in place of the Si ₃ N ₄ layer. Thereafter, the entirety of the porous Si substrate is removed by means such as etching to obtain a semiconductor substrate having a thin-film single-crystal Si layer.

A selective etching method for electrolessly wet-etching only the porous Si substrate will be described.

An etching solution having no etching action on crystalline Si and capable of selectively etching only porous Si includes buffered solutions such as hydrofluoric acid, ammonium fluoride (NH ₄ F) and hydrogen fluoride (HF). A mixed solution of hydrofluoric acid or buffered hydrofluoric acid to which hydrofluoric acid and aqueous hydrogen peroxide are added, and a mixed solution of hydrofluoric acid or buffered hydrofluoric acid to which alcohol is added are preferably used. The substrate bonded to these solutions is wetted and etched. The etching rate depends on the solution concentration and temperature of hydrofluoric acid, buffered hydrofluoric acid, and hydrogen peroxide solution. By adding the hydrogen peroxide solution, the oxidation of Si can be accelerated, and the reaction rate can be increased as compared to the case without addition. By further changing the ratio of the hydrogen peroxide solution, the reaction rate can be increased. Can be controlled. In addition, by adding alcohol, bubbles of the reaction gas generated by the etching can be instantaneously removed from the etching surface without stirring, and the porous Si can be uniformly and efficiently etched.

The concentration of HF in the buffered hydrofluoric acid is preferably from 1 to 95% by weight, more preferably from 1 to 85% by weight, and still more preferably from 1 to 70% by weight, based on the etching solution.
The concentration of NH ₄ F in the buffered hydrofluoric acid is preferably 1 to 95% by weight, more preferably 5 to 90% by weight, and still more preferably 5 to 90% by weight with respect to the etching solution.
It is set in the range of ８０80% by weight.

The HF concentration is set in the range of preferably 1 to 95% by weight, more preferably 5 to 90% by weight, and still more preferably 5 to 80% by weight, based on the etching solution.

The H ₂ O ₂ concentration is different from that of the etching solution.
It is preferably set in the range of 1 to 95% by weight, more preferably 5 to 90% by weight, and still more preferably 10 to 80% by weight, and is set within the range in which the above-mentioned effect of the hydrogen peroxide solution is exerted.

The alcohol concentration is preferably 80% by weight, more preferably 60% by weight with respect to the etching solution.
Hereinafter, it is more preferably 40% by weight or less, and is set within a range in which the effect of the alcohol is exerted.

The temperature is set in the range of preferably 0 to 100 ° C., more preferably 5 to 80 ° C., and still more preferably 5 to 60 ° C.

The alcohol used in this step is not limited to ethyl alcohol, and may be isopropyl alcohol, which is practically usable in the production process and the like, and can use the alcohol having the above-mentioned effect of adding alcohol.

In the semiconductor substrate thus obtained, a single-crystal Si layer equivalent to that of a normal Si wafer is formed into a large area over the entire substrate by flattening and uniformly thinning the layer.

The liquid crystal display device of the present invention preferably uses a substrate on which a single-crystal Si layer is formed as described above,
Forming a circuit in the usual manner, to configure.

In the present invention, the potential of the back electrode to be controlled is an off region of a parasitic transistor having a supporting substrate as a gate electrode and a base insulating layer as a gate insulating film. As shown in FIG. In the case of using both the NMOS transistor and the NMOS transistor, a portion where the off regions of both parasitic transistors overlap is adopted. Also,
Any means may be used for taking out the electrodes as long as the function of the display device is not hindered.However, when taking out from the back surface of the substrate using a semiconductor as a substrate, control is performed by wiring through a metal electrode such as aluminum. Becomes easier. Alternatively, the substrate may be taken out from the upper side as described later. When the package is taken out from the upper side in this manner, wiring to the package side is easy, the size is reduced, and the assembly yield is improved.

The conductive substrate that can be used in the present invention is desirably a metal having a high melting point of 900 ° C. or more, since it is bonded by heating during the formation of a single-crystal Si thin film. When a semiconductor substrate is used, a P-type or n-type Si substrate, which is commonly used, can be used.

In the present invention, the substrate of the image display section is removed by etching from the back surface to achieve transparency. Etching is S
It is desirable to use an etching solution that can provide a sufficient ratio of i to the etching rate of the base insulating layer (10: 1 or more).
For example, when the most common SiO ₂ is used as the insulating layer, KOH and an aqueous solution of ethylenediamine are used as an etchant. KHO is a 10-70% aqueous solution, the liquid temperature is 50-120 ° C., preferably KOH 20-50%,
The liquid temperature is 70 to 110 ° C. At this time, an etch rate of 1 to 10 μm / min is obtained for Si. In addition, the ethylenediamine aqueous solution is, to be precise, a mixture of ethylene, pyrocaracol and water, and its composition is, for example, 10: 1: 1.
0. The liquid temperature is 80 to 150 ° C, and the etch rate is 0.1.
5 to 5 μm / min can be realized. For more precise control of the etching rate, 5-20% of pyrazine is preferably added. FIG. 17 shows the etched state. As shown in FIG. 17, the peripheral drive circuit portion is protected by the etching resistant layer and the substrate is removed by etching to leave the substrate of the peripheral drive portion. FIG.
, 1000 is an etching resistant layer, 1001 is a back electrode 1002 is a substrate, 1003 is a silicon oxide layer, 100
4 is an etching stopper, 1005 is a silicon oxide layer,
1006 is a semiconductor layer for forming a device.

The hollow portion may be left as long as it has sufficient strength, but may be filled with a light-transmitting filler for reinforcement. As the filler, a Si-based resin, which is generally most often used, is exemplified.

In the liquid crystal display device of the present invention, by controlling the potential of the substrate of the peripheral driving circuit, the leakage current due to the operation of the parasitic MOS transistor is reduced, and the channel potential of the semiconductor device used in the driving circuit is stabilized. . Further, since the active layer is made of a single-crystal Si thin film, the semiconductor device can be operated at a speed 5 to 100 times faster than when the semiconductor device is made of a polycrystalline TFT. In addition, by etching from the back surface, the substrate of the image display unit is removed to make only the image display unit transparent, and the rigidity is maintained by the remaining substrate.

In the present invention, for example, if a low power consumption CMOS inverter is used for the drive circuit and a high withstand voltage PMOS transistor without back surface leakage is used for the switching element, a liquid crystal display device with reduced power consumption can be used for both of the PMOS transistors. If a transistor is used, an inexpensive liquid crystal display device can be provided, and if an NMOS transistor is used for a drive circuit and a PMOS transistor is used for a switching element, an inexpensive liquid crystal display device can be provided without back surface leakage.

Hereinafter, the present invention will be described with reference to specific examples.

[0141]

(Embodiment 1) FIG. 18 shows a process for manufacturing a semiconductor substrate of a liquid crystal display device of this embodiment.
Show the process.

P-type (100) having a thickness of 300 μm
Anodizing a single crystal Si substrate in an HF solution,
A porous Si substrate was formed.

Anodizing conditions were as follows.

Applied voltage: 2.6 (V) Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH
= 1: 1: 1 Time: 2.4 (hour) Thickness of porous Si: 300 (μm) Porosity: 56 (%) P-type (100) porous Si substrate 101 thus obtained
The Si epitaxial layer 102 is formed thereon by the low pressure CVD method.
Was grown with a layer thickness of 1.0 μm. The deposition conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1 × 10 ⁻² Torr Growth rate: 3.3 nm / sec Next, the surface of the epitaxial layer 102 is exposed to 1000 ° C.
Is formed on the oxidized surface, and 50
The other Si substrate 107 on which a 00 ° oxide layer 104 and a 1000 ° nitride layer 105 are formed is superimposed, and heated at 800 ° C. for 0.5 hour in a nitrogen atmosphere.
The two Si substrates were firmly bonded.

Then, the bonded substrates were mixed with a mixture of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (10:
6:50), and was selectively etched without stirring.
After 65 minutes, only the non-porous Si layer remains without being etched, and single-crystal Si is used as an etch stop material.
The porous Si substrate 101 was selectively etched and completely removed. The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, the etching amount is not more than 50 ° even after 65 minutes, and the selectivity with the etching rate of the porous layer reaches more than tenth power. The etching amount (several tens of mm) in the porous layer was practically negligible. Such places, Si substrate 101 made porous having a thickness of 3 00Myuemu is removed, SiO ₂
A single-crystal Si layer 102 having a thickness of 1.0 μm was formed thereon. When SiH ₂ Cl was used as the source gas, the growth temperature had to be raised by several tens of degrees, but the accelerated etching characteristic peculiar to the porous substrate was maintained.

A field effect transistor is formed on the single crystal Si thin film and connected to each other to form a complementary element,
And an integrated circuit thereof, and a pixel switching element and a driving peripheral circuit necessary for the liquid crystal image display device were formed. Note that a known MOS integrated circuit manufacturing technique was used for the manufacturing method of each transistor.

After a black matrix and a color filter were formed on the cover glass, a common electrode was formed and an alignment treatment was performed. An active matrix substrate was subjected to an orientation treatment, a seal material was printed, and then both were assembled to inject a liquid crystal. For the various steps relating to the liquid crystal, a known liquid crystal display device manufacturing technique was applied.

Thereafter, the Si substrate side was coated with a hydrofluoric acid-resistant rubber except for a portion immediately below the liquid crystal pixel portion, and the Si substrate was partially removed to the insulating layer using a mixed solution of hydrofluoric acid, acetic acid and nitric acid. Further, a transparent resin was filled in the recesses removed for improving the reliability, and a projection type liquid crystal image display device by light transmission was completed.

Example 2 An Si epitaxial layer was grown to a thickness of 5 μm on a P-type (100) Si substrate having a thickness of 200 μm by a normal pressure CVD method. The deposition conditions are as follows.

Reaction gas flow rate: SiH ₂ Cl ₂ 1000 SCCM H ₂ 230 l / min. Temperature: 1080 ° C. Pressure: 760 Torr Time: 1 min. The Si substrate thus obtained was anodized in an HF solution to form a porous layer.

The anodizing conditions were as follows.

Applied voltage: 2.6 (V) Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH
= 1: 1: 1 Time: 1.6 (hour) Thickness of porous Si: 200 (μm) Porosity: 56 (%) As described above, in this anodization, P-type (100) Si
Only the substrate was made porous, and there was no change in the Si epitaxial layer.

Next, 10 .ANG.
An oxide layer is formed on the oxidized surface.
The other Si substrate on which an oxide layer of 00 ° and a nitride film of 500 ° were formed and an insulating layer was arranged was superimposed, and heated at 800 ° C. for 0.5 hour in a nitrogen atmosphere to form two Si substrates. Laminated firmly.

Then, the bonded substrates were mixed with a mixture of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (10:
6:50), selective etching was performed without stirring. After 65 minutes, only the single crystal Si layer remained without being etched, and the porous Si substrate was selectively etched using the single crystal Si as an etch stop material, and completely removed. The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, the etching amount is not more than 50 ° even after 65 minutes, and the selectivity with the etching rate of the porous layer reaches not less than tenth power, The amount of etching (several tens of square meters) in the non-porous layer was practically negligible. Such places, Si substrate made porous having a thickness of 200μm is removed, on the SiO ₂ 5
A single-crystal Si layer having a thickness of μm was formed. As a result of a cross-sectional observation with a transmission electron microscope, no new crystal defects were introduced into the Si layer, and it was confirmed that good crystallinity was maintained. Bipolar and field effect transistors are formed on the single crystal Si thin film and connected to each other to form a complementary element and its integrated circuit to form a pixel switching element and a driving peripheral circuit necessary for a liquid crystal image display device. did. In addition, as a method of manufacturing each transistor, a known MOS and Bi-CMOS integrated circuit manufacturing technology was used.

After a black matrix and a color filter were formed on the cover glass, a common electrode was formed and an alignment process was performed. The active matrix substrate was subjected to an orientation treatment, a seal material was printed, and then both were assembled to inject a liquid crystal. For the various steps relating to the liquid crystal, a known liquid crystal display device manufacturing technique was applied.

Thereafter, the Si substrate side was coated with a hydrofluoric acid-resistant rubber except for a portion immediately below the liquid crystal pixel portion, and the Si substrate was partially removed to the insulating layer using a mixed solution of hydrofluoric acid, acetic acid and nitric acid. Further, spin-on-glass was filled in the recesses removed for improving reliability, and a projection type liquid crystal image display device by light transmission was completed.

Example 3 An N-type Si layer was formed to a thickness of 1 μm by ion implantation of protons on the surface of a P-type (100) Si substrate having a thickness of 200 μm.
The formed H ⁺ implantation amount is 5 × 10 ¹⁵ (ions / c
m ² ). The substrate was anodized in a 50% HF solution. The current density at this time is 100 mA
/ Cm ² . The porosity rate at this time is 8.4 μm.
m / min. The whole P-type (100) Si substrate having a thickness of 200 μm was made porous in 24 minutes.
In this anodization, only the P-type (100) Si substrate was made porous, and the N-type Si layer did not change.

Next, the surface of the N-type Si layer is 1000 °
An oxide layer of 5,000 Å on the oxidized surface
The other Si substrate on which the oxynitride layer was formed was overlapped, and heated at 800 ° C. for 0.5 hour in a nitrogen atmosphere to firmly bond the two Si substrates.

Thereafter, a mixture of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (10: 6:
In step 50), selective etching was performed without stirring.
After 65 minutes, only the single crystal Si layer remained without being etched, and the porous Si substrate was selectively etched using the single crystal Si as an etch stop material, and completely removed. The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, the etching amount is not more than 50 ° even after 65 minutes, and the selectivity with the etching rate of the porous layer reaches more than tenth power. The etching amount (several tens of mm) in the porous layer was practically negligible. In such a case, the porous Si substrate having a thickness of 200 μm was removed and 1.0 μm was deposited on SiO _2.
A single-crystal Si layer having a thickness of m was formed. As a result of a cross-sectional observation with a transmission electron microscope, no new crystal defects were introduced into the Si layer, and it was confirmed that good crystallinity was maintained.

A bipolar element and a field effect transistor are formed on the single crystal Si thin film and connected to each other to form a complementary element and an integrated circuit thereof. A circuit was formed. In addition, as a method of manufacturing each transistor, a known MOS and Bi-CMOS integrated circuit manufacturing technology was used.

After a black matrix and a color filter were formed on the cover glass, a common electrode was formed and an alignment treatment was performed. The active matrix substrate was subjected to an orientation treatment, a seal material was printed, and then both were assembled to inject a liquid crystal. For the various steps relating to the liquid crystal, a known liquid crystal display device manufacturing technique was applied.

Thereafter, the back surface of the Si substrate was coated with apiezone wax except under the liquid crystal pixel portion, and the Si substrate was partially removed to the insulating layer using a mixed solution of hydrofluoric acid, acetic acid and nitric acid. Further, a clear mold was filled in the recesses removed for improving the reliability, and a projection type liquid crystal image display device by light transmission was completed.

Example 4 A P-type (100) single crystal Si substrate having a thickness of 500 μm was anodized in a 50% HF solution. The current density at this time was 10 mA / cm ² . A low-pressure CVD method was used to grow a Si epitaxial layer to a thickness of 0.5 μm on the P-type (100) porous Si substrate having a porous layer having a thickness of 20 μm formed on the surface in 10 minutes. The deposition conditions are as follows.

Gas: SiH ₂ Cl ₂ (0.6 l / min) H ₂ (100 l / min) Temperature: 850 ° C. Pressure: 50 Torr Growth rate: 0.1 μm / min Next, the surface of this epitaxial layer Was thermally oxidized by 50 nm. Another Si substrate having an oxide layer of 0.8 μm on the surface is superimposed on the thermal oxide film, and 900 ° C.
By heating for 1.5 hours, the two substrates were firmly bonded.

Thereafter, the Si substrate was removed from the back surface to a thickness of 490 μm by grinding to expose the porous layer.

Thereafter, a mixed solution (10: 6: 5) of 49% hydrofluoric acid, alcohol and hydrogen peroxide solution was applied to the bonded substrate.
Selective etching was performed without stirring in 0). 1
After 5 minutes, only the single-crystal Si layer remained without being etched, and the porous Si layer was selectively etched using the single-crystal Si as an etch stop material, and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low.
It was about weak, the selectivity with the etching rate of the porous layer reached more than ten-fiveth power, and the etching amount (several tens of squares) in the non-porous layer was practically negligible. After removing the Si ₃ N ₄ layer, a single-crystal Si having a thickness of 0.5 μm is formed on a Si substrate having an insulating layer on the surface.
A layer could be formed.

[0169] The same effect can be obtained by coating with Apiezon wax or electron wax instead of the Si ₃ N ₄ layer, and it is possible to completely remove only the porous Si layer.

A field effect transistor is formed on the single crystal Si thin film and connected to each other to form a complementary element,
And an integrated circuit thereof, and a pixel switching element and a driving peripheral circuit necessary for the liquid crystal image display device were formed. Note that a known MOS integrated circuit manufacturing technique was used for the manufacturing method of each transistor.

After a black matrix and a color filter were formed on the cover glass, a common electrode was formed and an alignment process was performed. The active matrix substrate was subjected to an orientation treatment, a seal material was printed, and then both were assembled to inject a liquid crystal. For the various steps relating to the liquid crystal, a known liquid crystal display device manufacturing technique was applied.

Thereafter, the back surface of the Si substrate was coated with apiezone wax except for a portion immediately below the liquid crystal pixel portion, and the Si substrate was partially removed to the insulating layer using a mixed solution of hydrofluoric acid, acetic acid, and nitric acid. Further, a clear mold was filled in the recesses removed for improving the reliability, and a projection type liquid crystal image display device by light transmission was completed.

[0173] As described above in detail, the liquid Akirahyo shows apparatus of the present invention, is excellent in economical efficiency, uniform flat over a large area, and using a Si single crystal substrate having an extremely excellent crystallinity,
Since the semiconductor active device is formed on a Si single crystal layer having extremely few defects, the stray capacitance of the semiconductor device is reduced, high-speed operation is possible, and the device has excellent anti-radiation characteristics without latch-up phenomenon. and high-performance device integrating circuit liquid to Akirahyo示画containing the same substrate can be provided.

[0174] The liquid crystal Display device according onset Ming, by selectively removing the porous substrate or the porous layer, by which is created good single crystal layer formed on a non-transparent substrate, a high It will be a performance thing. In addition, by employing a Si substrate as an amorphous substrate, it can be a starting material that is extremely compatible with conventional silicon integrated circuit processes in terms of thermal, mechanical, chemical, or physical properties.

In general, when a light source having a considerably high light intensity is used in a projection type liquid crystal image display device, when light hits a peripheral circuit portion, a photoexcitation current is induced in the semiconductor layer, which may cause a malfunction. In the device according to the present invention, since the peripheral circuit portion is shielded from light, such a problem can be avoided.

(Embodiment 5 ) The liquid applied to the step of injecting liquid crystal in the same manner as in Embodiment 1
Crystal display device, the Si substrate 10 below the liquid crystal pixel portion
7 was removed by the following method.

A 30% by weight aqueous KOH solution was heated to about 110 ° C., and etching was advanced in the (100) direction of Si using SiN as a mask. The etch rate is anisotropic with respect to the crystal plane, and is about 300 μm with respect to the (100) plane.
/ H. The shape after the etching is shown in FIG. 19, and the angle formed by the slope after the etching is 55 °, indicating that the anisotropy is high. When the insulating layer 104 is reached, the etching is substantially completed. That is, the side etch rate in the lateral direction is very small. According to this method, the Si substrate 107 under the liquid crystal pixel portion can be removed with high accuracy.

Finally, spin-on-glass was filled in the recesses removed for improving the reliability, and a projection type liquid crystal image display device by light transmission was completed.

(Example 6 ) A liquid crystal image display device was completed in the same manner as in Example 5 , except that the Si substrate 107 was removed by the following method.

75 ml of ethylenediamine, catechol 1
A mixed solution prepared at a ratio of 2 g, 24 ml of water and 0.45 g of pyrazine was heated to about 115 ° C., and etching was performed using SiN as a mask. This method has a very high selectivity to SiO ₂ of 1000 or more, and can use SiO ₂ as a membrane and an etching resistant mask.

Example 7 Example 7 was repeated except that the Si substrate 107 was removed by RIE.
5 , a liquid crystal image display device was completed. The etching could be performed almost perpendicularly to the mask pattern.

(Example 8 ) A liquid crystal image display device was completed in the same manner as in Example 5 , except that the Si substrate 107 was removed by the following method.

A 1: 1 aqueous solution of hydrazine and water was added to about 100
C., and anisotropic etching was performed using SiO ₂ as a mask. The etch rate is 2 μm / min.

Example 9 An Al substrate having an Al ₂ O ₃ (ruby) film on its surface was used as a substrate impermeable to light in the visible light region.
A liquid crystal image display device was completed in the same manner as in Example 5 , except that Al was removed by plasma etching with an l-based gas.

[0185] By choosing the ruby film or the like as a base plate having anisotropic etching characteristic in the present embodiment, it is possible to obtain a clean crystal surface.

Example 10 A liquid crystal image display device was completed in the same manner as in Example 5 , except that the Si substrate was removed in the form of an apple as shown in FIG.

According to the present invention, various patterns can be made to emerge by the backlight as in the present embodiment.

[0188] As described above in detail, the liquid Akirahyo shows apparatus of the present invention, is excellent in economical efficiency, uniform flat over a large area, and using a Si single crystal substrate having an extremely excellent crystallinity,
Since the semiconductor active device is formed on a Si single crystal layer having extremely few defects, the stray capacitance of the semiconductor device is reduced, high-speed operation is possible, and the device has excellent anti-radiation characteristics without latch-up phenomenon. and high-performance device integrating circuit liquid to Akirahyo示画containing the same substrate can be provided.

[0189] The liquid crystal Display device of the present invention, by selectively removing the porous substrate or the porous layer by anisotropic etching, is created in the high-quality single crystal layer formed on a non-transparent substrate This results in high performance. In addition, by adopting a Si substrate as a non-transparent electrode, thermal,
It can be a starting material that is very compatible mechanically, chemically or physically with conventional silicon integrated circuit processes.

In general, when a light source having a considerably high light intensity is used in a projection type liquid crystal image display device, when light hits a peripheral circuit portion, a photoexcitation current is induced in the semiconductor layer, which may cause a malfunction. In the liquid crystal display device of the present invention , since the peripheral circuit portion is shielded from light, such a problem can be avoided.

Further, in the liquid crystal image display device of the present invention, since a substrate having anisotropic etching characteristics is used as the non-translucent substrate, a portion below the liquid crystal pixel portion can be accurately removed.

(Embodiment 11 ) FIG. 21 shows an outline of the manufacturing process of this embodiment.

P-type (100) having a thickness of 300 μm
The same conditions as in Example 1 were applied to a single crystal Si substrate in an HF solution.
In this case, anodization was performed to form a porous Si substrate.

The thus obtained P-type (100) porous S
Low pressure CVD under the same deposition conditions as in Example 1 on i-substrate 101
The Si epitaxial layer 102 was grown to a thickness of 1.0 μm by the method.

Next, an oxide layer 103 of 1000 ° is formed on the surface of the epitaxial layer 102, and an oxide layer 104 of 5000 ° and a nitride layer 10 of 1000 ° are formed on the surface of the oxide film.
5 and the other Si substrate 107 on which a SiH _x insulating layer 106 of 2000 ° or more was formed as a reinforcing material, and the two Si substrates were solidified by heating at 800 ° C. for 0.5 hour in a nitrogen atmosphere. Pasted.

Then, the bonded substrates were mixed with a mixture of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (10:
6:50), and was selectively etched without stirring.
After 65 minutes, only the non-porous Si layer remains without being etched, and single-crystal Si is used as an etch stop material.
The porous Si substrate 101 was selectively etched and completely removed. The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, the etching amount is not more than 50 ° even after 65 minutes, and the selectivity with the etching rate of the porous layer reaches not more than the tenth power. The etching amount (several tens of mm) in the porous layer 101 was negligible for practical use. In this case, the porous Si substrate 101 having a thickness of 200 μm is removed and S
Single-crystal Si having a thickness of 1.0 μm on iO ₂ 103
The layer 102 was formed. SiH ₂ C as a source gas
When l is used, the growth temperature needs to be raised by several tens of degrees, but the accelerated etching characteristic peculiar to the porous substrate is as follows.
Maintained.

Using the single crystal Si thin film 102 ,
Form necessary elements, circuits, and members in the same manner as in 1.
A crystal display device was manufactured.

The Si substrate 107 side is coated with a hydrofluoric acid-resistant rubber except for a portion immediately below the liquid crystal pixel portion, and the Si substrate 107 is partially removed to the insulating layer 104 using a mixed solution of hydrofluoric acid, acetic acid and nitric acid. and a projection type liquid crystal image display device according to the light transmission.

As in the present embodiment, a substrate formed by bonding a substrate on which an insulating film is formed on a Si substrate and a substrate obtained by making the Si substrate porous and then epitaxially growing Si on the porous Si is made of a single Si substrate. Since there is no restriction on the underlying insulating film of the crystal film, the thickness can be reduced to several μm, and a SiN film or the like can be used.

Further, by providing a light transmitting film for improving the film strength between the non-light transmitting substrate and the single crystal TFT at the time of manufacturing the SOI substrate, there is no restriction on the production in forming the TFT. , A flexible manufacturing method can be provided. Further, since the reinforcing layer is formed before the removal of the non-light-transmitting layer, damage at the time of removing the non-light-transmitting layer can be avoided.

Example 12 The SiN _x insulating layer was formed by selective etching of silicon (N / P ⁺ ) as shown in FIG. 22 to leave the Si layer 110 of 5000 ° below the insulating film. 1000 ° C
After thermally oxidizing the Si layer 110 to make it translucent, the SiN _x insulating layer 1 is formed on the thermally oxidized film 110 by CVD.
A liquid crystal image display device was prepared in the same manner as in Example 11 except that No. 11 was formed. According to this embodiment, the strength can be improved by the two-layered reinforcing film.

[0202] Further, it is possible to control the rear side potential by forming a conductive film further as ITO translucent thin film on SiN _x insulating layer.

Example 13 As shown in FIG. 23, Example 11 was performed except that Lp-SiN 156 having a large film strength was used as the interlayer insulating film of the SiTFT.
A liquid crystal image display device was prepared in the same manner as described above. Lp-Si
Adhesion to the problem metal film in the case of using the N film as the interlayer insulating film, H ₂ protected effectively, and the like.

The problem of the adhesion to the metal film can be solved by forming a sandwich structure with a film such as SiO ₂ or BPSG. Also, the _{H 2} protection effect,
Vth (threshold voltage) can be controlled by controlling the impurity concentration of the MOS channel portion in advance.

(Example 14 ) As shown in FIG. 24, O ⁺ was ^{added to} about 1 × 10 ¹⁸ cm ^−2.
By ion implantation at 00 keV and performing a heat treatment at about 1300 ° C., the SiO ₂ layer 20
2 are formed.

The substrate 201 prepared as described above is subjected to thermal oxidation and LP-CVD to form SiO ₂ 204 / SiN.
two-layered film of _x 205 is formed on the front and back. Subsequently, the back surface is patterned, and the window of the panel portion is opened.

Next, etching of Si is performed using a KOH system or the like. The Lp-SiN film serves as a mask material for KOH. S
In the etching of i, all or part of the etching is performed. Subsequently, this is thermally oxidized, so that only the rear surface of the panel portion is thermally oxidized.

Thereafter, in the step of removing the front surface SiN film and forming the TFT, the back side is further reinforced by using the thermal oxidation and the CVD method. In particular, the Lp-SiN film 207 used for the LOCOS oxidation method or the like is a tensil film having an internal stress of about 10 ¹⁰ dyn / cm ² and is most suitable as a backside reinforcing film. 209 is a gate electrode, 210 is the source and drain of the MOS transistor.

When the non-light-transmitting substrate 201 is etched from the back surface, the film strength of the light-transmitting region is determined only by the insulating film 202 and the Si layer 203 on the upper surface of the non-light-transmitting substrate. The degree of freedom in the film configuration is narrow. However, according to the present embodiment, the film strength on the back surface can be improved without being restricted by the TFT.

Example 15 As shown in FIG. 25, a liquid crystal image display device was manufactured in the same manner as in Example 11 except that the SiN _x insulating layer 251 was patterned so as to become smaller from the center of the light-transmitting region toward the periphery. Created.

According to this embodiment, the intensity of the light-transmitting region can be adjusted, and the strength at the center of the light-transmitting region, which is particularly weak, can be reinforced.

As described in detail above, the liquid crystal image display device of the present invention is excellent in economical efficiency and has a uniform flatness over a large area.
Uses a Si single crystal substrate with extremely excellent crystallinity, and the semiconductor active element is formed on a Si single crystal layer with extremely few defects. Therefore, the floating capacitance of the semiconductor element is reduced and high-speed operation is possible. Thus, it is possible to provide a high-performance device in which elements and circuits having excellent anti-radiation characteristics and having no latch-up phenomenon are integrated on the same substrate as liquid crystal image display pixels.

Further, the liquid crystal image display device of the present invention is formed on a high-quality single crystal layer formed on a non-transparent substrate by selectively removing the porous substrate or the porous layer, thereby achieving high performance. It becomes something. Further, by adopting the Si substrate as the non-transparent substrate, it can be a starting material that is extremely compatible with the conventional silicon integrated circuit process in terms of thermal, mechanical, chemical or physical properties.

In general, when a light source having a considerably high light intensity is used for a projection type liquid crystal image display device, when light hits a peripheral circuit portion, a photoexcitation current is induced in the semiconductor layer, which may cause a malfunction. In the device according to the present invention, since the peripheral circuit portion is shielded from light, such a problem can be avoided.

[0215] Further, the liquid crystal image display device of the present invention, since the SiN _x insulating layer is provided in the light transmitting region removing the light non-transparent substrate, the strength of the region is reinforced, and the reliability is improved .

Embodiment 16 FIG. 26 shows an example of a conventional liquid crystal display device using a CMOS inverter as a peripheral drive circuit and a PMOS transistor as a switching element of a pixel electrode. This drawing is a cross-sectional view of only the substrate on which the semiconductor device such as a transistor is incorporated.
In the figure, 61 is a supporting substrate, 62 is a base insulating layer, 63 is an element isolation oxide film, 64 is a source region of an NMOS transistor,
65 is the drain region of the NMOS transistor, 66 is P
A drain region of a MOS transistor, 67 a source region of a PMOS transistor, 68 a gate oxide film, 69 a gate electrode, 70 a channel region of an NMOS transistor, 71 a channel region of a PMOS transistor, 72
Is an N-type electric field relaxation region, 73 is a P-type electric field relaxation region, 74 is an Al (wiring) electrode, 75 is an NMOS transistor, 7
6, 77 are PMOS transistors, 78 is a storage capacitor unit,
79 is a CMOS inverter, 80 and 81 are interlayer insulating films,
82 is a common electrode, and 83 is a pixel electrode. 84 is a back surface filler and 85 is a back surface electrode.

The substrate configured as described above and the other substrate on which the common electrode is provided are opposed to each other via a spacer, and liquid crystal is sealed to form a panel.

In the liquid crystal display device, it is an essential condition that light can pass through the image display unit in both the reflection type and the transmission type. Therefore, conventionally, one quartz plate has been used. On the other hand, although Si is generally well known as an active layer of a transistor, it is extremely difficult to produce single crystal Si, which is most desirable as an active layer, and it has been virtually impossible to form it on quartz. Therefore, when a transistor is formed in a pixel display portion or when integrated with peripheral driving circuits, polycrystalline Si that can be formed on quartz has been used.

However, there is a limit in polycrystalline Si in order to make a screen more fine and to drive at high speed in response to a demand for higher quality images, and the structure of a liquid crystal display device having a semiconductor device using single crystal Si is limited. Was desired.

In this embodiment, a semiconductor or conductor is used as a substrate, and a single-crystal Si thin film is formed via an insulating layer.
Only the image display section is made transparent by removing the above-mentioned substrate, and the substrate of the peripheral drive circuit section is provided with control means for the back surface potential to control the substrate potential, thereby improving the performance of the semiconductor device and achieving high speed. It is a liquid crystal display device.

That is, an active matrix type liquid crystal display device having a semiconductor active element in which an active layer is formed by a single crystal Si thin film formed on a semiconductor or conductor substrate with an insulating layer interposed therebetween, wherein The substrate is removed and only the insulating layer is removed or a transparent filler is filled after the substrate is removed to have transparency, and the peripheral driving circuit portion has the substrate remaining and has a back surface potential control means. It is characterized by the following.

The single crystal Si thin film according to the present embodiment is
IMOX (Separationby Implant)
It obtained even ed Oxigen) method, but in the embodiment Ru with those obtained by a method using multi <br/> porous Si substrate. The polycrystalline Si thin film obtained by the latter manufacturing method has few defects and is an ideal semiconductor as an active layer of a transistor.

The present embodiment uses a CMOS inverter with low power consumption in the peripheral drive circuit, a PMOS transistor with high withstand voltage without back surface leakage for switching the pixel electrode, a P-type Si substrate as the substrate, and an aluminum substrate on the back surface of the substrate. An equimetal electrode is provided to control the substrate potential. As the translucent filler 84, a Si-based resin was used.

In this example, an 8000 ° Si oxide film was used for the base insulating layer, and a 30% aqueous solution of KOH was used for etching Si, and an etching rate of 4 μm / min was obtained at 100 ° C. At this time, LP-
CVD (Low Pressure Chemical Chemical)
50 deposited by Vapor Deposition
A 00 ° Si nitride film was used. It is desirable that the thickness of this film is large, but if it is 6000 to 8000 ° or more, the film is easily cracked and the etching resistance is deteriorated. Therefore, about 1000-6000 ° is desirable.

FIG. 27 shows the wiring state of the back electrode. In the figure, reference numeral 90 denotes a counter substrate provided with a common electrode, which is disposed to face the substrate with an adhesive 91 and sandwiches a liquid crystal 92. Reference numeral 93 denotes a pad on a driving circuit unit such as a CMOS inverter, which is connected to the package 95 by a bonding wire 94, while the back surface electrode 85 is fixed to the package 95 via a paste conductive material. The potential is controlled by being connected to the package 95 side. The thickness of the Si support substrate is 55
0 μm, which is sufficient to maintain the strength of the entire chip.

FIG. 28 shows another embodiment of the present invention. FIG. 28 shows a structure in which a back electrode is provided on the upper surface of the device region. Reference numeral 501 denotes a separation layer for separating elements, and reference numeral 502 denotes a back electrode. In this method, an opening 503 penetrating the interlayer insulating film 63 and the base insulating film 62 is formed when the contact hole is processed after the device is formed. In order to improve the ohmic property of the contact, boron is ion-implanted at 1 × 10 ¹⁵ cm ⁻² , a low-resistance p-type diffusion layer 504 is formed, and then Al is deposited.
The structure was obtained.

In this structure, the thickness of the base insulating layer (T _BOX )
Was set to 8000 °, V _SS = 0 V, V _DD = 14 V, and the back surface potential was set to 2 to 5 V.
Then, a liquid crystal display device having 64 gradations and 400,000 pixels in which the light transmittance of the display section was 90% or more was realized.

In the liquid crystal display device of this embodiment, the single crystal Si thin film is used for the active layer of the semiconductor device.
It can be driven 0 times faster, and furthermore, by controlling the back potential, the leakage current of the parasitic element of the semiconductor device used for the peripheral drive circuit can be sufficiently reduced to improve the performance of the circuit. The liquid crystal display device capable of high-definition, high-quality image display with tens of thousands of pixels or more is further made transparent by removing the substrate of the image display unit even in a circuit using single crystal Si. This is a liquid crystal display device having sufficient strength secured above.

(Embodiment 17 ) In order to eliminate the above-mentioned bonding, it is conceivable to provide an image display area and peripheral circuits on the same substrate.

FIG. 29 is a schematic sectional view in the case where a liquid crystal pixel portion and peripheral circuits are provided on the same substrate.

As shown in FIG. 29, the same substrate insulating layer 506
Above, an image display area 507 including a pixel TFT and a pixel electrode
And a peripheral circuit 508 for driving the same, are connected to each other by a data line and a gate line, and the image display region is formed by etching a semiconductor substrate with an etching solution such as KOH in order to transmit light. The peripheral circuit area is made transparent and the device characteristics (for example, MOS
Leakage current amount) is affected by the potential on the back surface of the peripheral circuit, and the above structure can be realized by leaving the semiconductor or conductive substrate 509 on the back surface so that a predetermined potential can be applied.

However, when the transparent substrate region and the conductor substrate region are formed in the same substrate, a region 510 where the substrate film thickness changes naturally occurs, and as shown in FIG. When the transition region is reached, the transition region of the conductive substrate has a non-uniform film thickness, so the manner in which an electric field is applied varies, causing variations in device characteristics in peripheral circuits. In the case of reaching the area, there is a problem that the transparency becomes incomplete and defective pixels are caused.

This embodiment has a semiconductor or conductor substrate portion with an insulating layer interposed therebetween and a portion consisting only of an insulating layer, and a peripheral circuit and insulating layer are provided above the semiconductor or conductor substrate portion. An image display area is provided in a portion consisting of only the layers, the connection between the two is made with the same wiring material as that used in the peripheral circuit and the image display area, and the transition area of the semiconductor or conductor substrate thickness This is a liquid crystal display device characterized in that the wiring area is wider than that of the liquid crystal display device.

That is, in this embodiment, since the peripheral circuit and the image display area do not exist on the transition area, there is no adverse effect on the peripheral circuit.

Here, that the wiring area is wider than the transition area, it is desirable that the wiring area be equal to or more than the transition area + 0.3 mm. This is a value in consideration of the alignment margin at the position where the transition region is formed, and the transition region does not cover the regions 507 and 508 even if the misalignment occurs.

FIG. 30 is a sectional view of a principal part of the liquid crystal display device of this embodiment , and FIG. 31 is a plan view. The plan view is common to each embodiment described later. 509 is a semiconductor or conductor substrate, 506 is an insulating layer, 508 is a peripheral circuit formation region, 507 is an image display region, and 511 is a separation region for electrically insulating 508 and 507. Reference numeral 510 denotes a transition region of the substrate film thickness.

Peripheral circuit formation area 508 and image display area 5
07 is formed in the semiconductor region on the insulating layer by a semiconductor device manufacturing process. These are electrically isolated by, for example, an element isolation region 511 formed in a LOCOS step, a trench isolation step, a PN junction isolation step, or the like. The wiring member 512 includes the peripheral circuit formation region 508 and the image display region 5.
07, Al, Ti, T
a, Mo, Cu, metal such as W, TiSi ₂ , TaSi
_In addition to silicide such as ₂ , WSi ₂ , and MoSi ₂ , porous Si and ITO are used after a film is deposited by a CVD method, a sputtering method, an evaporation method, or the like, and then a desired pattern is formed by a photolithography process.

These wiring members 512 are usually formed with a thickness of several thousand Å and a width of about 1 to 100 μm.

The peripheral circuit 508 is formed on a semiconductor or conductive substrate except for the transition region 510, and the image display region 5
Reference numeral 07 is formed on a transparent substrate excluding the transition region, electrically insulates both regions from each other, and connects a desired terminal with a wiring member 512 to form a peripheral circuit with less characteristic variation and an image display with less image defects. The region can be formed on the same substrate, and a high-resolution liquid crystal display device capable of fine patterning at low cost can be realized.

[0240] (Embodiment 18) FIG. 32 is a fragmentary cross-sectional view showing another embodiment of a liquid crystal display device of the present invention.

In the embodiment shown in FIG. 32, the wiring member has two layers (51
3,514) is the case of multiple wires provided, Example 17
In addition to the effects described above, there is a strong advantage against disconnection. The transition region of the film thickness resulting from the etching generally has a width of several hundred μm. For example, if wirings are formed at a pitch of 10 μm in the transition region having a width of 500 μm, the length is 500 μm and the width is 7 μm.
The regions 508 and 507 must be connected by a long and thin wiring, and disconnection of the wiring is a serious problem. With a multi-wiring structure, redundancy is increased and resistance to disconnection is increased. Various combinations in the case of multiplex wiring are conceivable.
3 is Al, 514 is polycrystalline Si, 513 is ITO, 51
4 is Al or the like. In addition, three or more wiring members can be provided.

(Embodiment 19 ) FIG. 33 shows a case in which single-crystal Si is used for the wiring member. FIG. 33 (a) shows single-crystal Si 516 on the surface and FIG.
Shows a case where single crystal Si 516 is formed by embedding.
Single crystal Si 516 is electrically insulated from isolation region 511.

When a single crystal wiring is used, a wiring having a low resistance of several tens of Ω / □ can be formed without deteriorating the flatness of the substrate surface. For example, when the present invention is used in a liquid crystal display device, the wiring is caused by steps. Disorder of liquid crystal alignment can be reduced.

(Embodiment 20 ) FIG. 34 shows a case where the peripheral circuit 508 and the image display unit 507 have a completely separated structure.

In this embodiment, since the peripheral circuit 508 and the image display unit 507 are completely separated from each other, they are insulated from each other, and the capacitive coupling between them is reduced. Problems such as talk and malfunction of the peripheral circuit 508 are reduced.

Embodiment 21 This embodiment shown in FIG. 35 is an example of a liquid crystal display device manufactured by a general semiconductor manufacturing process. Peripheral circuit 508
The image display area 507 is formed in the semiconductor layer on the insulating layer, and both are insulated by the LOCOS insulating film 517. Further, the wiring member 512 is formed by the LOCOS 51
7 formed on the peripheral circuit 5 through a contact hole.
08 and the image display area 507 are mutually connected. L
A semiconductor substrate 509 is provided below the peripheral circuit with a certain region of the OCOS 517 as a boundary, and by setting its potential to a desired value V _Ref , variation in device characteristics is suppressed. 51
Reference numeral 5 denotes an insulating film for preventing the wiring 512 and the regions 508 and 507 from being short-circuited at unnecessary places.

Although the above description has been made with reference to a display device using a TFT as an example, the present invention is not limited to a TFT, but includes an active matrix liquid crystal display device using a diode or an MIM element or a drive circuit. Needless to say, the same effect can be obtained in the simple matrix type liquid crystal display device described above.

The connection between the image display section and the peripheral circuit can be made at low cost by fine patterning. In addition, since the peripheral circuit is reliably formed on the semiconductor or conductive substrate, variations in device characteristics of the peripheral circuit are reduced. It is possible to reduce an area of an image defect where transparency is incomplete.

(Embodiment 22 ) Next, an active matrix type liquid crystal display device using the characteristics of a CMOS inverter and using it in a peripheral drive circuit and using PMOS transistors as switching elements will be described.

FIG. 36A shows an equivalent circuit of each pixel of the liquid crystal display device of this embodiment . 520 is a gate electrode, 52
Reference numeral 1 denotes a storage capacitor, and 522 denotes a liquid crystal capacitor. In a conventional liquid crystal display device, the active layer of the transistor is made of polycrystalline S
i-thin film.

At present, as described above, it is common to form a circuit by combining a plurality of types of semiconductor devices, for example, even within one display device. However, semiconductor devices have different characteristics, and by forming a plurality of types of semiconductor devices on the same substrate, it is not possible to set optimal conditions for each device, and the problems of each device cannot be solved. It will also be used.

FIG. 36B shows a SIMOX (Separa)
Tion by Implanted Oxigen)
NMOS transistor 523 formed using a substrate, P
4 shows an equivalent circuit of a CMOS inverter having a MOS transistor 524. On the substrate side of the CMOS inverter,
A parasitic MOS transistor having a supporting substrate as a gate electrode and an insulating layer between the supporting substrate and an active layer as a gate insulating layer is generated. In the case of a conventional CMOS inverter, this parasitic MOS
It is difficult to increase the absolute value of the threshold voltage of the transistor, and no matter what value _Vback is set, the parasitic NMOS or PMOS transistor operates and a leak current flows. FIG. 36C shows the input / output characteristics of this CMOS transistor. As shown in FIG.
_back = in the vicinity of 0V, _{V in} order to parasitic PMOS transistor is operating even closer to _{V DD} PMO
The output is completely V
Does not fall to _SS . On the other hand in the vicinity of the _{V back} = 3V, due to the leakage current of the NMOS transistor even if _{V in} is close to the _{V SS} in order to parasitic NMOS transistor is in operation, the output does not rise up to the completely _{V DD.}

Although the CMOS inverter has the above-described problems, the use of an NMOS transistor formed on a thin-film single crystal alone causes, for example, a "kink" in which there is a step in static characteristics.
A phenomenon has been observed, and in order to alleviate this phenomenon, it is necessary to provide a passage through which the generated hole escapes.

In the PMOS transistor, the driving speed is limited by the parasitic capacitance between the source / drain and the channel region.

As described above, the characteristics of the semiconductor active elements are different from each other, and the required characteristics and conditions are also different depending on the application in which the semiconductor active elements are incorporated. If a plurality of semiconductor active elements are formed on the same substrate, May be contradictory, and a method for obtaining more desired characteristics has been desired.

The present inventors have conducted intensive studies to solve the above problems, and as a result, have noticed that the characteristics of each semiconductor active element can be controlled to some extent by the thickness of its active layer. Reached. For example, in order to improve the input / output characteristics of the above-mentioned CMOS inverter, the active layer is made thicker than before, and in order to design a fully depleted type with priority on high-speed driving, the active layer is made thinner. It is effective to design a thick active layer to prevent the occurrence of a voltage drop, and to thicken the active layers of the NMOS and PMOS transistors to provide withstand voltage.

In view of the above-mentioned point of view, in this embodiment, in a semiconductor device using a plurality of semiconductor active elements, in order to obtain more excellent characteristics, means for controlling the thickness of the active layer in accordance with the required characteristics. It was taken.

That is, in this embodiment, in a semiconductor device having a plurality of semiconductor active elements having an active layer formed of a single-crystal semiconductor thin film formed on an insulating layer, the thickness of the active layer of the semiconductor active element is at least two. It is intended to provide a semiconductor device characterized in that there are different types. In the present invention, the plurality of semiconductor active elements include not only the use of a plurality of types of elements but also the use of a plurality of the same elements.

Further, the present embodiment is an active matrix type liquid crystal display device using the above means and using a CMOS inverter as a peripheral drive circuit and a PMOS or NMOS transistor as a pixel switching element. An object of the present invention is to provide a liquid crystal display device wherein the thickness of the active layer is larger than the thickness of the active layer of the switching element.

A method for forming a different active layer according to this embodiment will be described.

The active layer is made of a single crystal semiconductor thin film.
For convenience of explanation, the most commonly used Si will be described. As a method for forming a single-crystal Si thin film, a single-crystal Si thin film is epitaxially grown on a porous Si substrate, and then the substrates are bonded together to remove the porous Si substrate by etching. Is preferred to be obtained by etching and bonding the substrate to a substrate. The single crystal Si thin film thus obtained has few defects and can be driven at high speed.

The single-crystal Si layer according to the present embodiment is made of porous Si obtained by making the single-crystal Si substrate porous as in the above-described embodiment.
It is formed using a substrate.

Next, a method of changing the thickness of the active layer will be described.

FIG. 37 shows two methods. First, a support substrate 525 having a single crystal Si layer 527 on a base insulating layer 526 is prepared, and the surface is thermally oxidized at 100 to 500 ° to form a pad SiO ₂ layer 528. After depositing a SiN layer 529 at 1000 to 3000 ° by LP-CVD, patterning is performed to obtain FIG. Next, the portion of the single crystal Si from which the SiO ₂ layer 528 and the SiN layer 529 have been removed is etched from the surface using a chlorine-based gas. For example, when the thickness of the original Si layer 527 is 10000, etching is performed at 2000 to 6000. Thus, FIG. 37B is obtained. After this, the SiO ₂ layer 528, Si
When the N layer 529 is sequentially removed, a thick single-crystal Si layer A and a thin single-crystal Si layer B are obtained. Further, after preparing (a), by performing a heat treatment in an oxygen or steam gas atmosphere at 900 to 1200 ° C., only the portion not covered with the SiN layer 529 can be oxidized (c). Original Si
When the thickness of the layer 527 is 10000 °, the selected SiO ₂
Oxidize the layer to 6000-15000 °. Thereafter, unnecessary portions including the selective SiO ₂ layer are etched to obtain a single crystal Si layer having a different thickness (b).

Thus, the semiconductor active element is formed by changing the thickness of single crystal Si according to the design conditions.

In the present embodiment, in the case of a semiconductor device having a plurality of semiconductor active elements, each active layer is changed to a desired state, and as a result, active layers having different thicknesses exist in the same device. The characteristics of each element are improved, and the performance of the entire device is improved.

More specifically, the film thickness is set according to the purpose of the apparatus. For example, when a high withstand voltage and a high voltage are required, it is effective to set the film thickness thick. This is effective not only in improving the performance of individual transistors but also in suppressing the operation of a parasitic element (for example, a parasitic PMOS transistor or the like) by increasing the film thickness. When high speed is required at a relatively low voltage, a thin film is desirable.
The thin film is effective not only for improving the performance of each transistor but also for improving the characteristics of the entire circuit mainly due to the effect of reducing the parasitic capacitance.

The optimum value of the thickness of the active layer according to the present embodiment differs depending on the intended apparatus. For example, in the case of an NMOS transistor, the generation of hot carriers is more remarkable than in the case of a PMOS transistor, so that the withstand voltage tends to decrease. Therefore, in circuits requiring high withstand voltage and high voltage, NMOS
The optimum value of the active layer of the transistor is thicker than that of the PMOS transistor.

[0269] illustrates a cross-sectional view of a liquid crystal display equipment of this embodiment in FIG. 38. The basic configuration is the same as that of the liquid crystal display device shown in FIG. 26 described above, and duplicate description will be omitted. In this embodiment, the thickness of the active layer of the CMOS inverter 59 used for the peripheral drive circuit is large, and is 8000 to 10000.
{On the other hand, the active layer of the PMOS transistor 57 used for switching the pixel electrode is 2000-6000 °. Also, PM in the CMOS inverter of the drive circuit
Junctions are separated between the active layers of the OS transistor and the NMOS transistor. In this embodiment,
Since the active layer is formed by the above-described method of manufacturing a single-crystal Si thin film, a hollow portion 84 in which a display portion requiring transparency is removed by etching using a Si substrate as the support substrate 61 is used.
However, since the single-crystal Si thin film can be formed on a transparent substrate such as glass, the entire glass substrate can be used.

FIG. 39 (a) shows an equivalent circuit diagram of this embodiment. Reference numeral 300 denotes a horizontal shift register for driving the signal line 310, reference numerals 301 to 303 denote red (R), green (G), and blue (B) video signal lines, respectively, and reference numeral 304 denotes a MOS for transferring a signal to a buffer capacity by MOS. Transistor, 30
5 is a buffer capacity for temporarily storing the signal of each signal line,
306 is a MOS transistor switch for transferring the signal stored in the buffer capacity to the pixel unit, 307 is a liquid crystal capacity, 308 is a vertical shift register for driving the gate line 69, and 309 is a display unit. As shown in b), the display portion 309 is a hollow portion 84 from which the supporting substrate is removed, and the portion where the peripheral driving circuit is formed is S
This is the remaining opaque portion 312 of the i-substrate.

In this embodiment, the PM used in the drive circuit
Since the OS and the sources and drains 64 to 67 of the NMOS transistors 55 and 56 are separated from the base oxide film 12 by several thousand degrees or more, even if an inversion layer is formed on the upper surface of the base oxide film 12 by the potential of the supporting substrate, the source No current flows between the drain / drain. Therefore, there is no need to consider the operation of the parasitic MOS transistor, and its input / output characteristics are V
_DD = 8 V, V _SS = −6 V, base insulating film thickness = 5000
Å indicates the ideal curve shown in FIG.

As described above, the distance from the bottom surface of the source / drain to the upper surface of the underlying oxide film varies depending on the impurity concentration of the channel region, because the MOS transistor using the underlying oxide film as the gate oxide film does not operate. , 2000
It is preferable to set the temperature to about 10,000 °. Even without this distance, the operation can be controlled by increasing the absolute value of the threshold value of the parasitic MOS transistor.

In this embodiment, since the parasitic transistor can be sufficiently turned off even with a relatively small thickness of the base insulating film of 5000 Å, high-voltage driving can be easily performed.
Since in this embodiment enables V _{DD -V} SS = _14V, the liquid crystal used for the liquid crystal display has become possible to apply a voltage higher than ± 5V. As a result, a liquid crystal panel having 100,000 pixels or more was realized with a high gradation of 64 gradations or more.

In this embodiment, a PMOS transistor is used as a switching element in a pixel portion. However, a similar configuration can be made by using an NMOS transistor.

[0275]

As described above, according to the present invention, the conventional problems can be solved and an excellent liquid crystal image display device having high image quality can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic diagram of a conventional active matrix type liquid crystal display device.

FIG. 2 is a schematic diagram for explaining a manufacturing process of a liquid crystal display device using a conventional SOI technology .

FIG. 3 is a schematic diagram for explaining a manufacturing process of a liquid crystal display device using a conventional SOI technology .

FIG. 4 is a graph showing etching characteristics of porous silicon and non-porous silicon.

FIG. 5 is a graph showing etching characteristics of porous silicon and non-porous silicon.

FIG. 6 is a graph showing etching characteristics of porous silicon and non-porous silicon.

FIG. 7 is a graph showing etching characteristics of porous silicon and non-porous silicon.

FIG. 8 is a graph showing etching characteristics of porous silicon and non-porous silicon.

FIG. 9 is a graph showing etching characteristics of porous silicon and non-porous silicon.

FIG. 10 is a graph showing etching characteristics of porous silicon and non-porous silicon.

FIG. 11 is a graph showing etching characteristics of porous silicon and non-porous silicon.

FIG. 12 is a schematic diagram for explaining an example of a manufacturing process of the liquid crystal display device of the present invention.

FIG. 13 is a schematic view for explaining another example of the manufacturing process of the liquid crystal display device of the present invention.

FIG. 14 is a schematic view for explaining another example of the manufacturing process of the liquid crystal display device of the present invention.

FIG. 15 is a schematic view for explaining another example of the manufacturing process of the liquid crystal display device of the present invention.

FIG. 16 is a schematic diagram showing the relationship between the thickness of a base insulating layer and the operating voltage of a CMOS.

FIG. 17 is a schematic view for explaining a method for manufacturing a semiconductor substrate portion of the liquid crystal display device of the present invention.

FIG. 18 is a schematic diagram for explaining a manufacturing process of the semiconductor substrate of the liquid crystal display device according to the example of the present invention.

19 is a schematic diagram for a state of the liquid crystal pixel lower side of the liquid crystal display device of the embodiment will be described of the present invention.

20 is a schematic diagram for a state of the liquid crystal pixel lower side of the liquid crystal display device of the embodiment will be described of the present invention.

FIG. 21 is a schematic diagram for explaining a manufacturing process of the semiconductor substrate of the liquid crystal display device according to the example of the present invention.

FIG. 22 is a schematic sectional view showing a semiconductor substrate of a liquid crystal display device according to an example of the present invention.

FIG. 23 is a schematic sectional view showing a part of a liquid crystal display device according to an example of the present invention.

FIG. 24 is a schematic diagram for explaining a manufacturing process of the liquid crystal display device according to the example of the present invention.

FIG. 25 is a schematic bottom view showing a part of the liquid crystal display device according to the embodiment of the present invention.

FIG. 26 is a schematic sectional view showing a conventional liquid crystal display device according to an example of the present invention.

FIG. 27 is a schematic sectional view showing the structure of the back electrode of the liquid crystal display device according to the example of the present invention.

FIG. 28 is a schematic sectional view showing a structure of a back electrode of the liquid crystal display device according to the example of the present invention.

FIG. 29 is a schematic diagram for explaining a part of the liquid crystal display device according to the embodiment of the present invention.

FIG. 30 is a schematic sectional view showing a part of a liquid crystal display device according to an example of the present invention.

FIG. 31 is a schematic plan view of a liquid crystal display device according to an example of the present invention.

FIG. 32 is a schematic sectional view showing a part of a liquid crystal display device according to an example of the present invention.

FIG. 33 is a schematic sectional view showing a part of a liquid crystal display device according to an example of the present invention.

FIG. 34 is a schematic sectional view showing a part of a liquid crystal display device according to an example of the present invention.

FIG. 35 is a schematic sectional view showing a part of a liquid crystal display device according to an example of the present invention.

FIG. 36 is a schematic diagram for explaining the operation of the MOS transistor.

FIG. 37 is a schematic view for explaining a method for forming a semiconductor layer of the liquid crystal display device according to the example of the present invention.

FIG. 38 is a schematic sectional view showing a liquid crystal display device according to an example of the present invention.

FIG. 39 is a schematic diagram for explaining a circuit configuration of a liquid crystal display device according to an example of the present invention.

──────────────────────────────────────────────────の Continuing on the front page (51) Int.Cl. ⁶ Identification code FI H01L 29/786 (31) Priority claim number Japanese Patent Application No. 4-40490 (32) Priority date Hei 4 (1992) January 31, ( 33) Priority claim country Japan (JP) (31) Priority claim number Japanese Patent Application No. 4-40448 (32) Priority date Hei 4 (January 31, 1992) (33) Priority claim country Japan (JP) (31) ) Priority claim number Japanese Patent Application No. 4-40453 (32) Priority Date Hei 4 (January 31, 1992) (33) Priority claim country Japan (JP) (31) Priority claim number Japanese Patent Application No. 4-40449 ( 32) Priority Date Hei 4 (1992) January 31 (33) Priority Country Japan (JP) (72) Inventor Junichi Hoshi 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Akira Ishizaki 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Tetsunobu Kochi Shimomaru, Ota-ku, Tokyo 3-30-2 Child Inside Canon Inc. (72) Inventor Narito Sugawa 3-30-2 Shimomaruko 3-chome, Ota-ku, Tokyo Inside Canon Inc. (72) Shunsuke Inoue 3-chome Shimomaruko, Ota-ku, Tokyo 30-2 Canon Inc. (72) Inventor Toru Koizumi 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Takanori Watanabe 3-30-2 Shimomaruko, Ota-ku, Tokyo No. Canon Inc. (72) Inventor Mamoru Miyawaki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (56) References JP-A-2-198428 (JP, A) JP-A-4- 299317 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G02F 1/136 500 G02F 1/1345 H01L 29/786

Claims (11)

(57) [Claims] 1. An active matrix liquid crystal including a substrate provided with a switching element and a peripheral circuit of an image display unit, another substrate provided with a transparent electrode, and a liquid crystal material sandwiched between the one substrate and the other substrate. In the display device, the one substrate includes an epitaxial semiconductor layer including the switching element and the peripheral circuit, an insulating layer below the epitaxial semiconductor layer, and a portion below the insulating layer other than below the image display portion. An active matrix liquid crystal display device comprising a single crystal semiconductor layer. 2. The active matrix liquid crystal display device according to claim 1, wherein the epitaxial semiconductor region and the single crystal semiconductor layer include Si. 3. The active matrix liquid crystal display device according to claim 1, wherein the insulating layer contains Si oxide. 4. The active matrix liquid crystal display device according to claim 1, wherein a transparent member is provided below the image display section below the insulating layer. 5. The active matrix liquid crystal display device according to claim 4, wherein the transparent member contains Si nitride. 6. The active matrix liquid crystal display according to claim 4, wherein the transparent member includes a resin. 7. The active matrix liquid crystal display device according to claim 2, wherein the single crystal semiconductor layer has a tapered shape around the image display section toward the insulating layer. 8. The active matrix liquid crystal display device according to claim 2, wherein the switching element and the peripheral circuit include a transistor. 9. The active matrix liquid crystal display device according to claim 8, wherein the thickness of the active layer of the transistor of the peripheral circuit is larger than the thickness of the active layer of the switching element. 10. The transistor of the switching element has a MOS structure, and the transistor of the peripheral circuit is C
The active matrix liquid crystal display device according to claim 8, wherein the active matrix liquid crystal display device has a MOS structure. 11. The active matrix liquid crystal display device according to claim 1, wherein a potential regulating means is provided in said single crystal semiconductor layer.