JPH05189331A - Input and output controller for data processing system - Google Patents

Abstract

PURPOSE:To prevent an influence on a common bus from being generated when an inside diagnosis is not ended due to any fault. CONSTITUTION:When the inside diagnosis of an input and output controller is not ended in a limited time normalized by a system control processor due to any fault, the system control processor outputs a diagnosis end indication signal 204. As the result, a register 102 is set, and the register 102 outputs a high level diagnosis end signal 205 to a microprocessor 13. The microprocessor 13 receives the signal, and stops the execution of the inside diagnosis without outputting a diagnosis end information signal 203. Therefore, a register 101 is left in a set state, and as the result, a high level inactive indication signal 206 is continuously applied to a bus interface circuit 12. The bus interface circuit 12 holds a connection with a common bus in an inactive state.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input / output control device for controlling an input / output device in a data processing system.

[0002]

2. Description of the Related Art Conventionally, an input / output control device for controlling an input / output device in a data processing system has an internal diagnostic function, and executes an internal diagnosis of the input / output control device when the system is started, for example. However, the completion of execution of the internal diagnosis is left to the input / output control device, and the internal diagnosis of the input / output control device cannot be stopped by the system control processing device of the data processing system.

[0003]

Therefore, in the conventional input / output control device, when the microprocessor for performing internal diagnosis runs away, the internal diagnostic state continues indefinitely, and as a result, the data processing system is Even if the operation is started, the common bus is affected by the I / O controller whose internal diagnosis is not completed, and the system operation becomes abnormal.

An object of the present invention is to solve such a problem, and even if the internal diagnosis is not completed due to some trouble,
An object of the present invention is to provide an input / output control device for a data processing system that allows the system to operate normally without affecting the common bus.

[0005]

A first solving means of the present invention for solving the above-mentioned problems is to provide an input / output control device which constitutes a data processing system and controls an input / output device,
When the internal diagnosis is performed and the execution of the internal diagnosis is completed, a diagnosis end report signal is output, and when the diagnosis end signal is input, the information processing device that stops the execution of the internal diagnosis and the activation instruction signal are input. A bus interface circuit that activates the connection with the common bus and inactivates the connection with the common bus when the inactivation instruction signal is input; and When the inactivation instruction signal is output to the bus interface circuit and the diagnosis end report signal is input from the information processing device, the activation instruction signal is output to the bus interface circuit and the diagnosis end instruction signal is input. A second aspect of the present invention for solving the above-mentioned problems, characterized by comprising an internal diagnostic control circuit for outputting the diagnostic end signal to the information processing device. The solution is
In the input / output control device that configures the data processing system and controls the input / output device, the internal diagnosis is performed, and when the execution of the internal diagnosis is completed, the information processing device that outputs the diagnostic end report signal and the activation instruction signal are input. A bus interface circuit for activating the connection with the common bus and inactivating the connection with the common bus, and for inactivating the connection with the common bus for inputting the diagnosis start instruction signal , Outputting the inactivation instruction signal to the bus interface circuit and outputting the activation instruction signal to the bus interface circuit when the diagnosis end report signal is input from the information processing device, and inputting the diagnosis end instruction signal And an internal diagnostic control circuit for outputting the inactivation instruction signal to the bus interface circuit when the above is performed.

A third solving means of the present invention for solving the above problems is the input / output control device of the data processing system according to the above first or second solving means, wherein the information processing device is a microprocessor. It is characterized by being.

[0007]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 shows an example of a data processing system including the input / output control device according to the first and second inventions. This system includes a system control processing unit 1, a central processing unit 2, a common bus 3, an input / output control unit 4, and an input / output unit 5. The system control processing unit 1, the central processing unit 2, and the input / output control unit 4 are connected to the common bus 3.

The input / output control device 4 is connected to the input / output device 5 and controls the input / output device 5.
A bus interface circuit 12 connected to the common bus 3 for controlling the common bus 3, a microprocessor 13 for performing internal diagnosis of the input / output control device 4, and an internal diagnosis control circuit 1
4 and.

The internal diagnosis control circuit 14 is constructed in detail as shown in FIG. Internal diagnostic execution register 10
1 is a diagnosis start signal 201 of a higher level than the common bus 3.
Is set when a high level diagnostic end report signal 203 is input from the microprocessor 13, and is reset when a high level diagnostic end report signal 203 is input.
Outputs a low level signal. AND circuit 1
03 outputs a high level signal when the high level diagnostic end instruction signal 204 is input and the register 101 outputs a high level signal. The diagnostic abnormality register 102 is set by a high level signal from the AND circuit 103 and reset by a high level diagnostic start instruction signal 201 from the common bus 3. When it is set, the diagnostic end signal 205 is a high level signal, and when it is reset, the diagnostic end signal 205 is a low level signal.
R) Output to the circuit 104. The OR circuit 104 outputs a high level inactivation instruction signal 206 to the bus interface circuit 12 when a high level signal is input from either the register 101 or 102. Further, the diagnosis start instruction signal 201 from the common bus 3 is directly output to the microprocessor 13 and each section as an internal reset signal.

Next, the operation of the input / output control device according to the first aspect of the invention thus constructed will be described. When the diagnosis start instruction signal 201 is input from the system control processing device 1 through the common bus 3, the internal diagnosis control circuit 1
4 outputs an internal reset signal 202, so that the microprocessor 13 starts internal diagnosis of the input / output control device 4. At the same time, since the signal 201 is input, the register 101 is set and a high level signal is output. The signal is output to the bus interface circuit 12 as an inactivation instruction signal 206 through the OR circuit 104. The bus interface circuit 12 receives the signal 2
When 06 is received, the connection with the common bus 3 is deactivated.

Thereafter, the internal diagnosis of the input / output control device 4
When the system control processing device 1 finishes within the time limit specified by the system control processing device 1, the system control processing device 1
The microprocessor 13 outputs the diagnosis end report signal 203 before outputting the diagnosis end instruction signal 204, and as a result, the register 101 is reset. Therefore, the inactivation instruction signal 206 becomes low level, the bus interface circuit 12 activates the connection with the common bus, and thereafter the input / output control device 4 is connected with the common bus 3 and based on the instruction of the central processing unit 2. Operate.

On the other hand, when the internal diagnosis of the input / output control device 4 is not completed within the time limit defined by the system control processing device 1 due to some trouble, the system control processing device 1 outputs the diagnosis end instruction signal 204. .. At this time, since the register 101 outputs the high level signal, the AND circuit 103 outputs the high level signal. As a result, the register 102 is set and the high level diagnostic end signal 205 is output to the microprocessor 1.
Output to 3.

Upon receipt of this signal, the microprocessor 13 stops the execution of the internal diagnosis without outputting the diagnosis end report signal 203. Therefore, the register 101 remains in the set state, and as a result, the high level inactivation instruction signal continues and the bus interface circuit 1
Given to 2. The bus interface circuit 12 therefore keeps the connection with the common bus 3 inactive. Therefore, the abnormality generated in the input / output control device 4 does not adversely affect the common bus 3, and the central processing unit 2 can operate normally without being affected by the input / output control device 4 in which the abnormality has occurred.

In this embodiment, the high-level diagnostic end signal 205 is also supplied to the bus interface circuit 12 through the OR circuit 104, so that the bus interface circuit 12 is also affected by the output signal of the register 102. Keeps the connection with the common bus 3 inactive. However, as described above, the microprocessor 13 stops the internal diagnosis, and the register 101
Therefore, the output of the register 102 does not necessarily have to be supplied to the OR circuit 104.

Next, the operation of the input / output control device according to the second invention will be described. When the diagnosis start instruction signal 201 is input from the system control processing device 1 through the common bus 3, the internal diagnosis control circuit 14 causes the internal reset signal 202
As a result, the microprocessor 13 starts the internal diagnosis of the input / output control device 4. At the same time, signal 20
The register 101 is set by the input of 1, and outputs a high level signal. The signal is output to the bus interface circuit 12 as an inactivation instruction signal 206 through the OR circuit 104. When the bus interface circuit 12 receives the signal 206, the common bus 3
Inactivate the connection with.

After that, the internal diagnosis of the input / output control device 4
When the system control processing device 1 finishes within the time limit specified by the system control processing device 1, the system control processing device 1
The microprocessor 13 outputs the diagnosis end report signal 203 before outputting the diagnosis end instruction signal 204, and as a result, the register 101 is reset. Therefore, the inactivation instruction signal 206 becomes low level, the bus interface circuit 12 activates the connection with the common bus, and thereafter the input / output control device 4 is connected with the common bus 3 and based on the instruction of the central processing unit 2. Operate.

On the other hand, when the internal diagnosis of the input / output control device 4 is not completed within the time limit defined by the system control processing device 1 due to the runaway of the microprocessor 13 or the like, the system control processing device 1 ends the diagnosis. The instruction signal 204 is output. At this time, register 101
Outputs a high level signal, the AND circuit 1
03 outputs a high level signal, as a result, the register 102 is set and the high level diagnostic end signal 205 is output.
Is output. Since this signal is supplied to the bus interface circuit 12 through the OR circuit 104, the bus interface circuit 12 keeps the connection with the common bus 3 inactive thereafter. Therefore, the common bus 3 is not affected, and the central processing unit 2 can operate normally without being affected by the I / O control unit 4 in which an abnormality has occurred. Even if the microprocessor 13 subsequently outputs the diagnosis end report signal 203 due to an abnormal operation and the register 101 is reset, the register 102 is reset.
Outputs a high level signal, the inactive state of the connection with the common bus 3 is maintained.

In this embodiment, when the register 102 is set, the high-level diagnostic end signal 205 is also output to the microprocessor 13, but the signal 205 is not necessarily output to the microprocessor 13. do not have to. That is, the diagnosis end instruction signal 204
When the register 102 is set by, the high level deactivation instruction signal 206 is output to the bus interface circuit 12 regardless of the state of the register 101, and the microprocessor 13 does not stop executing the internal diagnosis. , The connection with the common bus 3 is maintained in an inactive state.

[0019]

As described above, in the input / output control device of the data processing system according to the first aspect of the invention, the internal diagnostic control circuit causes the information processing device to receive the diagnostic end signal when the diagnostic end instruction signal is input. When the information processing device receives the signal, it stops the execution of the internal diagnosis. As a result, the diagnostic completion report signal is not input from the information processing device to the internal diagnostic control circuit, the internal diagnostic control circuit continues to output the inactivity instruction signal to the bus interface circuit, and the connection with the common bus is not established. It remains active. Therefore, in the input / output control device of the data processing system of the present invention, for example, when the internal diagnosis does not end even after a predetermined time has elapsed, by inputting the diagnosis end instruction signal to the internal diagnosis control circuit, The connection of the bus interface circuit with the common bus can be maintained in an inactive state, the common bus is not affected by an abnormal input / output control device, and the data processing system can operate normally. It will be possible. As a result, the reliability of the data processing system is improved.

Further, in the input / output control device of the data processing system according to the second aspect of the present invention, the internal diagnostic control circuit outputs the inactive instruction signal to the bus interface circuit when the diagnostic end instruction signal is input, As a result, the bus interface circuit deactivates the connection with the common bus. Therefore, in the input / output control device of the data processing system of the present invention, for example, when the internal diagnosis does not end even after a predetermined time has elapsed, by inputting the diagnosis end instruction signal to the internal diagnosis control circuit, The connection of the bus interface circuit with the common bus can be maintained in an inactive state, the common bus is not affected by an abnormal input / output control device, and the data processing system can operate normally. It will be possible. As a result, the reliability of the data processing system is improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an example of an input / output control device of a data processing system according to first and second inventions.

FIG. 2 is a circuit diagram showing in detail an internal diagnostic control circuit that constitutes the input / output control device of FIG.

[Explanation of symbols]

 1 System Control Processing Unit 2 Central Processing Unit 3 Common Bus 4 Input / Output Control Unit 5 Input / Output Device 11 Input / Output Control Circuit 12 Bus Interface Circuit 13 Microprocessor 14 Internal Diagnostic Control Circuit 101 Internal Diagnostic Execution Register 102 Diagnostic Abnormality Register 103 AND Circuit 104 OR circuit

Claims (3)

[Claims] 1. An input / output control device that constitutes a data processing system and controls an input / output device, performs an internal diagnosis, and outputs a diagnosis end report signal when the execution of the internal diagnosis is completed. When an input signal is input, the connection between the information processing device that stops the execution of the internal diagnosis and the common bus is activated when the activation instruction signal is input, and when the inactivation instruction signal is input, the common bus is connected to the common bus. And a bus interface circuit for inactivating the connection of the device, and when the diagnosis start instruction signal is input, the inactivation instruction signal is output to the bus interface circuit, and the diagnosis end report signal is input from the information processing device. When
Data processing, comprising: an internal diagnostic control circuit that outputs the activation instruction signal to the bus interface circuit and outputs the diagnostic end signal to the information processing device when the diagnostic end instruction signal is input. I / O controller for the system. 2. An information processing device, which constitutes a data processing system and which performs an internal diagnosis in an input / output control device for controlling the input / output device, and outputs a diagnosis end report signal when the execution of the internal diagnosis is completed, A bus interface circuit that activates the connection with the common bus when the activation instruction signal is input, and deactivates the connection with the common bus when the activation instruction signal is input, and a diagnosis start instruction signal Is input, the inactivation instruction signal is output to the bus interface circuit, and when the diagnosis end report signal is input from the information processing device,
An internal diagnostic control circuit that outputs the activation instruction signal to the bus interface circuit and outputs the inactivation instruction signal to the bus interface circuit when a diagnosis end instruction signal is input. I / O controller for the processing system. 3. The input / output control device of the data processing system according to claim 1, wherein the information processing device is a microprocessor.