JPH05172672A - Semiconductor piezo-electric element - Google Patents

Abstract

PURPOSE:To obtain stable accuracy over a wide range of temperature with excellent sensitivity to a fine pressure by including a hetero junction structure comprising a compound semiconductor at a pressure sensing section. CONSTITUTION:For example, a Zn doped p-type Ga0.72Al0.28As epitaxial growth layer 5 with a thickness of 1mum and a Zn doped p-type GaAs epitaxial growth layer 2 with a thickness of 15mum are formed on a semi-insulating undoped GaAs substrate 1 using a liquid phase epitaxial growth method. Then, after the deposition of an AuBe alloy on the surface of a p-type GaAs layer at a thickness of about 5000Angstrom an electrode pad 3 is formed and moreover, an alloying is performed in the atmosphere of N2 at 450 deg.C for 10min, to form an ohmic electrode. An SiO2 film 4 is formed on the surface thereof. Furthermore, a photoresist is applied on the side of the substrate 1 to form a mask pattern so that it is located at the center of the electrode and the work is placed in an etching solution to etch the substrate 1. The etching is stopped with the layer 5 and a piezo-electric element is formed. The use of a hetero junction of a compound semiconductor at a pressure sensing part enables the formation of a highly sensitive piezo-electric element with an improved operation temperature range.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor piezoelectric element, and particularly to a compound semiconductor heterojunction structure having excellent sensitivity to pressure and suitable for improving mechanical strength and temperature compensation characteristics. The present invention relates to a diaphragm type piezoelectric element used for the operating layer and a manufacturing method thereof.

[0002]

2. Description of the Related Art A piezoelectric element is an element that converts pressure into an electric signal. Conventionally, a metal thin film is used for the pressure sensitive portion. Further, a semiconductor piezoelectric element having an improved sensitivity is also manufactured by using a single element semiconductor such as Si or Ge. Semiconductor piezoelectric elements can be roughly classified into two types in terms of operating principle. 1
One is called a piezoresistive method, which utilizes the piezo effect that the resistance changes when pressure is applied to the semiconductor. The resistance change rate with respect to pressure is represented by the sum of the component due to the shape change and the component due to the specific resistance change, and generally depends on the specific resistance change rate in a semiconductor. Single element semiconductors such as Ge and Si have a diamond structure, and when pressure is applied, the lattice spacing of the crystal changes, carrier concentration and mobility change, and as a result, electrical resistance changes.

In a piezoresistive type piezoelectric element, a value called a gauge factor G is used to express sensitivity.

The gauge factor G is generally G≈2 for most metals. On the other hand, in the case of semiconductors, the gauge factor is larger than 2, and in particular, the gauge factor of the [III] axis of p-type Si is the largest, and this characteristic is usually utilized in the semiconductor pressure sensor.

The structure of the sensor using the piezo resistance method includes a method in which a resistance wire gauge is attached to the pressure receiving plate and a method in which the semiconductor itself also processes the pressure receiving plate. The former is called a bulk gauge, and is made by thinning a single crystal of Si or Ge into a strip shape, attaching electrodes to both ends of this, and attaching this to a pressure receiving plate such as a diaphragm (JP-A-2- 12
8479). In the latter case, a region corresponding to a strip gauge is created on the wafer surface by selective diffusion, ion implantation, etc.
Attach the electrode to this. Recently, a gauge is also processed and formed on the back surface of the wafer by utilizing anisotropic etching (see JP-A-2-30188).

Another method classified in terms of operation principle is called a pn junction method, and has a semiconductor forbidden band width E.
It utilizes that g changes with pressure. Since the diode characteristics change when pressure is applied to the pn junction of the semiconductor, it is intended to detect this difference by a diode or a transistor. Further, when a tunnel diode is used, such a delicate difference can be detected as a relatively large current change, and thus such a method is also used.

In the case of a semiconductor piezoelectric element whose operation principle is a piezoresistive method, the gauge factor is determined by a material-specific value such as Poisson's ratio, Young's modulus, and piezoresistive coefficient. Without it, the sensitivity cannot be improved. For this reason, at present, the Si semiconductor piezoelectric element uses a microfabrication technique and utilizes a property (anisotropic etching) that the p + type Si layer is difficult to dissolve in a KOH solution or an ethylenediamine-pyrocatechol-water mixed solution (anisotropic etching). Techniques have been developed for producing thin Si diaphragms of 20 μm or less. But S
Since the forbidden band width of i itself is 1.12 eV at room temperature, the sensitivity changes sensitively with temperature, so that a temperature compensation circuit or the like is required.

In the case of a semiconductor piezoelectric element whose operation principle is the pn junction method, the sensitivity is determined by the size of the forbidden band width peculiar to the semiconductor itself, and Ge is better than Si. However, Ge's forbidden band width is only 0.66 eV at room temperature,
The use temperature range is limited (-20 to 40 ° C). Ga has excellent Young's modulus, piezoresistive coefficient, and forbidden band width characteristics.
A bulk gauge piezoelectric element using a compound semiconductor such as As, InSb, GaP, or GaSb is also conceivable, but the bulk gauge method does not provide a highly accurate and highly sensitive pressure sensor. As a method for solving these problems, a diaphragm type pressure sensor using a compound semiconductor has been proposed. For example, Japanese Patent Application Laid-Open No. 58-182276 discloses Fig. 4 which discloses a diaphragm type pressure sensor using a GaAlAs pn junction film. Further, JP-A-3-18067 discloses a diaphragm type pressure sensor using an n-type active layer in a GaAs crystal as a piezoresistive component.

[0009]

In a conventional piezoelectric element using a single-element compound semiconductor, the sensitivity greatly depends on the characteristic properties of the material of the pressure sensitive portion such as the piezoresistive coefficient and Young's modulus. Such a semiconductor having a small forbidden band has a sensitivity that is sensitive to temperature, and has a drawback that the operating temperature range is limited to obtain stable operation. In addition, since the piezoelectric element using the compound semiconductor pn junction uses the homojunction in the pressure sensitive portion, the sensitivity is still insufficient to detect a minute pressure, and the temperature at which the piezoelectric element uses a stable operation over a wide temperature range. It was not possible to obtain a piezoelectric element having excellent characteristics.

[0010]

Therefore, as a result of intensive studies to solve the above-mentioned problems, the present inventor has solved the above-mentioned problems by adopting a diaphragm system using a heterojunction structure of a compound semiconductor for a pressure sensitive portion. It was found that the present invention has been completed. In the present invention, a heterojunction of a compound semiconductor is formed on a semiconductor substrate by a liquid phase epitaxy method or a vapor phase epitaxy method, and then the semiconductor substrate is removed in an annular shape by etching, leaving a heterojunction portion to form a diaphragm structure, and a pressure sensitive portion. For this, the thin film of the heterojunction is used. The heterojunction of the present invention does not refer to a conventional pedestal (semiconductor substrate) portion and a pressure-sensitive portion (gauge) junction portion,
Refers to the one included in the pressure sensitive part.

First, the semiconductor substrate used in the present invention is S
A commonly used semiconductor substrate such as i, GaP, GaAs, InP can be used. Although a heterojunction is formed on these substrates, a combination of semiconductors in which the lattice constants of the crystals match each other is preferable in order to obtain a good crystal. For example, Ga _1-x Al _x has a good combination of lattice constants.
As / GaAs (0 <x ≦ 1), Ga _1-y Al _y P / GaP (0 <
_{y ≦ 1), Ga z In} 1-z As / InP (0.37 ≦ z ≦ 0.5
7), GaP / Si, GaAs / Si and the like. Normal,
When a different crystal from the substrate is epitaxially grown on the substrate and the same crystal as the substrate is epitaxially grown on the epitaxial growth layer, a heterojunction with good crystallinity is obtained, and a selective etching method is also used in the subsequent process for forming the diaphragm. Is available. The thickness of the epitaxial layer forming the heterojunction has an arbitrary value depending on the target detection pressure, but considering the mechanical strength, it is 1 μm or more and 50 μm or less, preferably 10 to 20 μm.

When the resistance change due to pressure is detected by the piezo resistance method, an electrode exhibiting ohmic characteristics is formed on the surface of the epitaxial growth layer by a sputtering method, a vacuum evaporation method, a plating method or the like. In such a system, a bridge circuit used in a normal semiconductor piezoelectric element can also be applied.

When the pn junction method is used, electrodes having ohmic characteristics may be formed in the p and n type layers, respectively. In this method, for example, the diaphragm portion is formed by a p-type layer, and an n-type layer having a thickness of 3000 Å or less is formed thereon,
The carrier concentration of the p-type layer changes due to the pressurization, and the change is
It is also possible to try amplification with a transistor formed in the mold layer. At this time, this effect can be obtained even if the electrode forming the Schottky barrier is formed without forming the n-type layer on the p-type layer. Further, not only the above-mentioned epitaxial method but also an ion implantation method can be used for the n-type layer.
The method of performing ion implantation in the liquid phase epitaxial growth phase is the most reproducible and can be manufactured at the lowest cost.

A mask pattern is formed on the surface of a semiconductor substrate having a heterojunction formed by the above-mentioned method by a normal photolithography method, and a substrate portion is selectively removed by etching to form an annular recess. A diaphragm structure is formed by leaving the bonded portion in a thin film shape.
For etching, a type of semiconductor used for the heterojunction that exhibits selectivity is used. For example, GaAlAs / GaAs
Then, a dry etching method using NH ₃ —H ₂ O system or Freon 12 is used. In InGaAs / InP, H ₃ PO _{4 is used.}
-H ₂ O ₂ -H ₂ O, or the like can be used. If you do this,
The pressure sensitive portion and the substrate can be integrated, and a highly sensitive and highly accurate piezoelectric element can be obtained.

[0015]

In the present invention, the pressure-sensitive portion of the piezoelectric element is made of any one of Young's modulus, piezoresistive coefficient, Poisson's ratio, and forbidden band width, or a compound semiconductor having excellent properties in all respects is used in at least one phase of the heterojunction , The gauge factor is higher than that of the single element semiconductor, and high sensitivity can be achieved. Further, a semiconductor having a small forbidden band width (for example, InSb (Eg = 0.17 eV), InAs (Eg = 0.
36 eV) etc.) is effective for use at low temperature (-30 ° C. or lower). On the contrary, compound semiconductors with a large forbidden band width (eg, GaAs (Eg = 1.43 eV), AlAs (Eg = 2.1)
5eV) or the like) makes the piezoelectric element excellent in thermal stability. Further, when the pn junction method is used, the band gap can be arbitrarily selected by selecting the compound semiconductor material, which facilitates the formation of a piezoelectric element having a predetermined characteristic.

[0016]

EXAMPLES Next, the present invention will be described in more detail with reference to examples. (Example 1) of semi-insulating undoped GaAs substrate 1
On the (100) plane, Zn-doped p- with a thickness of 1 μm was formed by the liquid phase epitaxial growth method using the ordinary slide board method.
A type Ga _0.72 Al _0.28 As epitaxial growth layer 5 and a Zn-doped p − type GaAs epitaxial growth layer 2 having a thickness of 15 μm were formed (see FIG. 1A). Then, p-type Ga
An AuBe alloy (Be concentration 4
%) Was deposited to a thickness of about 5000Å. After that, the electrode pad 3 was formed by the usual photolithography method. Further, alloying was performed at 450 ° C. for 10 minutes in an N ₂ atmosphere to form an ohmic electrode. An SiO ₂ film was formed on the surface by the plasma CVD method (see FIG. 1B).

Further, a photoresist is applied to the GaAs substrate side,
A mask pattern was formed in the center of the ohmic electrode. Finally, the GaAs substrate is etched by leaving it in an NH ₃ —H ₂ O ₂ -based etching solution to remove AlGa
Since the etching stops at the As layer, the piezoelectric element as shown in FIG. 1C is formed.

In this structure, the gauge factor is G = -3800, and the sensitivity is about 20 times higher than that of the conventional p-type Si.
Moreover, since stop etching is possible, there is little variation between lots, and piezoelectric elements can be obtained stably. The measurement area was 0.005 kg / cm ^{2 to} 500 kg / cm ² , and the operating temperature was -50 to 150 ° C. and stable operation was performed.

(Example 2) Ga _0.72 A similar to Example 1
l p of GaAs substrate 1 having _0.28 As / GaAs heterojunction
A photoresist was applied to the surface of the type GaAs epitaxial growth layer 2 to form a bridge circuit pattern. ²⁹ Si ions were ion-implanted by an ion implantation method under the conditions of an acceleration voltage of 100 keV and a dose amount of 3.5 × 10 ¹² cm ⁻² . After removing the resist, annealing was performed in an AsH ₃ (arsine) atmosphere to obtain a bridge circuit of the n − type GaAs active layer 6.
Next, the electrode pad 7 was formed again on the bridge circuit by the photolithography method. Au-Ge by vacuum deposition
/ Ni / Au 3-layer alloy (Ge concentration 12%, Au-Ge 20
00Å, Ni400Å, Au5000Å) was vapor-deposited, and the resist was removed by a lift-off method (see FIG. 2 (b)).

Then, in the same manner as in Example 1, a photoresist was applied to the surface of the GaAs substrate to form a circular mask pattern so as to be the center of the pressure sensitive portion of the bridge circuit. Finally NH
By leaving it in the _3- H ₂ O ₂ -based etching solution, Ga
Since the As layer was etched and the GaAlAs layer stopped etching, a piezoelectric element as shown in FIG. 2C was formed. In this structure, the gauge factor was G = 5000.
ΔV / V when the input voltage is V and the output voltage is ΔV
= 250 mV / V (pressure 760 mmHg), this characteristic is-
It was stable at 50 to 150 ° C.

Example 3 A semi-insulating Fe-doped InP single crystal mirror wafer 8 having a specific resistance of 1 × 10 ⁷ Ω · cm was set in an ordinary atmospheric pressure MO-VPE apparatus and Ga _0.47 In
_0.53 As crystal 9 was epitaxially grown for 30 minutes.
Then, the InP crystal 10 is epitaxially grown for 10 hours, and InP / Ga _0.47 In is grown on the InP substrate.
_{A 0.53} As heterojunction was obtained (see FIG. 3 (a)). This In
When the various characteristics of the P, Ga _0.47 In _0.53 As epitaxial growth layer were measured, they were as follows. The InP epitaxial layer is n-type and has a thickness of 15 μm and a carrier concentration of (1
It was ± 0.1) × 10 ¹⁶ cm ^-3 . Ga _0.47 In _0.53 A
The s epitaxial growth layer was n-type, the thickness was 1.0 μm, the carrier concentration was (2 ± 0.1) × 10 ¹⁶ cm ⁻³ , and the band gap energy was Eg = 0.86 eV.

Photoresist was applied to the surface of the InP layer to form a bridge circuit pattern. ²⁴ by ion implantation
Acceleration voltage of 50 keV, dose of 3 × 10 ¹² cm ^-2
Then, the p-type InP active layer 11 was obtained. After removing the resist, lamp annealing was performed. The electrode pad 3 was formed again on the bridge circuit by the photolithography method. The AuBe alloy was vacuum-deposited at 5000Å and the resist was removed by the lift-off method (see FIG. 3 (b)).
Hereinafter, a diaphragm was formed in the same manner as in Example 2.
(See FIG. 3 (c)). Note that a 2% HCl solution was used for etching. In this structure, the gauge factor was G = -100.
However, the forbidden band width is small at Eg = 0.86 eV and extremely low temperature (-1
It is suitable for use at 0 to -50 ° C.

Example 4 A p-type Si layer 13 having a thickness of 20 μm was formed on the (100) plane of the n-type silicon 12 having a thickness of 500 μm and 3 Ω · cm by the liquid phase method. Further, an n-type GaP layer having a thickness of 1 μm was formed on the Si layer by the MoCVD growth method (see FIG. 4A). AuGe (Ge concentration: 12%, thickness: 5000Å) was vapor-deposited on the surface of the GaP layer by a vacuum vapor deposition method. After that, an electrode pad was formed by a normal photolithography method. Alloying was carried out at 450 ° C. for 5 minutes in an N ₂ atmosphere to form an ohmic electrode (FIG. 4).
(See (b)). A diaphragm portion was formed in the same manner as in Example 1 (see FIG. 4C). 1 for etching
A 0.1 KOH solution was used. In this structure, the gauge factor is G
= 2000. Measurement area is 0.01kg / cm ² ~ 30
Although it was 0 kg / cm ² , the operation temperature was stable at -20 to 160 ° C.

[0024]

As described above, by using the compound semiconductor heterojunction having excellent Young's modulus, piezoresistive coefficient, and forbidden band characteristic in the pressure sensitive portion, a piezoelectric element with high sensitivity and improved operating temperature range is formed. did it. As a result, higher reliability can be obtained as compared with the conventional Si and Ge semiconductors, and it can be used as a piezoelectric element for controlling an engine of a car used in a place where the temperature changes drastically.

Further, since it has a heterojunction, a selective etching method of stopping at the interface can be used,
A diaphragm with a uniform thickness can be formed with good reproducibility.
Also, cantilever type acceleration sensor, electrostatic relay,
The application to an optical modulator or the like is also possible. Furthermore, since compound semiconductors such as GaAs have excellent radiation resistance, they can be used in outer space.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a process of manufacturing a semiconductor piezoelectric element according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a process of manufacturing a semiconductor piezoelectric element according to a second embodiment of the present invention.

FIG. 3 is a diagram illustrating a process of manufacturing a semiconductor piezoelectric element according to a third embodiment of the present invention.

FIG. 4 is a diagram illustrating a process of manufacturing a semiconductor piezoelectric element according to a fourth embodiment of the present invention.

[Explanation of symbols]

1 GaAs substrate 2 GaAs epitaxial growth layer 3, 7 electrode pad 4 SiO ₂ film 5 GaAlAs epitaxial growth layer 6 n- type GaAs active layer 8 InP substrate 9 GaInAs epitaxial growth layer 10 InP epitaxial growth layer 11 p type InP active layer 12 n type Si substrate 13 p-type Si epitaxial growth layer 14 n-type GaP epitaxial growth layer 15 electrode pad

Claims (3)

[Claims] 1. A piezoelectric element having a heterojunction structure made of a compound semiconductor in a pressure-sensitive portion. 2. The heterojunction structure is Al _x Ga _1-x As / Ga.
As (0 <x ≦ 1), Al _y Ga _1-y P / GaP (0 <y ≦
_{1), Ga z In 1-} z As / InP (0.37 ≦ z ≦ 0.5
7), any one of GaP / Si and GaAs / Si
The piezoelectric element according to claim 1, wherein the piezoelectric element comprises a seed. 3. A heterojunction structure is formed on a semiconductor substrate by a liquid phase epitaxial growth method, and then impurity ions are implanted on the epitaxial growth layer by an ion implantation method to form an active layer, and then an electrode is formed on the active layer. After the formation, a part of the semiconductor substrate is removed by using a selective etching method to form a diaphragm including a heterojunction structure.