JPH05144987A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPH05144987A
JPH05144987A JP30452691A JP30452691A JPH05144987A JP H05144987 A JPH05144987 A JP H05144987A JP 30452691 A JP30452691 A JP 30452691A JP 30452691 A JP30452691 A JP 30452691A JP H05144987 A JPH05144987 A JP H05144987A
Authority
JP
Japan
Prior art keywords
lead terminal
external lead
semiconductor device
semiconductor element
tin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP30452691A
Other languages
Japanese (ja)
Other versions
JP2728584B2 (en
Inventor
Takeshi Torigoe
岳 鳥越
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP3304526A priority Critical patent/JP2728584B2/en
Publication of JPH05144987A publication Critical patent/JPH05144987A/en
Application granted granted Critical
Publication of JP2728584B2 publication Critical patent/JP2728584B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Abstract

PURPOSE:To provide the production of a semiconductor device which accurately and surely connects electrically an semiconductor element, which stores an outer lead terminal by surely and firmly bonding it on the wiring conductor of an external electric circuit board, on the wiring conductor of the external electric circuit board. CONSTITUTION:A semiconductor device is provided with a semiconductor element 4 which is stored in a container 3 whose external surface is provided with an outer lead terminal 5 and the electrode of the semiconductor element 4 is electrically connected to the outer lead terminal 5. Then, the surface of the outer lead terminal 5 of the semiconductor device is coated with a metal layer 8 composed of tin, the outer lead terminal 5 is bent by a pressing machine P and solder 9 is deposited on the surface of the outer lead terminal 5. The outer lead terminal 5 is easily bent in the prescribed shape without being caught by the pressing machine by the metal layer composed of tin which allows smooth slide.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体素子収納用パッケ
ージ内に半導体素子を収容して成る半導体装置の製造方
法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device in which a semiconductor element is housed in a semiconductor element housing package.

【0002】[0002]

【従来の技術】従来、コンピューター等の情報処理装置
には半導体素子を半導体素子収納用パッケージ内に気密
に収容した半導体装置が使用されている。
2. Description of the Related Art Conventionally, a semiconductor device in which a semiconductor element is hermetically housed in a semiconductor element housing package has been used for an information processing apparatus such as a computer.

【0003】かかる情報処理装置に使用される半導体装
置はまず、アルミナセラミックス等の電気絶縁材料から
成り、その上面の略中央部に半導体素子を収容するため
の凹部及び該凹部周辺から上面外周縁部にかけて導出さ
れたタングステン、モリブデン、マンガン等の高融点金
属粉末から成る多数のメタライズ配線層を有する絶縁基
体と、半導体素子を外部電気回路に電気的に接続するた
めに前記メタライズ配線層に銀ロウ等のロウ材を介しロ
ウ付けされたコバール金属や42アロイ等から成る外部
リード端子と、蓋体とから構成される半導体素子収納用
パッケージを準備し、次に前記半導体素子収納用パッケ
ージの絶縁基体の凹部底面に半導体素子をガラス、樹
脂、ロウ材等の接着材を介して載置固定するとともに該
半導体素子の各電極をボンディングワイヤを介してメタ
ライズ配線層に電気的に接続させ、しかる後、前記絶縁
基体と蓋体とから成る容器内部に半導体素子を気密に封
止することによって製作される。
A semiconductor device used in such an information processing apparatus is made of an electrically insulating material such as alumina ceramics, and has a recess for accommodating a semiconductor element in a substantially central portion of its upper surface and a peripheral portion of the upper surface to a peripheral portion of the recess. An insulating substrate having a large number of metallized wiring layers made of refractory metal powder such as tungsten, molybdenum, manganese, etc., and silver metal or the like on the metallized wiring layers for electrically connecting a semiconductor element to an external electric circuit. A semiconductor element housing package including an external lead terminal made of Kovar metal or 42 alloy brazed through the brazing material and a lid is prepared. A semiconductor element is mounted and fixed on the bottom surface of the recess through an adhesive such as glass, resin, or brazing material, and each electrode of the semiconductor element is fixed. Electrically connected to the metallized wiring layer via a bonding wire, and thereafter, is fabricated by sealing hermetically the semiconductor element to the container interior made of said insulating base and the lid.

【0004】かかる従来の半導体装置は通常、外部リー
ド端子を外部電気回路基板の配線導体に当接するように
プレス加工法によって、例えばL字型に折り曲げ加工す
るとともに半田を予め溶着させておき、外部リード端子
を外部電気回路基板の配線導体上に載置当接させるとと
もに外部リード端子に予め溶着させておいた半田を再溶
融させ、外部リード端子と配線導体とを半田接合させる
ことによって半導体装置を外部電気回路基板上に実装す
るようになっている。
In such a conventional semiconductor device, normally, an external lead terminal is bent into, for example, an L-shape by a pressing method so as to abut the wiring conductor of the external electric circuit board, and solder is pre-welded, By placing the lead terminal on the wiring conductor of the external electric circuit board and abutting it, and re-melting the solder previously welded to the external lead terminal, the external lead terminal and the wiring conductor are solder-bonded to each other to form a semiconductor device. It is designed to be mounted on an external electric circuit board.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、この従
来の半導体装置においては外部リード端子がコバール金
属や42アロイから成っており、該コバール金属等は表
面の滑りが悪く、そのため外部リード端子を外部電気回
路基板の配線導体に当接させるのにプレス加工法により
所定形状に折り曲げ加工する際、外部リード端子の一部
がプレス加工機に引っ掛かってちぎれてしまい、その結
果、半導体装置の内部に収容している半導体素子を外部
電気回路基板の配線導体に正確、且つ確実に電気的接続
することができないという欠点を有していた。
However, in this conventional semiconductor device, the external lead terminals are made of Kovar metal or 42 alloy, and the Kovar metal or the like has a poor surface slippage. When it is bent into a predetermined shape by a press working method so as to come into contact with the wiring conductor of the circuit board, a part of the external lead terminal is caught by the press working machine and is torn off, and as a result, it is housed inside the semiconductor device. However, there is a drawback that the semiconductor element cannot be accurately and surely electrically connected to the wiring conductor of the external electric circuit board.

【0006】[0006]

【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は外部リード端子を容易に所定形状に折り
曲げ加工することができ、外部リード端子を外部電気回
路基板の配線導体に確実、強固に接合させるのを可能と
して内部に収容する半導体素子を外部電気回路基板の配
線導体に正確、且つ確実に電気的接続することができる
半導体装置の製造方法を提供することにある。
SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and an object thereof is to make it possible to easily bend an external lead terminal into a predetermined shape so that the external lead terminal can be used as a wiring conductor of an external electric circuit board. It is an object of the present invention to provide a method for manufacturing a semiconductor device, which enables reliable and strong bonding, and enables accurate and reliable electrical connection of a semiconductor element housed inside to a wiring conductor of an external electric circuit board.

【0007】[0007]

【課題を解決するための手段】本発明の半導体装置の製
造方法は外表面に外部リード端子が取着された容器の内
部に半導体素子を収容するとともに該半導体素子の電極
を前記外部リード端子に電気的に接続した半導体装置を
準備し、前記半導体装置の外部リード端子表面に錫から
成る金属層を被着させ、次に前記外部リード端子をプレ
ス加工法により折り曲げ加工し、最後に前記錫の金属層
を被着させた外部リード端子の表面に半田を溶着させる
ことを特徴とするものである。
According to a method of manufacturing a semiconductor device of the present invention, a semiconductor element is housed inside a container having an external lead terminal attached to an outer surface thereof, and an electrode of the semiconductor element is connected to the external lead terminal. A semiconductor device electrically connected is prepared, a metal layer made of tin is deposited on the surface of the external lead terminal of the semiconductor device, then the external lead terminal is bent by a press working method, and finally the tin It is characterized in that solder is welded to the surface of the external lead terminal to which the metal layer is adhered.

【0008】[0008]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the accompanying drawings.

【0009】図1 は本発明の製造方法によって製作され
た半導体装置の一実施例を示し、半導体装置Aは半導体
素子収納用パッケージの絶縁基体1と蓋体2とで構成さ
れる容器3内に半導体素子4を気密に収容するとともに
該半導体素子4の各電極を容器3に取着させた外部リー
ド端子5に電気的に接続させて製作されている。
FIG. 1 shows an embodiment of a semiconductor device manufactured by the manufacturing method of the present invention. A semiconductor device A is provided in a container 3 composed of an insulating substrate 1 and a lid 2 of a package for accommodating semiconductor elements. It is manufactured by hermetically housing the semiconductor element 4 and electrically connecting the electrodes of the semiconductor element 4 to the external lead terminals 5 attached to the container 3.

【0010】前記半導体素子収納用パッケージの容器3
を構成する絶縁基体1は酸化アルミニウム質焼結体、ム
ライト質焼結体、窒化アルミニウム質焼結体、炭化珪素
質焼結体等の電気絶縁材料から成り、その上面中央部に
は半導体素子4を載置固定するための凹部1aが形成され
ており、該凹部1a底面に半導体素子4 が接着剤を介し載
置固定されている。
The container 3 of the package for storing the semiconductor element
The insulating base body 1 constituting the above is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, and a silicon carbide sintered body. A concave portion 1a for mounting and fixing the semiconductor element 4 is formed on the bottom surface of the concave portion 1a via an adhesive.

【0011】前記絶縁基体1 は例えば、酸化アルミニウ
ム質焼結体から成る場合、アルミナ(Al 2 O 3 ) 、シリ
カ(Si O 2 ) 、マグネシア(MgO) 、カルシア(CaO) 等の
原料粉末に適当な有機溶剤、溶媒を添加混合して泥漿状
となすとともにこれを従来周知のドクターブレード法を
採用することによってセラミックグリーンシート( セラ
ミック生シート) を得、しかる後、前記セラミックグリ
ーンシートに適当な打ち抜き加工法を施すとともにこれ
を複数枚積層し、高温( 約1600℃) の温度で焼成するこ
とによって製作される。
When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, it is suitable as a raw material powder of alumina (Al 2 O 3 ), silica (Si O 2 ), magnesia (MgO), calcia (CaO), or the like. A ceramic green sheet (ceramic green sheet) is obtained by adding and mixing a variety of organic solvents and solvents to form a slurry and adopting the conventionally known doctor blade method.After that, appropriate punching is performed on the ceramic green sheet. It is manufactured by applying a processing method, stacking multiple sheets, and firing at a high temperature (about 1600 ° C).

【0012】また前記絶縁基体1 は凹部1a周辺から外周
縁にかけて複数のメタライズ配線層6 が被着されてお
り、該メタライズ配線層6 の凹部1a周辺部には半導体素
子4 の各電極がボンディングワイヤ7 を介して電気的に
接続され、また絶縁基体1 の外周縁には外部リード端子
5 が銀ロウ等のロウ材を介して取着されている。
The insulating substrate 1 is covered with a plurality of metallized wiring layers 6 from the periphery of the recess 1a to the outer periphery thereof, and the electrodes of the semiconductor element 4 are bonded to the metallized wiring layer 6 around the recesses 1a by bonding wires. It is electrically connected via 7 and external lead terminals are attached to the outer peripheral edge of the insulating base 1.
5 is attached via a brazing material such as silver brazing.

【0013】前記メタライズ配線層6 はタングステン、
モリブデン、マンガン等の高融点金属粉末から成り、タ
ングステン等の高融点金属粉末に適当な有機溶剤、溶媒
を添加混合して得た金属ペーストを絶縁基体1 となるセ
ラミックグリーンシートの表面に予め従来周知のスクリ
ーン印刷法等の厚膜手法を採用し印刷塗布しておくこと
によって絶縁基体1 の凹部1a周辺から外周縁にかけて被
着される。
The metallized wiring layer 6 is made of tungsten,
A metal paste made of refractory metal powder such as molybdenum and manganese. A metal paste obtained by adding and mixing an appropriate organic solvent and solvent to refractory metal powder such as tungsten is previously known on the surface of the ceramic green sheet to be the insulating substrate 1. By applying a thick film method such as the screen printing method and printing and coating, the insulating substrate 1 is applied from the periphery of the concave portion 1a to the outer peripheral edge.

【0014】尚、前記メタライズ配線層6 はその露出す
る外表面にニッケル、金等の耐蝕性に優れ、且つ良導電
性である金属を1.0 乃至20.0μm の厚みにメッキ法によ
り層着させておけば、メタライズ配線層6 の酸化腐食を
有効に防止することができるとともにメタライズ配線層
6とボンディングイヤ7 との接続及びメタライズ配線層6
への外部リード端子5 の取着を極めて強固なものとな
すことができる。従って、メタライズ配線層6 はその露
出する外表面にニッケル、金等の耐蝕性に優れ、且つ良
導電性である金属を1.0 乃至20.0μm の厚みに層着させ
ておくことが好ましい。
The metallized wiring layer 6 may be formed by depositing a metal having excellent corrosion resistance such as nickel and gold and having good conductivity on the exposed outer surface by plating to a thickness of 1.0 to 20.0 μm. Therefore, the oxidative corrosion of the metallized wiring layer 6 can be effectively prevented and the metallized wiring layer 6 can be effectively prevented.
6 and bonding ear 7 and metallized wiring layer 6
The attachment of the external lead terminal 5 to the can be made extremely strong. Therefore, the metalized wiring layer 6 is preferably formed by depositing a metal such as nickel and gold having excellent corrosion resistance and good conductivity on the exposed outer surface to a thickness of 1.0 to 20.0 μm.

【0015】また前記メタライズ配線層6 に取着される
外部リード端子5 はコバール金属(Fe-Ni-Co 合金) や42
アロイ(Fe-Ni合金) 等の金属から成り、その一端を外部
電気回路基板の配線導体に接続することによって内部に
収容する半導体素子4 を外部電気回路に電気的に接続す
る作用を為す。
The external lead terminals 5 attached to the metallized wiring layer 6 are made of Kovar metal (Fe-Ni-Co alloy) or 42.
It is made of a metal such as an alloy (Fe-Ni alloy), and has one end connected to a wiring conductor of an external electric circuit board to electrically connect the semiconductor element 4 housed inside to an external electric circuit.

【0016】前記外部リード端子5 はその一端が外部電
気回路基板の配線導体に当接するようL字型に折り曲げ
加工されており、該外部リード端子5 の折り曲げ加工は
従来周知のプレス加工法を採用することによって行われ
ている。
The external lead terminal 5 is bent into an L shape so that one end of the external lead terminal 5 comes into contact with the wiring conductor of the external electric circuit board. The external lead terminal 5 is bent by a conventionally known press working method. Is done by doing.

【0017】尚、この場合、前記外部リード端子5 には
予めその表面に錫から成る金属層8が被着されており、
該錫から成る金属層8 によって折り曲げ加工が極めて容
易なものとなっている。
In this case, the external lead terminal 5 is preliminarily coated with a metal layer 8 made of tin on its surface.
The metal layer 8 made of tin makes the bending process extremely easy.

【0018】また前記外部リード端子5 はその表面に更
に半田9 が予め被着されており、外部リード端子5 を外
部電気回路基板の配線導体に接合させる際、その接合の
作業性を容易なものとしている。
Further, the external lead terminals 5 are further pre-deposited with solder 9 on the surface thereof, which facilitates the workability of joining the external lead terminals 5 to the wiring conductor of the external electric circuit board. I am trying.

【0019】前記絶縁基体1 はまたその上面に蓋体2 が
封止材を介して接合され、これによって絶縁基体1 と蓋
体2 とから成る容器3 の内部に半導体素子4 が気密に封
止され、半導体装置となる。
The insulating base 1 has a lid 2 bonded to the upper surface thereof via a sealing material, whereby a semiconductor element 4 is hermetically sealed inside a container 3 composed of the insulating base 1 and the lid 2. To be a semiconductor device.

【0020】前記蓋体は酸化アルミニウム質焼結体等の
電気絶縁材料やコバール金属等の金属材料からなり、樹
脂、ガラス、ロウ材等の封止材を介して絶縁基体1 の上
面に、該絶縁基体1 に設けた凹部1aを塞ぐようにして接
合される。
The lid body is made of an electrically insulating material such as an aluminum oxide sintered body or a metal material such as Kovar metal, and is provided on the upper surface of the insulating substrate 1 via a sealing material such as resin, glass, or brazing material. Bonding is performed so as to close the recess 1a provided in the insulating base 1.

【0021】次に上述の半導体装置の製造方法について
図2(a)乃至(d) に基づき説明する。
Next, a method of manufacturing the above semiconductor device will be described with reference to FIGS. 2 (a) to 2 (d).

【0022】まず図2(a)に示す如く、絶縁基体1 と蓋体
2とから成る容器3 より外部リード端子5 を外側に水平
に延出せた半導体素子収納用パッケージの内部に半導体
素子4 を気密封止するとともに該半導体素子4 の各電極
をボンディングワイヤ7 を介して外部リード端子5 の一
端に電気的に接続させ、半導体装置を準備する。
First, as shown in FIG. 2 (a), the insulating substrate 1 and the lid are
The semiconductor element 4 is hermetically sealed inside the semiconductor element housing package in which the external lead terminals 5 are horizontally extended outward from the container 3 composed of 2 and the electrodes of the semiconductor element 4 are bonded via the bonding wires 7. A semiconductor device is prepared by electrically connecting to one end of the external lead terminal 5.

【0023】前記半導体素子収納用パッケージは前述の
材料、方法によって製作され、また半導体素子収納用パ
ッケージ内部への半導体素子4 の気密封止も前述の方法
と同様の方法よって行われる。
The semiconductor element housing package is made of the materials and methods described above, and the semiconductor element 4 is hermetically sealed inside the semiconductor element housing package by the same method as described above.

【0024】次に前記半導体装置は図2(b)に示す如く、
外部リード端子5 の露出表面に錫から成る金属層8 が被
着される。
Next, the semiconductor device is, as shown in FIG.
A metal layer 8 made of tin is deposited on the exposed surface of the external lead terminal 5.

【0025】前記錫から成る金属層8 は錫自体が極めて
滑りやすい材料であるため後述する外部リード端子5 を
プレス加工法により折り曲げ加工する際、外部リード端
子5の一部がプレス加工機に引っ掛かってちぎれること
はなく、極めて容易に所定形状に折り曲げられる。
Since the metal layer 8 made of tin is a material in which tin itself is extremely slippery, when the external lead terminal 5 to be described later is bent by a press working method, a part of the external lead terminal 5 is caught by the press working machine. It does not tear and can be bent into a predetermined shape very easily.

【0026】また前記金属層8 は錫から成っており、錫
は半田と極めて馴染みがよいため外部リード端子5 に該
外部リード端子5 を外部電気回路基板の配線導体に接合
させるための半田を予め溶着させる際、外部リード端子
5 の表面には半田が均一厚みで、且つ強固に溶着する。
Since the metal layer 8 is made of tin, and tin is very well compatible with solder, the solder for joining the external lead terminal 5 to the wiring conductor of the external electric circuit board is previously prepared. External lead terminal when welding
Solder adheres to the surface of 5 with a uniform thickness and firmly.

【0027】尚、前記錫から成る金属層8 は従来周知の
メッキ方法を採用することによって外部リード端子5 の
表面に被着され、例えば、外部リード端子5 を硫酸第1
錫30.0乃至50.0グラム/ リットル、硫酸40.0乃至80.0グ
ラム/ リットル、クレゾールスルホン酸30.0乃至60.0グ
ラム/ リットル、β- ナフトール0.5 乃至1.0 グラム/
リットル等から成る錫メッキ浴中に浸漬しながら所定の
メッキ電力を所定時間印加することによって外部リード
端子5 の表面に被着される。
The metal layer 8 made of tin is deposited on the surface of the external lead terminal 5 by adopting a conventionally known plating method.
Tin 30.0 to 50.0 g / l, sulfuric acid 40.0 to 80.0 g / l, cresol sulfonic acid 30.0 to 60.0 g / l, β-naphthol 0.5 to 1.0 g / l
It is applied to the surface of the external lead terminal 5 by applying a predetermined plating power for a predetermined time while immersing it in a tin plating bath of liter or the like.

【0028】また前記錫から成る金属層8 はその層厚を
3.0 μm 以上としておくと外部リード端子5 のプレス加
工機による折り曲げ加工が極めて容易となるとともに外
部リード端子5 への半田の溶着が良好となる。従って外
部リード端子5 の表面に被着させる錫から成る金属層8
はその層厚を3.0 μm 以上としておくことが好ましい。
Further, the metal layer 8 made of tin has a layer thickness of
If it is set to 3.0 μm or more, bending of the external lead terminals 5 by a press machine becomes extremely easy and soldering to the external lead terminals 5 becomes good. Therefore, the metal layer 8 made of tin to be deposited on the surface of the external lead terminal 5
The layer thickness is preferably 3.0 μm or more.

【0029】次に前記表面に錫から成る金属層8 が被着
された外部リード端子5 は図2(c)に示す如く、プレス加
工機Pによって外部リード端子5の一端側を外部電気回
路基板の配線導体と当接し易いような形状、例えばL字
型に折り曲げられる。
Next, as shown in FIG. 2 (c), the external lead terminals 5 having the metal layer 8 made of tin deposited on the surface thereof are pressed by a press machine P so that one end side of the external lead terminals 5 is connected to the external electric circuit board. Is bent into a shape such that it easily abuts the wiring conductor, for example, an L-shape.

【0030】尚、この場合、外部リード端子5の表面に
は滑りやすい錫から成る金属層8が被着されているた
め、外部リード端子5を折り曲げ加工する際、外部リー
ド端子5の一部がプレス加工機に引っ掛かることはな
く、その結果、外部リード端子5をちぎれの発生を皆無
として所定形状に容易に折り曲げることが可能となる。
In this case, since the metal layer 8 made of tin, which is slippery, is adhered to the surface of the external lead terminal 5, when the external lead terminal 5 is bent, a part of the external lead terminal 5 is removed. It does not get caught on the press machine, and as a result, it is possible to easily bend the external lead terminal 5 into a predetermined shape with no breakage.

【0031】次に前記外部リード端子5の一端が折り曲
げ加工された半導体装置は次に、外部リード端子5の表
面に半田9 が溶着されて図2(d)に示す如く、最終製品と
しての半導体装置となる。
Next, in the semiconductor device in which one end of the external lead terminal 5 is bent, the solder 9 is welded to the surface of the external lead terminal 5 to form a semiconductor as a final product as shown in FIG. 2 (d). It becomes a device.

【0032】前記半田9 は外部リード端子5 を外部電気
回路基板の配線導体に接合させる際、その接合の作業性
を容易とするためのものであり、錫から成る金属層8 を
被着させた外部リード端子5 を溶融半田浴の中に浸漬さ
せることによって外部リード端子5 の表面に溶着され
る。この場合、外部リード端子5 の表面には半田と馴染
みがよい錫から成る金属層8 が被着されているため外部
リード端子5 の表面には半田9 が均一厚みで、且つ強固
に溶着する。
The solder 9 is for facilitating the workability of joining when the external lead terminal 5 is joined to the wiring conductor of the external electric circuit board, and the metal layer 8 made of tin is applied thereto. By immersing the external lead terminal 5 in a molten solder bath, it is welded to the surface of the external lead terminal 5. In this case, the surface of the external lead terminal 5 is covered with the metal layer 8 made of tin, which is well compatible with solder, so that the solder 9 is firmly adhered to the surface of the external lead terminal 5 with a uniform thickness.

【0033】かかる製造方法によって得られた半導体装
置は外部リード端子5 を外部電気回路基板の配線導体上
に載置当接させるとともに外部リード端子5 に予め溶着
させておいた半田9 を再溶融させ、外部リード端子5 と
配線導体とを半田接合させることによって外部電気回路
基板上に実装される。
In the semiconductor device obtained by such a manufacturing method, the external lead terminals 5 are placed on and abutted on the wiring conductor of the external electric circuit board, and the solder 9 previously welded to the external lead terminals 5 is remelted. The external lead terminal 5 and the wiring conductor are soldered and mounted on the external electric circuit board.

【0034】[0034]

【発明の効果】本発明の半導体装置の製造方法によれば
外部リード端子の表面に滑りのよい錫から成る金属層を
被着させたことから外部リード端子をプレス加工機で所
定形状に折り曲げ加工する際、外部リード端子の一部が
プレス加工機に引っ掛かってちぎれることは無く、外部
リード端子を所定形状に極めて容易に折り曲げ加工する
ことが可能となる。
According to the method of manufacturing a semiconductor device of the present invention, since the metal layer made of tin having good sliding property is deposited on the surface of the external lead terminal, the external lead terminal is bent into a predetermined shape by a press machine. In doing so, a part of the external lead terminal is not caught by the press machine and is torn, and the external lead terminal can be bent into a predetermined shape very easily.

【0035】また外部リード端子5 に半田を予め溶着さ
せる際、外部リード端子の表面に錫から成る金属層が被
着されているため半田の溶着が強固で、且つ均一厚みと
なすこともできる。
Further, when the external lead terminals 5 are pre-welded with solder, since the metal layer made of tin is deposited on the surfaces of the external lead terminals, the solder is firmly welded and can have a uniform thickness.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の製造方法によって製作される半導体装
置の一実施例を示す断面図である。
FIG. 1 is a sectional view showing an embodiment of a semiconductor device manufactured by a manufacturing method of the present invention.

【図2】(a)乃至(d)は本発明の製造方法を説明す
るための各工程毎の断面図である。
2 (a) to 2 (d) are cross-sectional views in each step for explaining the manufacturing method of the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・絶縁基体 2・・・・・蓋体 3・・・・・容器 4・・・・・半導体素子 5・・・・・外部リード端子 6・・・・・メタライズ配線層 8・・・・・錫から成る金属層 9・・・・・半田 A・・・・・半導体装置 P・・・・・プレス加工機 1 ... Insulating substrate 2 ... Lid 3 ... Container 4 ... Semiconductor element 5 ... External lead terminal 6 ... Metallized wiring layer 8・ ・ ・ ・ ・ Metal layer made of tin 9 ・ ・ ・ Solder A ・ ・ ・ Semiconductor device P ・ ・ ・ ・ ・ Press machine

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】外表面に外部リード端子が取着された容器
の内部に半導体素子を収容するとともに該半導体素子の
電極を前記外部リード端子に電気的に接続した半導体装
置を準備し、 前記半導体装置の外部リード端子表面に錫から成る金属
層を被着させ、 次に前記外部リード端子をプレス加工法により折り曲げ
加工し、 最後に前記錫の金属層を被着させた外部リード端子の表
面に半田を溶着させることを特徴とする半導体装置の製
造方法。
1. A semiconductor device in which a semiconductor element is housed inside a container having external lead terminals attached to its outer surface and electrodes of the semiconductor element are electrically connected to the external lead terminals is prepared. A metal layer made of tin is applied to the surface of the external lead terminal of the device, then the external lead terminal is bent by a press working method, and finally the surface of the external lead terminal to which the metal layer of tin is applied is applied. A method for manufacturing a semiconductor device, which comprises soldering.
JP3304526A 1991-11-20 1991-11-20 Method for manufacturing semiconductor device Expired - Fee Related JP2728584B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3304526A JP2728584B2 (en) 1991-11-20 1991-11-20 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3304526A JP2728584B2 (en) 1991-11-20 1991-11-20 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH05144987A true JPH05144987A (en) 1993-06-11
JP2728584B2 JP2728584B2 (en) 1998-03-18

Family

ID=17934077

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3304526A Expired - Fee Related JP2728584B2 (en) 1991-11-20 1991-11-20 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2728584B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63187654A (en) * 1987-01-30 1988-08-03 Furukawa Electric Co Ltd:The Lead frame for electronic component
JPS63310147A (en) * 1987-06-12 1988-12-19 Nec Kyushu Ltd Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63187654A (en) * 1987-01-30 1988-08-03 Furukawa Electric Co Ltd:The Lead frame for electronic component
JPS63310147A (en) * 1987-06-12 1988-12-19 Nec Kyushu Ltd Manufacture of semiconductor device

Also Published As

Publication number Publication date
JP2728584B2 (en) 1998-03-18

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