JPH0514447B2 - - Google Patents

Info

Publication number
JPH0514447B2
JPH0514447B2 JP56168663A JP16866381A JPH0514447B2 JP H0514447 B2 JPH0514447 B2 JP H0514447B2 JP 56168663 A JP56168663 A JP 56168663A JP 16866381 A JP16866381 A JP 16866381A JP H0514447 B2 JPH0514447 B2 JP H0514447B2
Authority
JP
Japan
Prior art keywords
output
flop
flip
terminal
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56168663A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5870625A (ja
Inventor
Yasuhei Nakama
Takashi Furuhata
Kenji Sato
Juhei Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56168663A priority Critical patent/JPS5870625A/ja
Publication of JPS5870625A publication Critical patent/JPS5870625A/ja
Publication of JPH0514447B2 publication Critical patent/JPH0514447B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/033—Monostable circuits
JP56168663A 1981-10-23 1981-10-23 単安定マルチバイブレ−タ回路 Granted JPS5870625A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56168663A JPS5870625A (ja) 1981-10-23 1981-10-23 単安定マルチバイブレ−タ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56168663A JPS5870625A (ja) 1981-10-23 1981-10-23 単安定マルチバイブレ−タ回路

Publications (2)

Publication Number Publication Date
JPS5870625A JPS5870625A (ja) 1983-04-27
JPH0514447B2 true JPH0514447B2 (enrdf_load_stackoverflow) 1993-02-25

Family

ID=15872188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56168663A Granted JPS5870625A (ja) 1981-10-23 1981-10-23 単安定マルチバイブレ−タ回路

Country Status (1)

Country Link
JP (1) JPS5870625A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2578874B2 (ja) * 1988-01-19 1997-02-05 日本電気株式会社 パルス回路
US7573393B2 (en) * 2007-02-08 2009-08-11 Allegro Microsystems, Inc. Integrated fault output/fault response delay circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5394168A (en) * 1977-01-28 1978-08-17 Matsushita Electric Ind Co Ltd Trigger pulse generator circuit

Also Published As

Publication number Publication date
JPS5870625A (ja) 1983-04-27

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