JPH05109726A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the peeling of a film of a semiconductor device having multilayered polycide structure. CONSTITUTION:A step-difference 5 is formed in an interlayer insulating film 3 by polycide 2 of a lower layer formed on a silicon substrate 1. Polycide 4 of an upper layer is stretched so as to surround the whole periphery of the step-difference 5. Since the polycide 4 is formed in such a pattern, the contraction or the like of the polycide 4 of the upper layer is prevented by the step- difference 5. Thereby the peeling of a film can be prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a polycide multilayer wiring structure.

[0002]

2. Description of the Related Art As a semiconductor device having a fine circuit pattern formed on a silicon substrate is highly integrated and highly functional,
The wiring structure is also becoming multi-layered. In addition, due to the demand for high-speed operation of devices, an increasing number of wiring layers use not polysilicon layers but polycide in which a refractory metal silicide layer such as tungsten silicide is laminated on a polysilicon layer having lower resistance. ..

3 and 4 are diagrams showing a typical conventional multi-layer wiring structure. The first-layer polycide 32 on the substrate 31 is covered with the interlayer insulating film 33.
The polycide 34 of the second layer is formed on top. The inter-layer insulation film 33 has a film thickness sufficient to secure the withstand voltage,
A step 35 is formed outside the polycide 32 of the first layer by an amount corresponding to the film thickness. Each of the polycides 32 and 34 in FIGS. 3 and 4 has a square pattern, but this is merely an example of the pattern.

[0004]

However, in the semiconductor device having the above structure, peeling of the film occurs on the polycide 34 of the second layer.

That is, as shown in FIG. 5, the polycide 34 has a structure in which a tungsten silicide layer 37 is laminated on a lower polysilicon layer 36. The polycide 34 has a fine pattern, for example, a dimension of about 1.2 μm. When formed, when heat-treated at about 760 ° C. during the preheating process during HTO deposition,
The upper tungsten silicide layer 37 is peeled off as shown in FIG. The cause is that the polycrystalline structure of the silicide progresses during the heat treatment and the stress increases, and the laminated structure is damaged particularly in the slight natural oxide film between the tungsten silicide layer 37 and the polysilicon layer 36. Can be considered. Such a second layer polycide 3
If film peeling occurs in 4, the interlayer insulating film and the like formed on the film 4 are adversely affected, and the semiconductor device is defective.

In view of the above technical problems, the present invention has an object to provide a semiconductor device having a multi-layered polycide structure in which film peeling does not occur.

[0007]

In order to achieve the above-mentioned technical objects, a semiconductor device of the present invention is a semiconductor device in which a polycide is formed on a convex portion in a lower interlayer film. The polycide is formed in a pattern including substantially all steps of the convex portion.

[0008]

By forming the polycide on the convex portion in a pattern including almost all the steps, the stepped portion is caught even when the polycide is reduced, and the polycide extends in all directions. It will be prevented in advance.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described with reference to the drawings.

In this embodiment, as shown in FIGS. 1 and 2,
A substantially square first-layer polycide 2 is formed on a silicon substrate 1. The polycide 2 has a laminated structure of a polysilicon layer 6 and a tungsten silicide layer 7.
The polycide 2 of the first layer is covered with an interlayer insulating film 3 made of a silicon oxide film. The interlayer insulating film 3 has a convex shape for covering the polycide 2 of the first layer. This interlayer insulating film 3 has a film thickness t ₃ . The step 5 of the interlayer insulating film 3 has a film thickness t on the outside of the substantially square polycide 2.
_{According to 3} , it is formed in a substantially square shape.

The polycide 4 of the second layer has a substantially square pattern, and the pattern is formed so that the step 5 is entirely contained inside. This polycide 4 also has a laminated structure of a polysilicon layer 8 and a tungsten silicide layer 9.

Here, a specific example will be described by using numbers. The polycide 2 of the first layer has a pattern having a side of about 1.2 μm, and the polycide 4 of the second layer has a side of 2.6 μm. It is a pattern of degree. Since the step 5 is outside by the film thickness t ₃ of the polycide 2 of the first layer, if the polycide 2 has a pattern of about 1.2 μm, one side has a pattern of about 1.2 + 2t ₃ .

By forming the polycide 4 of the second layer in such a multi-layer structure, the pattern of the polycide 4 includes all the steps at the ends of the protrusions. As a result, even when the tungsten silicide layer 9 of the polycide 4 of the second layer is shrunk due to the thermal stress due to the heat treatment, the step 5 of the base becomes caught,
It spreads in all directions, and peeling of the film is prevented in advance.

As a pattern for the polycide 4 to include the step 5, the size A extending outside the step 5 is
For example, the size from the polycide 2 of the first layer to the step 5 is about 2 to 3 times the size B. Since the size B is about the thickness t ₃ of the above-described interlayer insulating film 3, the thickness t
Assuming that ₃ is 0.2 μm, the size A is 0.4-0.
It becomes about 6 μm, and one side of the polycide 4 of the second layer is
1.2 μm + 0.2 × 2 μm + 0.4-0.6 × 2 μm
From the above calculation, it is sufficient to form a film having a thickness of about 2.4 to 2.8 μm.

In this embodiment, the pattern is formed in a substantially square shape, but the pattern is not limited to this, and the upper polycide may be formed in a pattern that draws a closed curve outside the underlying step. When the step itself is composed of a plurality of closed curves, it is possible to form the upper polycide in a pattern extending over the plurality of closed curves.

[0016]

In the semiconductor device of the present invention, the polycide on the convex portion is formed in a pattern including almost all the steps. Therefore, even when the polycide is reduced, the stepped portion is caught and the film peels off. It will be prevented in advance. Therefore, even with a multi-layered polycide structure, high reliability can be obtained and yield can be improved.

[Brief description of drawings]

FIG. 1 is a sectional view showing a structure of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a plan view showing a pattern of each polycide of the semiconductor device of one embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the structure of an example of a conventional semiconductor device.

FIG. 4 is a plan view showing a pattern of each polycide of an example of a conventional semiconductor device.

FIG. 5 is a cross-sectional view showing a place where polycide film peeling occurs in an example of a conventional semiconductor device.

[Explanation of symbols]

 1 ... Silicon substrate 2, 4 ... Polycide 3 ... Interlayer insulating film 5 ... Step 6,8 ... Polysilicon layer 7, 9 ... Tungsten silicide layer

Claims (1)

[Claims] 1. A semiconductor device having a convex portion on a lower interlayer film and forming polycide on the convex portion, wherein the polycide is formed in a pattern including substantially all steps of the convex portion. Semiconductor device.