JPH0492486A - Coated board for forming electronic circuit - Google Patents
Coated board for forming electronic circuitInfo
- Publication number
- JPH0492486A JPH0492486A JP20984890A JP20984890A JPH0492486A JP H0492486 A JPH0492486 A JP H0492486A JP 20984890 A JP20984890 A JP 20984890A JP 20984890 A JP20984890 A JP 20984890A JP H0492486 A JPH0492486 A JP H0492486A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- ceramic layer
- electronic circuit
- metal
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims abstract description 34
- 239000010953 base metal Substances 0.000 claims abstract description 17
- 210000003298 dental enamel Anatomy 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 22
- 238000007751 thermal spraying Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 abstract description 9
- 230000017525 heat dissipation Effects 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 5
- 239000007769 metal material Substances 0.000 abstract description 3
- 239000010935 stainless steel Substances 0.000 abstract description 3
- 229910001220 stainless steel Inorganic materials 0.000 abstract description 3
- 229910052573 porcelain Inorganic materials 0.000 abstract 3
- 230000002411 adverse Effects 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000010304 firing Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910001209 Low-carbon steel Inorganic materials 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000007750 plasma spraying Methods 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 201000003373 familial cold autoinflammatory syndrome 3 Diseases 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003980 solgel method Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Landscapes
- Insulated Metal Substrates For Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は金属表面にホーロー層を被覆した電子回路形成
用被覆基板の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to an improvement in a coated substrate for forming an electronic circuit in which a metal surface is coated with a hollow layer.
（従来の技術）
ホーロー層を被覆した電子回路形成用被覆基板は芯材が
金属であって機械的強度が大きく、アルミナ基板等に比
較して熱放散性に優れていることから、カメラのフラン
シュバルブアレイや電話器のコンタクトプレイド等に使
用されている。(Prior art) A coated substrate for electronic circuit formation coated with an enamel layer has a metal core, has high mechanical strength, and has superior heat dissipation properties compared to alumina substrates, etc., so it is used as a camera flange. Used in valve arrays, telephone contact plaids, etc.
この種の被覆基板の代表的なものは、例えば特開昭５８
−１１８１８６号公報に記載されているとおり、下地金
属の表面に非結晶質のホーロー層と結晶質のホーロー層
とを２層に被覆したものである。A typical example of this type of coated substrate is, for example, Japanese Patent Laid-Open No. 58
As described in Japanese Patent No. 118186, the surface of the base metal is coated with two layers: an amorphous enamel layer and a crystalline enamel layer.
ところがこのような従来の被覆基板は、ホーロー層の強
度を保証するためにもホーロー層にかなりの厚みが必要
であり、その分だけ熱伝導が悪化して熱放散性が低下す
るという欠点があった。また下地金属の熱膨張係数とホ
ーロー層の熱膨張係数とを合わせなくてはならず、電子
回路形成材料がホーロー層の熱膨張係数により制約を受
ける欠点があった。更に下地金属の種類もホーローを施
釉し易い低炭素鋼に限定されてしまうという欠点があっ
た。However, such conventional coated substrates require a considerable thickness of the enamel layer in order to guarantee its strength, which has the drawback of worsening heat conduction and reducing heat dissipation. Ta. In addition, it is necessary to match the thermal expansion coefficient of the base metal with that of the enamel layer, and there is a drawback that the electronic circuit forming material is limited by the thermal expansion coefficient of the enamel layer. Furthermore, there is a drawback that the type of base metal is limited to low carbon steel, which is easy to glaze with enamel.
（発明が解決しようとする課題）
本発明は上記したような従来の問題点を解消して、ホー
ロー層を被覆した被覆基板でありながら、熱放散性が極
めて良好であり、電子回路形成材料や下地金属の種類の
制約の少ない電子回路形成用被覆基板を提供するために
完成されたものである。(Problems to be Solved by the Invention) The present invention solves the above-mentioned conventional problems, and although it is a coated substrate coated with an enamel layer, it has extremely good heat dissipation properties, and can be used as an electronic circuit forming material. This was completed in order to provide a coated substrate for forming electronic circuits with fewer restrictions on the type of underlying metal.
（課題を解決するための手段）
上記の課題を解決するためになされた本発明は、下地金
属の表面にセラミック層を形成し、更にその上面にセラ
ミック層よりも肉薄のホーロー層を形成したことを特徴
とする電子回路形成用被覆基板を要旨とするものである
。(Means for Solving the Problems) The present invention, which has been made to solve the above problems, includes forming a ceramic layer on the surface of a base metal, and further forming an enamel layer thinner than the ceramic layer on the top surface of the ceramic layer. The gist of the present invention is a coated substrate for forming an electronic circuit, which is characterized by:
本発明においては、下地金属の表面に直接ホーロー層を
形成するのではなく、まずセラミ・ンク層を形成する。In the present invention, instead of forming a hollow layer directly on the surface of the underlying metal, a ceramic ink layer is first formed.
このセラミック層はプラズマ溶射、ゾルゲル法２．セラ
ミックメツキ、スパッタリング、イオンブレーティング
等の手法により形成されるもので、任意のセラミックが
使用できる０例えばプラズマ溶射により形成されたセラ
ミ・ンク層はセラミックの融点以上の高温で下地金属の
表面にたたき付けられて強固な密着力を得ることができ
る。This ceramic layer can be manufactured by plasma spraying, sol-gel method 2. It is formed by methods such as ceramic plating, sputtering, and ion blasting, and any ceramic can be used. For example, a ceramic layer formed by plasma spraying is pounded onto the surface of the underlying metal at a high temperature above the melting point of the ceramic. Can be attached to provide strong adhesion.
このようなセラミック層の厚みは１０〜３５０ μｍと
することが好ましい。これは下地金属の表面を完全に覆
うためには１０μｍ以上が必要であり、また３５０ μ
ｍを越えると密着性が低下するとともに熱伝導率が低下
するためである。The thickness of such a ceramic layer is preferably 10 to 350 μm. This requires a thickness of 10μm or more to completely cover the surface of the base metal, and a thickness of 350μm or more is required to completely cover the surface of the base metal.
This is because if it exceeds m, the adhesion will decrease and the thermal conductivity will also decrease.
このようにして形成されたセラミック層の上面に、セラ
ミック層よりも肉薄のホーロー層が形成される。ホーロ
ー層はホーロー釉薬を施釉、焼成する常法により形成さ
れる。ホーロー層を施釉、焼成することによりセラミッ
ク層の表面が平滑化されるとともに、セラミック層のポ
ーラスな部分が封孔される。このホーロー層の厚みはセ
ラミック層よりも肉薄の１０〜１００ μ熱程度とす
る。１０μｍ未満ではセラミック層の表面からの影響を
なくしてホーロー層の表面を平滑化することが困難であ
り、１００ μｍを越すと熱伝導率が低下して本発明の
目的を達成することができない。A hollow layer thinner than the ceramic layer is formed on the upper surface of the ceramic layer thus formed. The enamel layer is formed by a conventional method of applying and firing an enamel glaze. By glazing and firing the enamel layer, the surface of the ceramic layer is smoothed and the porous portions of the ceramic layer are sealed. The thickness of this enamel layer is about 10 to 100 μm, which is thinner than the ceramic layer. If it is less than 10 μm, it is difficult to eliminate the influence from the surface of the ceramic layer and smooth the surface of the enamel layer, and if it exceeds 100 μm, the thermal conductivity decreases and the object of the present invention cannot be achieved.
（作用）
このように構成された本発明の電子回路形成用被覆基板
は、熱伝導性の悪いホーロー層を従来のホーロー被覆基
板よりも肉薄化したので、電子回路より発生した熱は速
やかにセラミック層に到達し、更に下地金属より放散さ
れる。またセラミック層が下地金属の持つ大きい熱膨張
係数とホーロー層の熱膨張係数とに対するバッファー効
果を発揮するので、ホーロー層の熱膨張係数を電子回路
の熱膨張係数にマツチングさせて自由に決定することが
できる。従ってホーロー層に残留歪み等の影響がでるこ
とがなく、電子回路の熱的特性に悪い影響が生ずること
が避けられるので、信較性の高い電子回路を形成するこ
とができる。このほか、本発明においては下地金属の表
面に直接ホーロー層を形成しないので、下地金属の材質
が従来のホーロー用鋼板のような低炭素鋼に限定されず
、ステンレススチールのような他の金属材料を使用する
ことも可能となる。(Function) In the coated substrate for electronic circuit formation of the present invention configured as described above, the enamel layer with poor thermal conductivity is made thinner than that of the conventional enamel coated substrate, so the heat generated from the electronic circuit is quickly transferred to the ceramic substrate. It reaches the layer and is further dissipated from the underlying metal. Furthermore, since the ceramic layer exhibits a buffer effect between the large thermal expansion coefficient of the underlying metal and the thermal expansion coefficient of the enamel layer, it is possible to freely determine the thermal expansion coefficient of the enamel layer by matching it to the thermal expansion coefficient of the electronic circuit. I can do it. Therefore, the enamel layer is not affected by residual strain or the like, and a negative effect on the thermal characteristics of the electronic circuit can be avoided, making it possible to form a highly reliable electronic circuit. In addition, in the present invention, since the enamel layer is not directly formed on the surface of the base metal, the material of the base metal is not limited to low carbon steel such as conventional steel plates for enamel, but may be other metal materials such as stainless steel. It is also possible to use
次に本発明の実施例を示す。Next, examples of the present invention will be shown.
（実施例）
厚さが１ｍのステンレススチール（ＳＯ５−３０４）の
板を、７５ｍ Ｘ ７５閣の寸法に切断して下地金属（
１）とした。その表面にＮｉ−５％ＡＩをアンダーコー
トしたうえ、アルミナ粉末を大気中でプラズマ溶射して
セラミック層（２）を形成した。セラミック層（２）の
厚みはアンダーコート膜とプラズマ溶射膜とを合わせて
７０μｍ、その気孔率は１２％、その表面粗さはＲ、ｌ
ＡＸ ＝２１μｍであった。(Example) A stainless steel (SO5-304) plate with a thickness of 1 m was cut into a size of 75 m x 75 m and the base metal (
1). The surface was undercoated with Ni-5% AI, and alumina powder was plasma sprayed in the atmosphere to form a ceramic layer (2). The thickness of the ceramic layer (2) is 70 μm including the undercoat film and the plasma sprayed film, its porosity is 12%, and its surface roughness is R, l.
AX = 21 μm.
次にＳｉ０□４０％（重量％、以下間し）、Ａ１□０゜
８％、Ｋ！０２％、ＢａＯ２５％、Ｃａ０９％、Ｍｇ０
３％、Ｚｎ０５％、ＰｂＯ３％、ＢｚＣｈ ５％（熱膨
張係数−６５／’Ｃ，Ｔｇ −６８０°Ｃ，Ｔｄ ＝７
３０°Ｃ）の組成を持つホーロー粉末をビヒクルと混合
してペースト化し、２００ メツシュの版を使用して前
記のセラミック層（２）上に２回印刷し、８５０°Ｃ×
３０分の焼成を行った。このようにして得られたホーロ
ー層（３）の焼成後の厚みはセラミック層（２）の厚み
の半分以下の３０μｍであった。Next, Si0□40% (weight%, below), A1□0°8%, K! 02%, BaO25%, Ca09%, Mg0
3%, Zn05%, PbO3%, BzCh 5% (thermal expansion coefficient -65/'C, Tg -680°C, Td = 7
Enamel powder with a composition of
Firing was performed for 30 minutes. The thickness of the thus obtained enamel layer (3) after firing was 30 μm, which was less than half the thickness of the ceramic layer (2).
得られた実施例の電子回路形成用被覆基板の絶縁耐力を
測定したところ３５００Ｖ／１００ μｍであり、従来
のこの種のホーロー被覆基板の絶縁耐力が１０００９／
１００ μｍであったのに比較して極めて優れた値を示
した。これは実施例の電子回路形成用被覆基板の熱放散
性が良好であり、かつ下地金属（１）に対するホーロー
層（３）およびセラミック層（２）の密着強度が大きい
ことを意味するものである。The dielectric strength of the coated substrate for electronic circuit formation of the obtained example was measured and found to be 3500 V/100 μm, and the dielectric strength of the conventional enamel coated substrate of this type was 10009 V/100 μm.
It showed an extremely superior value compared to the previous value of 100 μm. This means that the coated substrate for electronic circuit formation of the example has good heat dissipation properties, and the adhesion strength of the enamel layer (3) and the ceramic layer (2) to the base metal (1) is high. .
（発明の効果）
以上に説明したように、本発明の電子回路形成用被覆基
板は下地金属の表面にセラミック層を形成し、更にその
上面にセラミック層よりも肉薄のホーロー層を形成した
ものであるから、熱伝導率の小さいホーロー層を従来の
ものよりも肉薄化することができ、熱放散性を極めて良
好なものとすることができる。また本発明の電子回路形
成用被覆基板はセラミック層がバッファー効果を発揮す
るので、従来のホーロー被覆基板とは異なり、ホーロー
層の熱膨脹係数を電子回路の熱膨脹係数にマツチングさ
せて自由に決定することができ、信較性の高い電子回路
を形成することができる。このほか本発明においては下
地金属の表面に直接ホーロー層を形成しないので、下地
金属として他の金属材料を使用することも可能となる。(Effects of the Invention) As explained above, the coated substrate for forming electronic circuits of the present invention has a ceramic layer formed on the surface of the base metal, and a hollow layer thinner than the ceramic layer formed on the top surface. Because of this, the hollow layer with low thermal conductivity can be made thinner than conventional ones, and the heat dissipation properties can be made extremely good. Furthermore, since the ceramic layer of the coated substrate for electronic circuit formation of the present invention exhibits a buffer effect, unlike conventional enamel coated substrates, the coefficient of thermal expansion of the enamel layer can be freely determined by matching the coefficient of thermal expansion of the electronic circuit. It is possible to form highly reliable electronic circuits. In addition, in the present invention, since a hollow layer is not directly formed on the surface of the base metal, it is also possible to use other metal materials as the base metal.
よって本発明は従来の問題点を解消した電子回路形成用
被覆基板として、産業の発展に寄与するところは極めて
大きいものがある。Therefore, the present invention greatly contributes to the development of industry as a coated substrate for forming electronic circuits that solves the problems of the prior art.
図面は本発明の実施例の電子回路形成用被覆基板の部分
断面図である。
（］）：下地金属、（２）：セラミック層、（３）：ホ
ーロー層。The drawing is a partial sectional view of a coated substrate for forming an electronic circuit according to an embodiment of the present invention. (]): Base metal, (2): Ceramic layer, (3): Enamel layer.
Claims (1)
し、更にその上面にセラミック層（２）よりも肉薄のホ
ーロー層（３）を形成したことを特徴とする電子回路形
成用被覆基板。 ２、セラミック層（２）の厚みを３５０μｍ以下、ホー
ロー層（３）の厚みを１００μｍ以下とした請求項１記
載の電子回路形成用被覆基板。 ３、セラミック層（２）を溶射により形成した請求項１
記載の電子回路形成用被覆基板。[Claims] 1. A ceramic layer (2) is formed on the surface of the base metal (1), and an enamel layer (3) thinner than the ceramic layer (2) is further formed on the upper surface of the ceramic layer (2). A coated substrate for forming electronic circuits. 2. The coated substrate for forming an electronic circuit according to claim 1, wherein the ceramic layer (2) has a thickness of 350 μm or less, and the enamel layer (3) has a thickness of 100 μm or less. 3. Claim 1, wherein the ceramic layer (2) is formed by thermal spraying.
The coated substrate for forming an electronic circuit as described above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20984890A JPH0492486A (en) | 1990-08-07 | 1990-08-07 | Coated board for forming electronic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20984890A JPH0492486A (en) | 1990-08-07 | 1990-08-07 | Coated board for forming electronic circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0492486A true JPH0492486A (en) | 1992-03-25 |
Family
ID=16579628
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20984890A Pending JPH0492486A (en) | 1990-08-07 | 1990-08-07 | Coated board for forming electronic circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0492486A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58118186A (en) * | 1982-01-05 | 1983-07-14 | 株式会社東芝 | Crystalline porcelain board |
| JPS58181868A (en) * | 1982-04-16 | 1983-10-24 | Toshiba Corp | Crystallized enamel base plate |
-
1990
- 1990-08-07 JP JP20984890A patent/JPH0492486A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58118186A (en) * | 1982-01-05 | 1983-07-14 | 株式会社東芝 | Crystalline porcelain board |
| JPS58181868A (en) * | 1982-04-16 | 1983-10-24 | Toshiba Corp | Crystallized enamel base plate |
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