JPS6221247A - Electrically insulating substrate for semiconductor device - Google Patents

Electrically insulating substrate for semiconductor device

Info

Publication number
JPS6221247A
JPS6221247A JP15962185A JP15962185A JPS6221247A JP S6221247 A JPS6221247 A JP S6221247A JP 15962185 A JP15962185 A JP 15962185A JP 15962185 A JP15962185 A JP 15962185A JP S6221247 A JPS6221247 A JP S6221247A
Authority
JP
Japan
Prior art keywords
heat resistance
mgo
semiconductor device
electrically insulating
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15962185A
Other languages
Japanese (ja)
Inventor
Kensaku Motoki
健作 元木
Akira Otsuka
昭 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP15962185A priority Critical patent/JPS6221247A/en
Publication of JPS6221247A publication Critical patent/JPS6221247A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve the heat resistance of an insulating substrate by forming an insulating layer containing a specific inorganic oxide on a metal plate by means of a physical vapor phase evaporation method. CONSTITUTION:An insulating layer containing more than one kind of Al2O3, SiO2, Ta2O5, TiO2, ZrO2 and Y2O3 and 5-95wt% MgO is formed on a metal plate by means of a physical vapor phase evaporation method, e.g, the ion implating method. And this insulating layer is vapor-deposited to a thickness of 0.5-20mum under the vacuum condition not greater than 10<-4>Torr. With this structure, the heat dissipation becomes better since a thin insulating layer is formed on a metal plate, and the heat resistance improves since MgO is contained.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体装置用絶縁基板に関する。更に詳しくい
えば、良好な放熱性および絶縁性と共に高耐熱性を有す
る、電気絶縁性被覆と金属基板との二層構造の半導体装
置用絶縁基板に係る。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an insulating substrate for semiconductor devices. More specifically, the present invention relates to an insulating substrate for a semiconductor device having a two-layer structure of an electrically insulating coating and a metal substrate, which has good heat dissipation and insulation properties as well as high heat resistance.

従来の技術 半導体装置、これらを利用する装置、機器にあっては半
導体素子等の能動素子並びに抵抗器類、コイル類等の受
動素子における発熱のために複雑な熱系を構成する。し
かしながら、一般に半導体素子にはその特性上並びに信
頼性の観点から最高許容温度があり、また雑音余裕など
の点からも素子内あるいは素子間の温度差にも許容範囲
が存在する。
BACKGROUND OF THE INVENTION Semiconductor devices and apparatuses and equipment using these devices have complex thermal systems due to heat generation in active elements such as semiconductor elements and passive elements such as resistors and coils. However, semiconductor devices generally have a maximum permissible temperature from the viewpoint of their characteristics and reliability, and also a permissible range of temperature differences within the device or between devices from the standpoint of noise margin.

そこで、これら素子等が安定かつ高信頼度で動作するた
めには、最良の熱設計をする必要がある。
Therefore, in order for these elements to operate stably and with high reliability, it is necessary to have the best thermal design.

更に、近年コンビエータの小型化、高性や化に象徴され
るように、半導体素子の作製技術は飛躍的な発展を遂げ
ている。該半導体素子の高速動作化、高集積化、並びに
それに伴う配線の高密度化が進み、それに応じて発熱量
の増大を招き、これに対する対応策の開発が必要となっ
ている。即ち、半導体素子等の発する人世の熱を放出す
るために、良好な放熱性を有する優れた半導体装置用パ
ッケージ、回路基板が必須のものとなってきている。
Furthermore, in recent years, the technology for manufacturing semiconductor devices has made dramatic progress, as exemplified by the miniaturization and increased performance of combinators. As the speed of operation and the degree of integration of semiconductor devices have increased, and the density of wiring has increased accordingly, the amount of heat generated has increased accordingly, and it is necessary to develop countermeasures for this. That is, in order to dissipate the heat generated by semiconductor elements and the like, excellent semiconductor device packages and circuit boards that have good heat dissipation properties are becoming essential.

従来の半導体素子搭載用の電気絶縁性基板としては、A
1□03製のものが主とて用いられてきたが、このAl
2O3は必ずしも熱伝導性の点で満足できるものとはい
えない。
As a conventional electrically insulating substrate for mounting semiconductor elements, A
1□03 has been mainly used, but this Al
2O3 cannot necessarily be said to be satisfactory in terms of thermal conductivity.

このほかに熱伝導性の良好なりe○の利用も知られてい
るが、このものは有毒である上に高価であり、また供給
量にも制限があるなどの問題点を有しており、あまり使
用されていない。
In addition, the use of e○, which has good thermal conductivity, is also known, but this material has problems such as being toxic and expensive, and there is a limit to the amount of supply. Not used much.

これに対してCu −WSCu−Mo、 Cu −W−
Moなどの粉末焼結体またはW、Moの他各種Cu合金
やNi合金は、高熱伝導性金属であるが、導電性の金属
、合金であるために、半導体装置用パケージや回路基板
等の半導体装置用基板として用いる場合には制約が多く
、電気絶縁性の被覆層をその表面に設けることにより電
気絶縁性を付与することが必要である。即ち、半導体装
置用基板については同時に高い電気絶縁性と高い放熱性
とを有することが要求されることになり、このような2
つの要求を同時に満たすものが、半導体素子の高速化、
高集積化に伴う発熱量の増大に十分対処し得るものとい
える。
On the other hand, Cu -WSCu-Mo, Cu -W-
Powder sintered bodies such as Mo, W, Mo, and various Cu alloys and Ni alloys are highly thermally conductive metals, but because they are conductive metals and alloys, they are used in semiconductors such as packages for semiconductor devices and circuit boards. When used as a device substrate, there are many restrictions, and it is necessary to provide electrical insulation by providing an electrically insulating coating layer on the surface. In other words, substrates for semiconductor devices are required to have high electrical insulation and high heat dissipation properties at the same time.
A device that simultaneously satisfies these two requirements is to increase the speed of semiconductor devices,
This can be said to be sufficient to cope with the increase in heat generated due to higher integration.

そこで、導電性ではあるが、高い熱伝導性を有する金属
基板に、良好な熱伝導性を有し、かつ電気絶縁性の点で
も満足し得るセラミックス材料を被覆した積層構造の半
導体装置用基板が提案されている。ここでセラミックス
材料としては金属との密着性が良好で、膜質が緻密なも
のである必要があり、また被覆法としてはPVD法また
はCVD法が有利であるとされている。
Therefore, a semiconductor device substrate with a laminated structure is created, in which a metal substrate that is electrically conductive but has high thermal conductivity is coated with a ceramic material that has good thermal conductivity and is also satisfactory in terms of electrical insulation. Proposed. Here, the ceramic material must have good adhesion to the metal and have a dense film quality, and it is said that the PVD method or CVD method is advantageous as the coating method.

更に、半導体装置搭載用基板は、該装置のパッケージン
グや回路基板の組立て時並びに実装時に、500℃〜9
00℃というかなり高い温度条件下におかれることが多
く、従って半導体装置用基板にはこのような高温度にも
耐え得る耐熱性を付与することが必要となる。
Furthermore, the substrate for mounting a semiconductor device is heated to a temperature of 500°C to 90°C during packaging of the device, assembly and mounting of the circuit board.
Semiconductor device substrates are often subjected to fairly high temperature conditions of 00° C., so it is necessary to provide semiconductor device substrates with heat resistance that can withstand such high temperatures.

発明が解決しようとする問題点 以上述べたように、最近の半導体装置については高速化
、高密度化の大ぎな指向がみられ、これに伴って発熱量
の増大の問題が新たに出現した。
Problems to be Solved by the Invention As described above, there has been a recent trend toward higher speed and higher density in semiconductor devices, and with this, a new problem of increased heat generation has emerged.

この問題は半導体装置の設計、製作において、素子の高
速化、高密度化と並行して解決しなければならない重要
な課題である。そこで、特に半導体装置用基板について
は高い電気絶縁性と高い放熱性とを併せ持つことが要求
されるようになってきている。
This problem is an important issue that must be solved in the design and manufacture of semiconductor devices in parallel with increasing the speed and density of devices. Therefore, substrates for semiconductor devices in particular are required to have both high electrical insulation and high heat dissipation properties.

更に、基板は半導体装置のパッケージング、組立てなど
における高温に対し耐え得るものである必要があるが、
従来提案された金属板とその上に°被覆された無機絶縁
膜とで構成される基板の耐熱温度はせいぜい300〜4
00℃程度であり、要求される耐熱性を得ることは困難
であった。
Furthermore, the substrate must be able to withstand high temperatures during packaging and assembly of semiconductor devices.
The heat resistance temperature of the conventionally proposed substrate consisting of a metal plate and an inorganic insulating film coated on the metal plate is at most 300-400℃.
00°C, and it was difficult to obtain the required heat resistance.

このような各種の要求を満たすと共に、実用上の高い信
頼性をも達成できる半導体装置用基板を開発することは
、高速化、高密度実装化の図られた半導体素子の安定性
並びに信頼性を確保する上で極めて重要である。
Developing a substrate for semiconductor devices that can meet these various demands and also achieve high reliability in practical use will improve the stability and reliability of semiconductor devices that are designed for high-speed, high-density packaging. It is extremely important to ensure that

そこで、本発明の目的は半導体素子・装置の発する熱を
効率よく放出でき、高温での十分な耐熱性を有し、しか
も必要な絶縁耐圧を保証する良好な電気絶縁性を有する
と共に実用上の高信頼度をも与える半導体装置搭載用基
板を提供することにある。
Therefore, an object of the present invention is to efficiently dissipate the heat generated by semiconductor elements and devices, have sufficient heat resistance at high temperatures, and have good electrical insulation properties that guarantee the necessary dielectric strength voltage. An object of the present invention is to provide a substrate for mounting a semiconductor device that also provides high reliability.

問題点を解決するための手段 本発明者等は、従来の金属と無機絶縁体との積層構造を
有する基板の耐熱性が低いという問題が、残留ガスに含
まれる水分が被覆層形成操作中に該被覆層内に混入する
ことに起因するものであることを知り、またこの問題が
真空中の残留ガスを低減することにより解決でき、更に
電気絶縁性被覆層中にMgOを所定里で含有させること
により解決できることを見出し、本発明を完成した。
Means for Solving the Problems The present inventors have discovered that the problem of low heat resistance of conventional substrates having a laminated structure of metal and inorganic insulators is caused by moisture contained in residual gas being released during the coating layer forming operation. We have learned that this problem is caused by MgO being mixed into the coating layer, and that this problem can be solved by reducing the residual gas in the vacuum, and furthermore, by incorporating MgO in a predetermined amount in the electrically insulating coating layer. The present invention was completed based on the discovery that the problem could be solved by the following.

1!11 チ、本発明の半導体装置用型気絶、縁性基板
は、金属板と、咳金、基板」二に物理的気相蒸着法によ
り設けられた、5〜95重量%のMgOを含むAl2O
:l、5102、Ta2O,、TlO2、ZrO2およ
びY 203からなる群から選ばれる少なくとも1種の
絶縁性無機酸化物からなる被覆層とで構成されることを
特徴とする。
1!11 H. The insulating substrate for a semiconductor device of the present invention includes a metal plate, a metal plate, and a substrate, and contains 5 to 95% by weight of MgO, which is provided by a physical vapor deposition method. Al2O
:l, 5102, Ta2O, TlO2, ZrO2 and Y203.

本発明の電気絶縁性基板において、金属板としてはそれ
自体高熱伝導性を有する材料から選ぶ必要があり、今後
の需要の拡大が予想される消費電力IW以上の半導体素
子を搭載した場合にも、充分な放熱性を確保するために
は熱伝導率0.2Cal/cm −sec、・℃以上を
有する材料を用いることが好ましい。このような要件を
満たすものとして、Cu−W 、 Cu−Mo、、Cu
 −W−Moなどの合金または粉末焼結体がある。その
他Fe  Ni合金、Ni合金、5fJS板、Mo、W
などの金属板などを使用することも勿論可能である。
In the electrically insulating substrate of the present invention, the metal plate itself must be selected from materials that have high thermal conductivity. In order to ensure sufficient heat dissipation, it is preferable to use a material having a thermal conductivity of 0.2 Cal/cm -sec, .degree. C. or higher. Cu-W, Cu-Mo, Cu
- There are alloys such as W-Mo or powder sintered bodies. Others Fe Ni alloy, Ni alloy, 5fJS plate, Mo, W
Of course, it is also possible to use a metal plate such as.

本発明の半導体装置用電気絶縁性基板は以下のようにし
て得ることができる。即ち、金属板上に、1υ−”I’
orr以下の真空条件下で物理的気相蒸着法(PVD法
)、例えば電子ビーム蒸着法、イオンブレーティング法
、ス)X&フッタング法等に従い、絶縁物原料を堆積す
ることにより形成できる。この際\ 八l 20 ]、
 S Io 2、Ta2O3、TlO2、ZrO2、Y
2O3等の無機酸化物もしくはその混合物の被覆層中に
1Ag○を含有させる方法としては、lJg○のみの供
給源とそれ以外の成分の供給源との2元からの同時供給
により被覆形成するか、あるいは1.1g○とそれ以外
の成分との混合物からなる単一の供給源により被膜形成
する2つの方法が考えられ、いずれも好ましい結果を与
えてくれる。
The electrically insulating substrate for semiconductor devices of the present invention can be obtained as follows. That is, on the metal plate, 1υ−”I'
It can be formed by depositing an insulating material raw material under a vacuum condition of less than orr or more according to a physical vapor deposition method (PVD method), for example, an electron beam evaporation method, an ion blating method, a) X&Fettang method, or the like. At this time \ 8l 20 ],
S Io2, Ta2O3, TlO2, ZrO2, Y
As a method for incorporating 1Ag○ into the coating layer of an inorganic oxide such as 2O3 or a mixture thereof, the coating may be formed by simultaneous supply from two sources: a source of only 1Jg○ and a source of other components. There are two possible methods of forming a film using a single source consisting of a mixture of 1.1g or 1.1g○ and other components, both of which give favorable results.

尚、必要に応じて金属板の全面もしくはその一部のみに
選択的に絶縁膜を形成することができ、また被覆層は結
晶状態、非晶質状態のいずれであっても良い。
It should be noted that an insulating film can be selectively formed on the entire surface of the metal plate or only on a part thereof, if necessary, and the coating layer may be in either a crystalline state or an amorphous state.

〕涯 最近の高速化、高集積化の図られた半導体装置用として
十分に実用化し得る基板に対しては、高い放熱性と、高
い電気絶縁性と、良好な高温耐熱性とが必要とされる。
] High heat dissipation, high electrical insulation, and good high-temperature heat resistance are required for substrates that can be fully put into practical use for semiconductor devices that have recently become faster and more integrated. Ru.

本発明の基板においては、良好な熱伝導性を有する金属
板と、高い絶縁性並びに熱伝導性を有する上記無機酸化
物とを組合せて用いたことに基き、放熱性および電気絶
縁性に係る要件は十分に満足される。一方、高温耐熱性
については、電気絶縁性被覆層中に所定量のMhoを配
合することにより達成することができる。
In the substrate of the present invention, requirements regarding heat dissipation and electrical insulation are met based on the combination of a metal plate having good thermal conductivity and the above-mentioned inorganic oxide having high insulation and thermal conductivity. is fully satisfied. On the other hand, high-temperature heat resistance can be achieved by incorporating a predetermined amount of Mho into the electrically insulating coating layer.

即ち、従来のこの種の基板が十分な耐熱性を達成し得な
かった理由は、電気絶縁物質の被覆形成操作中に、真空
系内の残留ガス中に含まれるH2Cが生成する絶縁膜中
に比較的多量に混入し、そのため基板を高温条件下に置
いた際に被覆層中の820が放出され、同時に被覆層の
体積収縮を生じ、割れを生じるものであることが、本発
明者等の研究により明らかとなった。この割れは、更に
その間隙を通して下地金属の酸化を生ずる恐れがあり、
この意味からも十分な耐熱性が得られず、ひいては基板
の信頼性も損れることになる。このようにF(20を含
んだ被覆層の内部応力は引張応力である。
In other words, the reason why conventional substrates of this type could not achieve sufficient heat resistance is that during the operation of forming a coating with an electrically insulating material, H2C contained in the residual gas in the vacuum system is generated in the insulating film. The inventors have discovered that 820 is mixed in a relatively large amount, and therefore, when the substrate is placed under high temperature conditions, 820 in the coating layer is released, and at the same time, the coating layer shrinks in volume and cracks occur. This has been revealed through research. This crack may further cause oxidation of the underlying metal through the gap.
In this sense, sufficient heat resistance cannot be obtained, and the reliability of the substrate is also impaired. In this way, the internal stress of the coating layer containing F(20) is tensile stress.

ところで、基板の耐熱性を改善する手段としては、以下
のような2つの方法が考えられる。即ち、その1つは被
覆層形成時の真空系中の残留ガス量をできるだけ減じる
ことにより、被覆層中に混入するH2Cの債を減らすこ
とであり、もう1つの方法は、電気絶縁外層用材料とし
て)、)g○を使用することである。
By the way, as means for improving the heat resistance of the substrate, the following two methods can be considered. That is, one method is to reduce the amount of H2C mixed into the coating layer by reducing as much as possible the amount of residual gas in the vacuum system when forming the coating layer, and the other method is to reduce the amount of H2C mixed into the coating layer. ), )g○ is used.

MgOを絶縁膜材料として使用する場合、H20分圧の
高い真空系における被覆操作によっても、膜中へのH2
0混人造は極わずかであり、得られる層の内部応力も圧
縮応力となる。しかしながら、MgOのみの被覆層では
達成し得る耐熱性は高くとも600℃程度であり、まだ
充分とはいい難い。
When MgO is used as an insulating film material, even if the coating operation is performed in a vacuum system with a high H20 partial pressure, H2 will not enter the film.
The amount of zero-mixed artifacts is extremely small, and the internal stress of the resulting layer is also compressive stress. However, the heat resistance that can be achieved with a coating layer made only of MgO is about 600° C. at most, which is still not sufficient.

ところが、MgOを5〜95重量%含有するA1.03
、Si O2、Ta2O:+、TlO2、Z「02、Y
2O3あるいはこれらの混合物で形成された電気絶縁膜
を用いた場合には、耐熱性が大巾に改善されることがわ
かった。このような高い耐熱性は該絶縁膜を10−4T
orr程度の高い残留ガス圧下で被覆した場合にも同様
に達成できる。この場合、被覆層中に少量の820を含
有しているにも拘ず、得られる被覆膜は800t−以上
の高い耐熱性を示し、内部応力も圧縮応力であることが
わかっている。
However, A1.03 containing 5 to 95% by weight of MgO
, SiO2, Ta2O:+, TlO2, Z'02, Y
It has been found that heat resistance is greatly improved when an electrical insulating film made of 2O3 or a mixture thereof is used. Such high heat resistance makes the insulating film 10-4T
The same effect can be achieved even when the coating is performed under a high residual gas pressure of about 0.05 to 10.0 m. In this case, even though the coating layer contains a small amount of 820, the resulting coating film exhibits high heat resistance of 800 t- or more, and the internal stress is also known to be compressive stress.

本発明において・ 800℃以上の高温に対する十分な
耐熱性を半導体搭載用基板に付与しようとする場合には
、MgOの被覆層中における含有量は5〜95重量%の
範囲内とする必要がある。即ち、下限の5%に満たない
場合にはAI□Ot、5102、Ta2C1+T 10
2.1rO2、Y2O3等のMgO以外の成分の特性が
強く現れ、目的とする十分な耐熱性を確保できず、一方
上限の95重量%を越えて使用した場合にはMgO単体
の被覆層としての特性が強く現れてしまい、同様に十分
な耐熱性を確保できないのでいずれも好ましくない。
In the present invention, when it is intended to provide a semiconductor mounting substrate with sufficient heat resistance against high temperatures of 800°C or higher, the content of MgO in the coating layer must be within the range of 5 to 95% by weight. . That is, if it is less than the lower limit of 5%, AI□Ot, 5102, Ta2C1+T 10
2.1 The characteristics of components other than MgO such as rO2 and Y2O3 appear strongly, making it impossible to secure the desired sufficient heat resistance.On the other hand, when used in excess of the upper limit of 95% by weight, MgO cannot be used as a single coating layer. Both are unfavorable because the characteristics are strongly expressed and sufficient heat resistance cannot be ensured.

更に、目的とする耐熱性を備えた電気絶縁基板を得るた
めには、特に基板上への絶縁膜の形成は、上記のように
10−4Torr以下の真空条件下でのPVD法により
実施することが必須であり、これによって特に顕著な効
果を期待することができる。
Furthermore, in order to obtain an electrically insulating substrate with the desired heat resistance, the formation of an insulating film on the substrate must be performed by the PVD method under vacuum conditions of 10-4 Torr or less as described above. is essential, and a particularly significant effect can be expected from this.

以上のべたことから、本発明の基1反の高温耐熱性はM
gOとその他のA I 203.8102等の成分との
相乗効果の結果として得られる特性である。
From the above, the high temperature heat resistance of the base 1 roll of the present invention is M
These properties are the result of a synergistic effect between gO and other components such as A I 203.8102.

また、電気絶縁性被覆層の厚さは0.5〜20μmの範
囲内とする必要がある。即ち、上限の20μmを越える
厚さで絶縁層を設けた場合には、この被覆層自体の内部
応力のために被覆層に割れが生ずる恐れがあり、また下
限の0.5μmに満たない場合に、は十分な絶縁耐圧を
確保することができず、半導体装置用基板として十分な
信頼性を保証できなくなる。
Further, the thickness of the electrically insulating coating layer needs to be within the range of 0.5 to 20 μm. In other words, if the insulating layer is provided with a thickness exceeding the upper limit of 20 μm, there is a risk that cracks may occur in the coating layer due to the internal stress of the coating layer itself, and if the thickness is less than the lower limit of 0.5 μm, , cannot ensure sufficient dielectric strength, and cannot guarantee sufficient reliability as a substrate for a semiconductor device.

実施例 以下作製例により本発明の半導体装置用電気絶縁基板を
更に具体的に説明すると共に、その奏する効果を実証す
る。ただし、以下の例は単なる例示であり、本発明の範
囲を何等制限するものではない。
EXAMPLES The electrical insulating substrate for a semiconductor device of the present invention will be explained in more detail by the following production examples, and the effects thereof will be demonstrated. However, the following examples are merely illustrative and do not limit the scope of the present invention in any way.

作製例 イオンブレーティング法を用いて、42重箪%Ni−P
e合金板上に、夫々Al2O3、SiC2、Ta2O3
、Y2O3およびMgOの被覆層を形成した。これらは
、夫々の焼結体をI X 10−4Torr以下の真空
条件下で電子ビームにより溶解させ、4 Xl0−4T
orrの○。
Production example: Using the ion blating method, 42% Ni-P
e On the alloy plate, Al2O3, SiC2, Ta2O3 respectively.
, Y2O3 and MgO were formed. These are made by melting each sintered body with an electron beam under a vacuum condition of I X 10-4 Torr or less, and
○ of orr.

プラズマ中で蒸発させ被覆層を形成させたものである。It is evaporated in plasma to form a coating layer.

また、02プラズマは高周波により発生させ、被覆層の
厚さはすべて2μmとした。
Further, 02 plasma was generated by high frequency, and the thickness of all coating layers was 2 μm.

また、これとは別に30重量%の五1gQと70重量%
(7)A l 203.30重量%ノMg Oと70重
量%tニア)S lO2,30重盪%のMgOと70重
量%Y2O1の各混合焼結体を用いて上記方法に従って
夫々の被覆層を形成し、本発明による半導体装置用基板
を得た。
In addition, 30% by weight of 51gQ and 70% by weight
(7) Using a mixed sintered body of 203.30% by weight of MgO and 70% by weight of S1O2, 30% by weight of MgO and 70% by weight of Y2O1, each coating layer was formed according to the above method. A substrate for a semiconductor device according to the present invention was obtained.

また、2元の蒸発源を設けてMgO−A1203の混合
比的1:1の被覆層を上記手続に従って形成した。
Further, a dual evaporation source was provided and a coating layer of MgO-A1203 with a mixing ratio of 1:1 was formed according to the above procedure.

かくして得られた各サンプルを大気中で加熱し被覆され
た42重量%Ni−Fe合金の変色を観察し、変色の出
現する直前の温度を耐熱温度として記録し、結果を以下
の第1表に示した。尚、測定温度ハ200〜1.000
℃まで100℃間隔で行った。
Each sample thus obtained was heated in the atmosphere and the discoloration of the coated 42% Ni-Fe alloy was observed. The temperature immediately before the appearance of discoloration was recorded as the heat resistance temperature, and the results are shown in Table 1 below. Indicated. In addition, the measured temperature is 200 to 1.000
℃ at 100℃ intervals.

第1表の結果から明らかな如く、MgOを含む被覆層が
特に高い耐熱性(約800℃以上)を示すことがわかる
。尚、上記耐熱試験後においても、被覆層の電気特性の
変化はなく、被覆層の厚さ2μmで100vの絶縁耐圧
を達成することができた。従って、本発明による半導体
装置用電気絶縁基盤は充分実用に耐えるものであること
がわかる。
As is clear from the results in Table 1, it can be seen that the coating layer containing MgO exhibits particularly high heat resistance (about 800° C. or higher). Note that even after the above heat resistance test, there was no change in the electrical properties of the coating layer, and a dielectric strength voltage of 100 V could be achieved with a coating layer thickness of 2 μm. Therefore, it can be seen that the electrically insulating substrate for semiconductor devices according to the present invention is sufficiently durable for practical use.

発明の効果 以上詳しく説明しプこように、本発明の半導体装置用電
気絶縁基板にあっては、MgOと、Al2O3,510
2、Ta2O3、zrO2、Y 20 、もしくはこれ
らの混合物とを組み合わせて絶縁層を形成し、これと金
属板とで構成されていることに基づき、半導体装置の高
速化・高集積化に伴う発熱遣の増大に充分対応し得る特
性を有している。また、MgOを使用したことにより、
高温度耐熱性が改善され、半導体のパッケージング、回
路基板の組立て等の際に高温状態におかれる場合にも何
等問題を生じない。
Effects of the Invention As will be explained in detail above, the electrically insulating substrate for semiconductor devices of the present invention contains MgO and Al2O3,510.
2. The insulating layer is formed by combining Ta2O3, zrO2, Y20, or a mixture thereof, and is composed of a metal plate, which reduces heat generation as semiconductor devices become faster and more highly integrated. It has characteristics that can sufficiently cope with the increase in In addition, by using MgO,
The high-temperature heat resistance is improved, and no problems occur even when exposed to high temperatures during semiconductor packaging, circuit board assembly, etc.

従って、本発明の半導体装置搭載用基板は、高速化、高
集積化等の著しいIC5LSI、VLS Iはもとより
、各種半導体装置の搭・戎のために利用でき、高い信頼
性を特徴する
Therefore, the semiconductor device mounting substrate of the present invention can be used for mounting and mounting various semiconductor devices, as well as IC5LSI and VLSI, which have remarkable high speed and high integration, and are characterized by high reliability.

Claims (4)

【特許請求の範囲】[Claims] (1)金属板と、その上に設けられたAl_2O_3、
SiO_2、Ta_2O_3、TiO_2、ZrO_2
およびY_2O_3からなる群から選ばれる少なくとも
1種の酸化物とMgOとを含み、物理的気相蒸着法によ
り形成された絶縁層とで構成されることを特徴とする半
導体装置用電気絶縁基板。
(1) Metal plate and Al_2O_3 provided on it,
SiO_2, Ta_2O_3, TiO_2, ZrO_2
An electrically insulating substrate for a semiconductor device, comprising an insulating layer containing at least one oxide selected from the group consisting of Y_2O_3 and MgO and formed by physical vapor deposition.
(2)前記MgOが5〜95重量%の範囲内で含まれる
ことを特徴とする特許請求の範囲第1項記載の半導体装
置用電気絶縁基板。
(2) The electrically insulating substrate for a semiconductor device according to claim 1, wherein the MgO is contained within a range of 5 to 95% by weight.
(3)前記絶縁層の厚さが0.5〜20μmの範囲内で
ある特許請求の範囲第2項記載の半導体装置用電気絶縁
基板。
(3) The electrically insulating substrate for a semiconductor device according to claim 2, wherein the thickness of the insulating layer is within the range of 0.5 to 20 μm.
(4)前記物理的気相蒸着法により得られる絶縁層が、
10^−^4Torr以下の真空条件下で形成されたも
のであることを特徴とする特許請求の範囲第1〜3項の
いずれか1項に記載の半導体装置用電気絶縁基板。
(4) The insulating layer obtained by the physical vapor deposition method is
The electrically insulating substrate for a semiconductor device according to any one of claims 1 to 3, which is formed under a vacuum condition of 10^-^4 Torr or less.
JP15962185A 1985-07-19 1985-07-19 Electrically insulating substrate for semiconductor device Pending JPS6221247A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15962185A JPS6221247A (en) 1985-07-19 1985-07-19 Electrically insulating substrate for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15962185A JPS6221247A (en) 1985-07-19 1985-07-19 Electrically insulating substrate for semiconductor device

Publications (1)

Publication Number Publication Date
JPS6221247A true JPS6221247A (en) 1987-01-29

Family

ID=15697720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15962185A Pending JPS6221247A (en) 1985-07-19 1985-07-19 Electrically insulating substrate for semiconductor device

Country Status (1)

Country Link
JP (1) JPS6221247A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63193547A (en) * 1987-02-06 1988-08-10 Showa Denko Kk Circuit board
WO2023190658A1 (en) * 2022-04-01 2023-10-05 日東電工株式会社 Laminate, heat dissipation substrate, and laminate production method
WO2023190659A1 (en) * 2022-04-01 2023-10-05 日東電工株式会社 Laminate, heat-dissipating substrate, and method for producing laminate

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5815241A (en) * 1981-07-20 1983-01-28 Sumitomo Electric Ind Ltd Substrate for semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5815241A (en) * 1981-07-20 1983-01-28 Sumitomo Electric Ind Ltd Substrate for semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63193547A (en) * 1987-02-06 1988-08-10 Showa Denko Kk Circuit board
JPH054820B2 (en) * 1987-02-06 1993-01-20 Showa Denko Kk
WO2023190658A1 (en) * 2022-04-01 2023-10-05 日東電工株式会社 Laminate, heat dissipation substrate, and laminate production method
WO2023190659A1 (en) * 2022-04-01 2023-10-05 日東電工株式会社 Laminate, heat-dissipating substrate, and method for producing laminate

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