JPH0491443A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device having excellent thermal impact resistance and moisture resistance by providing steps of sealing a bump with first resin composition, and covering the first composition with second resin composition containing solvent while holding a state connected to an insulating board. CONSTITUTION:A method of manufacturing a semiconductor device having an insulating board 13, a semiconductor element 11 face down-connected to wirings 14 formed on the board 13 through a bump 12, and resin composition 15 for sealing the bump 12, has steps of sealing the bump 12 with the composition 15, and covering the composition 15 with second resin composition 16 containing solvent while holding a state connected to the board 13. For example, a gap between the element 11 and the board 13 is immersed with epoxy resin 15 containing no solvent as first resin composition in a semicured state. Then, phenol curable epoxy resin 16 is used as the second composition, and the resins 15, 16 are, after the resin 15 is so covered as not to be exposed, simultaneously primarily cured.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method of manufacturing a semiconductor device in which an insulating substrate and a semiconductor element are connected by a flip-chip method.

(Conventional technology) In recent years, with advances in semiconductor integrated circuit technology, the number of terminals has increased to 10.
Semiconductor devices with a pad pitch of more than 0 and semiconductor devices with a pad pitch of 100 μm or less are emerging. Accordingly, in order to increase the packaging density of semiconductor elements, flip-chip, beam lead, and tape carrier methods are used, which do not depend on the number of electrodes during assembly and allow for one-time bonding, making it possible to package chips in an extremely small volume. Wireless bonding is attracting attention. In particular, the flip-chip method is expected to have stronger bonding strength and higher reliability than other methods.

FIG. 5 shows an example of a conventional semiconductor device using the flip-chip method.

Solder bumps 2 made of Pb-8n or the like are formed on the semiconductor element 1 . The bump 2 and the wiring 4 provided on the insulating substrate 3 are bonded to face each other. In the semiconductor device configured in this way, the contact flexibility of the bumps 2, which are the joints between the semiconductor element 1 and the insulating substrate 3, is low, and the semiconductor element 1
Because of the mismatch in thermal expansion coefficients between the bumps 2 and the insulating substrate 3, thermal strain tends to occur in the bumps 2, resulting in poor bonding and, in the worst case, fatigue failure.

Therefore, as shown in FIG. 6, the insulating substrate 3 and the semiconductor element 1 are
A semiconductor device has been devised in which the bumps 2 are reinforced by filling the gaps between them with a protective resin 5.

In such a semiconductor device, an insulating substrate 3 and a semiconductor element 1
Since the gap between the two is narrow, it was necessary to lower the viscosity of the resin 5 in order to fill the gap with the resin 5.

In order to lower the viscosity, the filler content of the resin 5 may be reduced. However, when the bump 2 is sealed with such a resin 5, the content of the filler in the resin 5 is reduced, and as a result, the resin 5
The difference in the coefficient of thermal expansion between the resin 5 and the insulating substrate 3 and the difference in the coefficient of thermal expansion between the resin 5 and the semiconductor element 1 become large, which makes them susceptible to thermal stress and reduces reliability. For example, when a thermal shock test was conducted on a semiconductor device in which bumps 2 were sealed using a large amount of resin 5, cracks appeared in the resin 5 and the bumps 2. Furthermore, in a semiconductor device in which the bumps 2 are sealed using an amount of resin 5 that does not cause cracks in the bumps 2 in a thermal shock test, the sealing performance deteriorates and the reliability decreases. for example,
When a high temperature and high humidity test was conducted, moisture easily penetrated into the resin 5.

Furthermore, the viscosity can also be lowered by mixing a solvent with the resin 5. However, when the bumps 2 are sealed with such resin 5, the gap between the insulating substrate 3 and the semiconductor element 1 is narrow, so the solvent may not completely evaporate when the resin 5 hardens, or the solvent may evaporate. It is said that poor connections may occur due to firing during the process, or voids generated when the solvent evaporates are not completely eliminated, resulting in the formation of water infiltration paths in the resin 5, reducing the reliability of the device. There was a problem. In particular, reliability under high temperature and high humidity was poor.

(Problems to be Solved by the Invention) In order to seal the bumps with resin as described above, it was necessary to lower the viscosity of the resin. For this reason, there have been semiconductor devices in which the bumps are sealed with resin that contains a small amount of filler, but such semiconductor devices suffer from thermal stress due to the large difference in coefficient of thermal expansion between the resin, the insulating substrate, and the semiconductor element. However, there were problems in that it was susceptible to cracking and was prone to cracking, reducing reliability. In addition, some semiconductor devices have sealed bumps with a resin mixed with a solvent, but such semiconductor devices suffer from wire breakage due to gunshots that occur when the solvent evaporates, and moisture intrusion due to voids remaining in the resin. There was a problem that reliability deteriorated.

The present invention has been made in consideration of the above circumstances, and an object thereof is to provide a method for manufacturing a semiconductor device having excellent thermal shock resistance and moisture resistance.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the method for manufacturing a semiconductor device of the present invention includes an insulating substrate and a wiring formed on the insulating substrate through bumps. A method for manufacturing a semiconductor device having a semiconductor element connected face-down and a resin composition for sealing the bumps, comprising: sealing the bumps with a first resin composition; and bonding to the insulating substrate. and covering the first resin composition with a second resin composition containing a solvent while maintaining the same.

(Function) According to the present invention, since the first resin composition sealing the bump is covered with the second resin composition, the first resin composition is insulated from itself or from the first resin composition. It is possible to prevent moisture and the like from entering from the interface with the substrate. Moreover, since the second resin composition contains a solvent, the filler with a heavy specific gravity settles when it is cured, and the concentration of the filler near the insulating substrate becomes high. As a result, it is possible to prevent moisture from entering from the interface between the second resin composition and the insulating substrate, and the difference in thermal expansion coefficient near the interface between the insulating substrate and the second resin composition is reduced. Peeling,
Cracks are less likely to occur. Further, since the first resin composition and the second resin composition are welded together by the solvent, the strength of the sealed tube between the first resin composition and the second resin composition is increased.

(Example) Hereinafter, embodiments will be described with reference to the drawings.

FIG. 1 shows a sectional view of a semiconductor device according to a first embodiment of the present invention, and FIG. 2 shows a plan view of the same semiconductor device. Note that FIG. 1 is a cross-sectional view of the semiconductor device of FIG. 2 taken along line A-A.

To explain this according to the manufacturing process, first, the semiconductor element 1
1 electrode, that is, on the aluminum bonding pad, with a copper bump as the core, and electroplated for half a day] Bump 12
form. Next, an ITO (1 ndiua
+ Tin 0xlde), chromium, and gold with thicknesses of 1000 and 1000, respectively.

A layer of about 2,000 layers is deposited, and this metal laminated film is patterned to form the wiring 14.

Next, the bumps 12 and the wiring 14 are aligned, and the semiconductor element 11 and the insulating substrate 13 are bonded face down. As a method for alignment at this time, alignment marks may be provided on each of the semiconductor element 11 and the insulating substrate 13, and alignment may be performed by matching the corresponding marks.

Next, in the gap between the semiconductor element 11 and the insulating substrate 13,
For example, an epoxy resin 15 containing no solvent is impregnated as the first resin composition. After the epoxy resin 15 fills the gap between the semiconductor element 11 and the insulating substrate 13 and seals the bumps 12, the epoxy resin 15 is cured under milder conditions than the predetermined curing conditions and maintained in a semi-cured state.

Next, a phenol-cured epoxy resin 16 is used as a second resin composition to cover the epoxy resin Ni 15 so that it is not exposed. At this time, as shown in FIGS. 1 and 2, the phenol-cured epoxy resin 16 covers the back surface of the semiconductor element 11 and protects the semiconductor element 11, and also connects the phenol-cured epoxy resin 16, the semiconductor element 11, and the insulating substrate 13. The adhesion strength is strengthened and the connection between the semiconductor element 11 and the insulating substrate is strengthened.

Thereafter, the epoxy resins 15 and 16 are simultaneously fully cured to complete the bonding between the semiconductor element 11 and the insulating substrate 13. Here, the epoxy resin 15 is brought into a semi-cured state, and the epoxy resin 15 is covered with a phenol-cured epoxy resin 16.
The method of curing both epoxy resins 15 and 16 at the same time was adopted because this method provides the best adhesion between the epoxy resins 15 and 16.

As the above-mentioned phenol-cured epoxy resin 16, those shown in Table 1 can be used. For example, polyfunctional epoxy resin (ESX-221) manufactured by Sumitomo Chemical Co., Ltd., phenol resin (BRG-556) manufactured by Showa Kobunshi Co., Ltd., silica filler manufactured by Toshiba Ceramic Co., Ltd., silane coupling agent manufactured by UCC Company, Mitsubishi Chemical Co., Ltd. Carbon black manufactured by Kasei Co., Ltd., imidazole catalyst manufactured by Shikoku Kasei Co., Ltd., and commercially available cellosolve acetate.

) Rue>, M E IC respectively tL13.2.6
．． 0゜80.0, 0.5, 0.3, 0.1, 6.0゜6
．． A composition containing 0.6.0 parts by weight is used.

In the semiconductor device manufactured in this way, the bump 12
Since the epoxy resin 15 that has been sealed is covered with the phenol-cured epoxy resin 16, moisture and the like can be prevented from entering from the interface between the epoxy resin 15 and the bumps 12. In addition, since the epoxy resin 16 contains a solvent, it plays the role of a gradient material, so the composition in the epoxy resin 16 floats and sinks, and when it hardens, the filler with a specific gravity of ff1-) settles, and the insulating substrate 13 and the epoxy The concentration of the filler increases near the joint surface with the resin 16. As a result, it becomes difficult for moisture to enter the bonding surface between the insulating substrate 13 and the epoxy resin 16, and moisture resistance is improved. Furthermore, since the difference in thermal expansion coefficient between the filler and the insulating substrate 13 is small, the thermal expansion coefficient of the epoxy resin 1t bonded to the insulating substrate 13 approaches that of the insulating substrate 13, making it difficult for peeling and cracking to occur, and improving thermal shock resistance. will improve. Also, due to the solvent contained in the epoxy resin 16,
The epoxy resin 15 is melted, welding occurs, and the adhesion strength between the epoxy resin 15 and the epoxy resin 16 is increased, improving reliability.

As in this embodiment, by sealing the bump 12 with a first resin composition that does not contain a solvent, and further covering this first resin composition with a second resin composition that contains a solvent, moisture resistance is achieved. , it is possible to obtain a highly reliable semiconductor device with improved thermal shock resistance.

In this example, after covering the semi-cured epoxy resin 15 with the phenol-cured epoxy resin 16, both epoxy resins 15 and 16 were cured at the same time.
For example, the epoxy resin 15 cured under predetermined curing conditions may be covered with the epoxy resin 16 depending on the product form and specifications.

Conversely, the epoxy resin 16 covers the epoxy resin 15 that has just been impregnated into the gap between the semiconductor element 11 and the insulating substrate 13, that is, the epoxy resin 15 is hardly cured, and both epoxy resins 15 and 16 are simultaneously coated. It may be hardened.

FIG. 3 shows a cross-sectional view of a semiconductor device according to a second embodiment of the invention. Note that the same parts as in FIG. 1 are given the same reference numerals and detailed explanations will be omitted.

This embodiment differs from the previously described embodiments in that the phenol-cured epoxy resin 16a does not cover the back surface of the semiconductor element 11, but instead encapsulates the epoxy resin 15 that does not contain a solvent. In the semiconductor device manufactured in this way, the semiconductor element 11 is not protected by the epoxy resin 16a and is exposed, but the results of the environmental resistance test are comparable to those of the first embodiment, and the reliability is improved. I confirmed that.

FIG. 4 shows a cross-sectional view of a semiconductor device according to a third embodiment of the present invention. Note that the same parts as in FIG. 1 are given the same reference numerals and detailed explanations will be omitted.

This example is the first example. The difference from the second embodiment is that the gap between the semiconductor element 11 and the insulating substrate 13 is filled with epoxy resin 1.
The reason is that the number 5 is not completely filled in.

That is, the epoxy resin 15a fills the gap between the semiconductor element 11 and the insulating substrate 13 only in the portion necessary to seal the bump 12.

In this example, although air is present in the central portion, this does not impair reliability, and the same effects as in the previous example were obtained.

The present inventors investigated the environmental resistance of the semiconductor devices having the configurations shown in FIGS. 1, 3, and 4 and the semiconductor device having the configuration shown in FIG. 6 using actual devices. saw.

A thermal shock test was conducted at -40 to 100°C for 30 minutes each cycle, and the resistance of each bump bonding portion after 600 cycles of the semiconductor device with the configuration shown in Figures 1, 3, and 4 was found. was about 1 Ω or less, but in the semiconductor device having the configuration shown in FIG. 6, cracks appeared in the resin 5 and there were parts where the connection could not be established before 300 cycles had passed.

In addition, when we conducted a high temperature and high humidity storage test at 70°C and 90% R and H, we found that the bump bonding portions of the semiconductor devices having the configurations shown in Figs. 1, 3, and 4 after 100OH were Although the resistance was stable at about 1 Ω or less, in the semiconductor device having the configuration shown in FIG. 6, a defect occurred in the bump joint portion after 600 hours.

Note that the present invention is not limited to the embodiments described above. In the examples, an epoxy resin was used as the first resin composition that does not contain a solvent, but similar effects can be obtained by using an acrylic resin, a silicone resin, or the like. In short,
A solvent-free resin composition that can be impregnated into the gap between the semiconductor element 11 and the insulating substrate 13 and can be almost uniformly cured even when the gap between the semiconductor element 11 and the insulating substrate 13 is filled. It is fine as long as it is a thing. Furthermore, in the above embodiment,
Although phenol-cured epoxy resin 16, which is an epoxy resin, was used as the second resin composition containing a solvent, similar effects can be obtained by using acrylic resin, silicone resin, butadiene resin, or the like. In short, any material may be used as long as it becomes a gradient material in which the filler settles and improves moisture resistance and thermal shock resistance.

Further, in the above embodiment, after bonding the semiconductor element 11 and the insulating substrate 13 via the bumps 12, the epoxy resin 1
Although the bumps 12 are sealed in Step 5, the semiconductor element 11 and the insulating substrate 13 may be bonded by potting the epoxy resin 15 on the insulating substrate 13 in advance. In this case, the wiring 14
Since the and bumps are connected via an insulating adhesive, there is no need to use a bump made of a connection material like the solder bump 12, so bump materials such as gold or copper can be used. becomes. Moreover, as the first resin composition, in addition to the epoxy resin, the above-mentioned acrylic resin,
Of course, the same effect can be obtained by using a resin such as a silicone resin.

Further, as a material for the insulating substrate 13 other than alkali-free glass, ceramic, glass epoxy, metal core, polyimide, paper phenol, or the like may be used. Also, ITO
Materials for the wiring 14 other than the laminated film of , chromium, and gold include:
Nickel, copper, titanium, ITO, chromium, aluminum, molybdenum.

Tantalum, tungsten, gold, silver, baradium, or a combination of these wiring materials may be used.

In the above embodiment, the solder bumps 12 are formed using electroplating using a copper bump as the core, but the metal of the core is not necessarily required. Furthermore, when forming the solder bumps 12, the solder bumps 12 may be formed using a vacuum evaporation method without using electroplating, or the solder bumps 12 may be formed by immersing the semiconductor element 11 in molten solder. . Furthermore, the ratio of tin and lead may be changed depending on the product to be used and the manufacturing process, or other metal materials may be used for bump materials other than solder. For example, indium is used for products where temperature conditions are restricted, such as liquid crystal display devices.

The bumps may be formed using a metal with a low melting point such as bismuth or cadmium. Further, if it is desired to improve the corrosion resistance of the bump, it is preferable to use a bump material such as silver or antimony. In addition, various modifications can be made without departing from the gist of the present invention.

[Effects of the Invention] According to the present invention, it is possible to prevent moisture from entering the resin, and the moisture resistance is improved. Furthermore, since the difference in coefficient of thermal expansion at the bonding surface between the insulating substrate and the resin is reduced, thermal shock resistance is also improved. As a result, a semiconductor device with improved environmental resistance and high reliability can be obtained.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a plan view of the same semiconductor device, and FIG. 3 is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention. , FIG. 4 is a sectional view of a semiconductor device according to a third embodiment of the present invention, and FIG. FIG. 6 is a sectional view of a conventional semiconductor device. 11... Semiconductor element, 12... Bump, 13...
Insulating substrate, 14... Wiring, 15, 15a... Epoxy resin, 16.168... Phenol-cured epoxy resin. Applicant's agent Patent attorney Takehiko Suzue No. 2!1 Figure 3 Figure 5 Figure 6

Claims (1)

[Claims] A method for manufacturing a semiconductor device comprising: an insulating substrate; a semiconductor element connected face-down to wiring formed on the insulating substrate via bumps; and a resin composition for sealing the bumps. It is characterized by comprising the steps of: sealing the bump with a composition; and covering the first resin composition with a second resin composition containing a solvent while maintaining the state bonded to the insulating substrate. A method for manufacturing a semiconductor device.