JPH0479014B2 - - Google Patents
Info
- Publication number
- JPH0479014B2 JPH0479014B2 JP57229421A JP22942182A JPH0479014B2 JP H0479014 B2 JPH0479014 B2 JP H0479014B2 JP 57229421 A JP57229421 A JP 57229421A JP 22942182 A JP22942182 A JP 22942182A JP H0479014 B2 JPH0479014 B2 JP H0479014B2
- Authority
- JP
- Japan
- Prior art keywords
- logic
- result
- bit
- zero
- condition code
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57229421A JPS59121539A (ja) | 1982-12-28 | 1982-12-28 | 条件コ−ド決定回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57229421A JPS59121539A (ja) | 1982-12-28 | 1982-12-28 | 条件コ−ド決定回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59121539A JPS59121539A (ja) | 1984-07-13 |
JPH0479014B2 true JPH0479014B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-12-14 |
Family
ID=16891958
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57229421A Granted JPS59121539A (ja) | 1982-12-28 | 1982-12-28 | 条件コ−ド決定回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59121539A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2532083B2 (ja) * | 1987-02-26 | 1996-09-11 | 株式会社日立製作所 | フラグ発生回路 |
JPH01277931A (ja) * | 1988-04-29 | 1989-11-08 | Nec Ic Microcomput Syst Ltd | 零検出回路 |
US5598514A (en) * | 1993-08-09 | 1997-01-28 | C-Cube Microsystems | Structure and method for a multistandard video encoder/decoder |
US5910909A (en) * | 1995-08-28 | 1999-06-08 | C-Cube Microsystems, Inc. | Non-linear digital filters for interlaced video signals and method thereof |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3983382A (en) * | 1975-06-02 | 1976-09-28 | International Business Machines Corporation | Adder with fast detection of sum equal to zeroes or radix minus one |
JPS5587243A (en) * | 1978-12-25 | 1980-07-01 | Fujitsu Ltd | Zero detection system of adder output |
-
1982
- 1982-12-28 JP JP57229421A patent/JPS59121539A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS59121539A (ja) | 1984-07-13 |