JPH0475327A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH0475327A JPH0475327A JP19163990A JP19163990A JPH0475327A JP H0475327 A JPH0475327 A JP H0475327A JP 19163990 A JP19163990 A JP 19163990A JP 19163990 A JP19163990 A JP 19163990A JP H0475327 A JPH0475327 A JP H0475327A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- semiconductor
- substrate
- growth
- crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 37
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 239000013078 crystal Substances 0.000 claims abstract description 12
- 238000004943 liquid phase epitaxy Methods 0.000 claims description 3
- 238000000927 vapour-phase epitaxy Methods 0.000 claims description 2
- 238000005530 etching Methods 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 25
- 239000007788 liquid Substances 0.000 abstract description 6
- 239000002904 solvent Substances 0.000 abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 230000001419 dependent effect Effects 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
- 239000007791 liquid phase Substances 0.000 description 10
- 238000001947 vapour-phase growth Methods 0.000 description 8
- 238000006243 chemical reaction Methods 0.000 description 4
- 239000002994 raw material Substances 0.000 description 3
- 239000012159 carrier gas Substances 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910001338 liquidmetal Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造方法に%す、いわゆるSO工
槽構造形成手法についての改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an improvement in a method for forming a so-called SO tank structure, which is used in a method for manufacturing a semiconductor device.
従来、半導体層を形成するには液相成長法及び気相成長
法が広く使われている。液相成長法は溶かして液体にし
た金属の溶媒中に、半導体層の原料を高い温度で飽和状
0−1で溶解させたのち、温度を下げて溶液を所定の過
飽和状態にさせる。次にこの過飽和溶液を半導体基板の
上に移動させ、溶液を冷却させる。このことによって基
板の表面に、半導体を析出させ冷却を続けると基板の上
に半導体層が形成するっその後、所定の温度で溶液を基
板から切抄離すと、成長は終了する。Conventionally, liquid phase epitaxy and vapor phase epitaxy have been widely used to form semiconductor layers. In the liquid phase growth method, a raw material for a semiconductor layer is dissolved in a liquid metal solvent at a high temperature to a 0-1 saturation state, and then the temperature is lowered to bring the solution to a predetermined supersaturation state. This supersaturated solution is then transferred onto the semiconductor substrate and the solution is allowed to cool. As a result, a semiconductor is deposited on the surface of the substrate, and when cooling is continued, a semiconductor layer is formed on the substrate. Afterwards, when the solution is separated from the substrate at a predetermined temperature, the growth is completed.
この液相成長法は表面モホロジーが良好であるので、絶
縁膜上に薄く広がる半導体層が出来る。Since this liquid phase growth method has good surface morphology, a thin semiconductor layer can be formed on the insulating film.
一方、前記のように液相成長法の温度、液の組成は成長
中常に変化しているので、成長層の深さ方向での組成の
制御性が悪い。又半導体成長層の中に溶媒金属を%オー
ダで含有し、成長層の表面の平坦性も悪いなどの短所が
ある。On the other hand, as mentioned above, the temperature and composition of the liquid in the liquid phase growth method constantly change during growth, so the controllability of the composition in the depth direction of the grown layer is poor. Furthermore, the semiconductor growth layer contains solvent metal on the order of %, and the surface flatness of the growth layer is also poor.
つぎに気相成長法はキャリアがスに稀釈された半導体の
原料がスを連続的に高温の反応管内に導き、そこで化学
反応を起し半導体層が基板の上に成長する。なお反応生
成物及び未反応原料がスは排気させる。このように、反
応管内の温度、圧力がス組成など諸反応条件を一定にす
ることは可能である。したがって、成長層の深さ方向の
性質も一定になる。又成長条件を変化させることによっ
て、成長層深さ方向の性質も成長条件に応じて変化する
。このことにより気相成長法は制御性がよいという利点
を持つ。ところで、気相成長法では絶縁膜の上に広い半
導体層を形成することは困難である。Next, in the vapor phase growth method, a semiconductor raw material diluted with carrier gas is continuously introduced into a high-temperature reaction tube, where a chemical reaction occurs and a semiconductor layer is grown on the substrate. Incidentally, reaction products and unreacted raw materials are exhausted. In this way, it is possible to keep various reaction conditions such as the temperature, pressure, and gas composition in the reaction tube constant. Therefore, the properties of the growth layer in the depth direction are also constant. Furthermore, by changing the growth conditions, the properties of the growth layer in the depth direction also change depending on the growth conditions. Due to this, the vapor phase growth method has the advantage of good controllability. By the way, it is difficult to form a wide semiconductor layer on an insulating film using the vapor phase growth method.
上記のように液相成長法の広がり性は良いが出来た半導
体層の品質が悪く、又気相成長法の半導体層の品質は良
いが、広がり性は良くないという問題点があった。As mentioned above, the liquid phase epitaxy method has good spreadability but the quality of the resulting semiconductor layer is poor, and the vapor phase growth method has the problem that the quality of the semiconductor layer is good but the spreadability is poor.
本発明は上記のような問題点に鑑みてなされたもので、
簡単な手法により、品質のよい面積の広い半導体層を絶
縁層の上に形成できる半導体装置の製造方法を得ること
を目的とする。The present invention was made in view of the above-mentioned problems.
An object of the present invention is to obtain a method for manufacturing a semiconductor device that can form a high-quality, wide-area semiconductor layer on an insulating layer using a simple method.
〔課題を解決するための手段および作用〕本発明に係る
半導体装置の製造方法は窓を形成するSO工槽構造よっ
て液相成長法で横方向に広く、またその後気相成長法に
よって成長深さを制御性良く成長させるようにしたもの
である。[Means and effects for solving the problems] The method for manufacturing a semiconductor device according to the present invention uses an SO tank structure that forms a window to increase the width in the lateral direction using a liquid phase growth method, and then increases the growth depth using a vapor phase growth method. It is designed to grow with good controllability.
以下、本発明の一実施例を図に基づいて説明する、
第1図(a)〜(e)は本発明の一実施例である半導体
装置の製造工程を示す断面図である。An embodiment of the present invention will be described below with reference to the drawings. FIGS. 1(a) to 1(e) are cross-sectional views showing the manufacturing process of a semiconductor device according to an embodiment of the present invention.
まず、半導体Si基板10の表面を酸化する又はCVD
などの成膜技術でもって、Si 02層を基板(10)
に堆積させることによって絶縁性の5i02層(11)
を形成する(第1図(8)参照)。First, the surface of the semiconductor Si substrate 10 is oxidized or CVD
Using film-forming techniques such as
insulating 5i02 layer (11) by depositing on
(See Figure 1 (8)).
次いで、写真製版工程で8i 02絶縁膜(11)をエ
ツチングして、所定か所(12)での81基板(10)
を露出させる。露出か所(いわゆる窓) (12)を液
相成長の種結晶とする(第1図(b)参照)。Next, the 8i 02 insulating film (11) is etched using a photolithography process to form the 81 substrate (10) at predetermined locations (12).
expose. The exposed area (so-called window) (12) is used as a seed crystal for liquid phase growth (see FIG. 1(b)).
この後、基板の上にSnを溶媒として液相成長法で、S
i単結晶層(13)を成長させる(第1図(c)参照)
。After this, S is grown on the substrate by liquid phase growth using Sn as a solvent.
i Grow the single crystal layer (13) (see Figure 1(c))
.
Si単結晶成長層(13)は基板上絶縁膜の有無、又は
液相成長層特有な波模様があるので、半導体成長層(1
3)の表面に平坦性の良い物例えば写真製版用レジスト
を1!1す、レジス)、Si単結晶の選択比ののない条
件でエツチングすることKより平坦化する(第1図(d
)参照)。この後、第1図fe)に示すように、平坦化
した液相の上に気相成長法でSi単結晶層(14)を形
成する。The Si single crystal growth layer (13) has a wave pattern peculiar to the presence or absence of an insulating film on the substrate or a liquid phase growth layer, so the semiconductor growth layer (13)
3) A material with good flatness, such as a photolithographic resist (1:1 resist), is etched on the surface under conditions that do not have the selectivity of Si single crystals (Fig. 1(d)).
)reference). Thereafter, as shown in FIG. 1 (fe), a Si single crystal layer (14) is formed on the flattened liquid phase by vapor phase growth.
以上のように本発明によれば、SO工槽構造形成してお
いて、液相成長法の横方向に広く成長することと気相成
長法のよい性質半導体層が形成出来ることを併用するこ
とによって、良質なSOIが形成出来るという効果があ
る。As described above, according to the present invention, the SO tank structure is formed, and the ability to grow widely in the lateral direction using liquid phase growth and the ability to form a semiconductor layer with good properties using vapor phase growth are combined. This has the effect that high quality SOI can be formed.
第1図(a)ないしくe)は本発明の一実施例である半
導体装置の製造工程を示す断面図である。
図において、(10)・・・半導体基板、11・・・絶
縁層、12・・・窓、13・・・液相成長層、14・・
−気相成長層。FIGS. 1(a) to 1(e) are cross-sectional views showing the manufacturing process of a semiconductor device according to an embodiment of the present invention. In the figure, (10)...Semiconductor substrate, 11...Insulating layer, 12...Window, 13...Liquid phase growth layer, 14...
- Vapor phase growth layer.
Claims (1)
層を選択的にエッチングして、半導体基板を露出させ、
前記露出部の窓を種結晶として、液相成長法で横方向に
前記絶縁層の上に薄く広い半導体層を形成し、次に気相
成長法で前記の半導体層の上にさらに半導体層を形成す
ることを特徴とする半導体装置の製造方法。(1) forming an insulating layer on one side of a semiconductor substrate, selectively etching the insulating layer to expose the semiconductor substrate;
Using the window in the exposed portion as a seed crystal, a thin and wide semiconductor layer is laterally formed on the insulating layer by liquid phase epitaxy, and then a semiconductor layer is further formed on the semiconductor layer by vapor phase epitaxy. 1. A method of manufacturing a semiconductor device, characterized by forming a semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19163990A JPH0475327A (en) | 1990-07-17 | 1990-07-17 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19163990A JPH0475327A (en) | 1990-07-17 | 1990-07-17 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0475327A true JPH0475327A (en) | 1992-03-10 |
Family
ID=16278004
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19163990A Pending JPH0475327A (en) | 1990-07-17 | 1990-07-17 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0475327A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100741856B1 (en) * | 2006-04-24 | 2007-07-24 | 삼성전자주식회사 | Method of forming soi substrate and the substrate so formed |
-
1990
- 1990-07-17 JP JP19163990A patent/JPH0475327A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100741856B1 (en) * | 2006-04-24 | 2007-07-24 | 삼성전자주식회사 | Method of forming soi substrate and the substrate so formed |
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